1 Introduction

All-pass filters are used to correct the phase shifts caused by analog filtering operations without changing the amplitude of the applied signal. In the literature, although many first-order voltage-mode (VM) all-pass filters (APFs) were proposed (e.g. [1–23] and references cited therein), only circuits in [3–23] are resistorless i.e. no external resistor is required and electronically tunable simultaneously. Table 1 summarizes the advantages and disadvantages of previously reported VM APFs in [1–23]. It is important to mention that we do not rule out the importance of the discussion on all the given criterions in the Table 1, however, in this part we concentrate on comparison of each circuit only regarding their tunability feature. In general, the tunability feature of circuits is solved in four different ways. After the current-controlled conveyor (CCCII) was introduced [24], a new period has been opened with respect to electronic tunability in the analog filter design. Here the intrinsic input resistance of the CCCII and other versatile analog building blocks (ABBs) is controlled via an external current or voltage, as shown in [3–11]. Similarly, the output resistance control of the CMOS inverting amplifier is demonstrated in [12]. Another technique is given in [13–16], where the appropriate resistor is replaced by MOSFET-based voltage-controlled resistor. In recently presented voltage differencing-differential input buffered amplifier (VD-DIBA)-based VM APF [17] and in other circuits [18–23] the tunability property of the operational transconductance amplifier (OTA) [25] is used to shift the phase response of the circuits. In fact, although the active element VD-DIBA, which belongs to the group of ‘voltage differencing’ elements [26], is new, it is composed of an OTA and a unity gain differential amplifier (UGDA), an interconnection that is done in [23] separately.

Table 1 Comparison with previously published VM all-pass filters
Full size table

This paper reports another ‘voltage differencing’ element, namely the voltage differencing inverting buffered amplifier (VDIBA), which has simpler active structure than VD-DIBA [17], because there is no need of a difference amplifier at its second stage. Moreover, the proposed resistorless first-order VM APF using single VDIBA and one capacitor provides both inverting and non-inverting all-pass responses simultaneously at two different output nodes. It is worth mention that only circuits in [11, 14, 15], and [21] have such exclusive advantage. To validate the applicability of the new APF, a second-order APF and four-phase quadrature oscillator circuits are presented. SPICE simulation and experimental measurement results are included to support the theory.

2 Circuit description

The voltage differencing inverting buffered amplifier (VDIBA) is a new four-terminal active device with electronic tuning, which circuit symbol and behavioral model are shown in Fig. 1(a), (b), respectively. From the model it can be seen that the VDIBA has a pair of high-impedance voltage inputs v+ and v−, a high-impedance current output z, and low-impedance voltage output w−. The input stage of VDIBA can be easily implemented by a differential-input single-output OTA, which converts the input voltage to output current that flows out at the z terminal. The output stage can be formed by unity-gain IVB. Since both stages can be implemented by commercially available integrated circuits (ICs), and moreover it contains OTA, the introduced active element is attractive for resistorless and electronically controllable circuit applications.

Fig. 1
figure 1

a Circuit symbol and b behavioral model of VDIBA

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Using standard notation, the relationship between port currents and voltages of a VDIBA can be described by the following hybrid matrix:

$$ \left[ {\begin{array}{*{20}c} {I_{v + } } \\ {I_{v - } } \\ {I_{z} } \\ {V_{w - } } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} 0 & 0 & 0 & 0 \\ 0 & 0 & 0 & 0 \\ {g_{m} } & { - g_{m} } & 0 & 0 \\ 0 & 0 & { - \beta } & 0 \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {V_{v + } } \\ {V_{v - } } \\ {V_{z} } \\ {I_{w - } } \\ \end{array} } \right], $$
(1)

where g m and β represent transconductance and non-ideal voltage gain of VDIBA, respectively. The value of β in an ideal VDIBA is equal to unity.

The CMOS implementation of the VDIBA is shown in Fig. 2. The circuit is composed of an active loaded differential pair (transistors M1–M4) cascaded with a unity-gain inverting voltage buffer (matched transistors M5 and M6). The input/output terminal resistances of the CMOS VDIBA shown in Fig. 2 can be found as:

$$ R_{ow - } \cong \frac{1}{{g_{m5} }}\left\| {r_{o6} } \right., $$
(2a)
$$ R_{oz} \cong r_{o4} \left\| {r_{o2} } \right., $$
(2b)
$$ R_{v + } = R_{v - } \cong \infty , $$
(2c)

where g mi and r oi represent the transconductance and output resistance of the i-th transistor, respectively. From Eqs. (2a)–(2c) it can be seen that while the output terminal (w−) can exhibit low resistance by selecting large transistor M5 (and M6 due to the matching condition requirement), the input terminals (v+ and v−) as well as the z terminal have high resistances.

Fig. 2
figure 2

CMOS implementation of VDIBA

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The proposed new first-order VM APF using single active element and a capacitor is shown in Fig. 3. Considering an ideal VDIBA (β = 1), routine analysis of the circuit gives the following transfer functions (TFs):

$$ T_{1} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = \frac{{sC - g_{m} }}{{sC + g_{m} }}, $$
(3a)
$$ T_{2} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \frac{{sC - g_{m} }}{{sC + g_{m} }}. $$
(3b)
Fig. 3
figure 3

Proposed resistorless dual-output VM all-pass filter with electronic tuning

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The phase responses of the TFs (3a) and (3b) are calculated as:

$$ \varphi_{1} \left( \omega \right) = 180^\circ - 2\tan^{ - 1} \left( {\frac{\omega C}{{g_{m} }}} \right), $$
(4a)
$$ \varphi_{2} \left( \omega \right) = - 2\tan^{ - 1} \left( {\frac{\omega C}{{g_{m} }}} \right). $$
(4b)

Hence, from the above equations it can be seen that the proposed configuration can simultaneously provide phase shifting both between π (at ω = 0) to 0 (at ω = ∞) and 0 (at ω = 0) to −π (at ω = ∞), at output terminals V o1 and V o2, respectively.

From Eqs. (3a) and (3b), the pole frequency ω p is expressed as:

$$ \omega_{p} = \frac{{g_{m} }}{C}. $$
(5)

Note that the ω p can be easily tuned by adjusting the transconductance of VDIBA. The pole sensitivities of the proposed circuit are given as:

$$ S_{{g_{m} }}^{{\omega_{p} }} = - S_{C}^{{\omega_{p} }} = 1, $$
(6)

which are not higher than unity in magnitude.

3 Non-ideal and parasitic effects analysis

Taking into account the non-ideal voltage gain β of the VDIBA, TFs in Eqs. (3a) and (3b) convert to:

$$ T_{1} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = \frac{{sC - g_{m} }}{{sC + \beta g_{m} }}, $$
(7a)
$$ T_{2} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \beta T_{1} \left( s \right), $$
(7b)

and non-ideal phase responses from TFs (7a) and (7b) are given as:

$$ \varphi_{1} \left( \omega \right) = 180^{^\circ } - \tan^{ - 1} \left( {\frac{\omega C}{{g_{m} }}} \right) - \tan^{ - 1} \left( {\frac{\omega C}{{\beta g_{m} }}} \right), $$
(8a)
$$ \varphi_{2} \left( \omega \right) = - \tan^{ - 1} \left( {\frac{\omega C}{{g_{m} }}} \right) - \tan^{ - 1} \left( {\frac{\omega C}{{\beta g_{m} }}} \right). $$
(8b)

Consequently, the pole frequency of the presented filter is found as:

$$ \omega_{p} = \frac{{\beta g_{m} }}{C}. $$
(9)

From Eq. (9) it can be realized that the single non-ideality of the VDIBA slightly affects the filter parameters, however, this influence can be easily compensated by the transconductance of the VDIBA.

For a complete analysis of the circuit in Fig. 3, it is also important to take into account parasitic effects of the VDIBA. Detailed numerical simulation of the filter indicated that the main source of non-idealities is due to the finite output admittance Y z of the involved OTA stage of the VDIBA. Considering that this admittance is modeled by a parallel RC circuit consisting of a non-ideal output resistance R z and a non-ideal output capacitance C z and assuming the non-zero output resistance R w- of the w− terminal, the matrix relationship of (1) changes as follows:

$$ \left[ {\begin{array}{*{20}c} {I_{v + } } \\ {I_{v - } } \\ {I_{z} } \\ {V_{w - } } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} 0 & 0 & 0 & 0 \\ 0 & 0 & 0 & 0 \\ {g_{m} } & { - g_{m} } & {sC_{z} + \frac{1}{{R_{z} }}} & 0 \\ 0 & 0 & { - \beta } & {R_{w - } } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {V_{v + } } \\ {V_{v - } } \\ {V_{z} } \\ {I_{w - } } \\ \end{array} } \right]. $$
(10)

Re-analysis of the proposed filter in Fig. 3, the ideal TFs (3a) and (3b) turns to be:

$$ T_{1} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = \frac{C}{{C + C_{z} }} \cdot \frac{{s - g_{m} /C}}{{s + {{\left( {\beta g_{m} + \frac{1}{{R_{z} }}} \right)} \mathord{\left/ {\vphantom {{\left( {\beta g_{m} + \frac{1}{{R_{z} }}} \right)} {\left( {C + C_{z} } \right)}}} \right. \kern-\nulldelimiterspace} {\left( {C + C_{z} } \right)}}}}, $$
(11a)
$$ T_{2} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \beta T_{1} \left( s \right). $$
(11b)

From Eq. (11a) it is noted that the filter has a constant magnitude slightly lower than unity, which is equal to C/(C + C z ) provided that the following condition is met:

$$ \beta = 1 + \frac{{C_{z} }}{C} - \frac{1}{{g_{m} R_{z} }}. $$
(12)

Therefore, by replacing the involved unity gain IVB stage with an adjustable amplifier with the prescribed gain in Eq. (12), the above discussed non-ideal effects can be fully compensated, at the cost of having a constant magnitude slightly lower than unity.

At this point, we want to note an interesting and useful property of the proposed filter. The filter has a very accurate unit magnitude at very low and very high frequencies. To be specific, owing to the fact that there is a capacitor connected between the filter’s input and output terminals and the capacitor behaves as a short-circuit element at the very high frequencies, the filter has very accurate unit magnitude in this frequency region, inherently. It is also worth mention that the circuit in [12] has an identical feature.

On the other hand, at very low frequencies, the filter magnitude approximates to:

$$ \frac{{V_{o1} }}{{V_{in} }}\left| {\begin{array}{*{20}c} {} \\ {s = 0} \\ \end{array} } \right. = \frac{{ - g_{m} R_{z} }}{{1 + \beta g_{m} R_{z} }}, $$
(13)

which is the gain of the feedback loop in Fig. 3. This gain also is very close to unity since typical value of R z is much larger than 1/g m .

From Eqs. (11a) and (11b) the non-ideal zero ω z and pole ω p frequencies including parasitics can be calculated as:

$$ \omega_{z} = \frac{{g_{m} }}{C}, $$
(14a)
$$ \omega_{p} = \frac{{\beta g_{m} + \frac{1}{{R_{z} }}}}{{C + C_{z} }}. $$
(14b)

From Eq. (14b) it is clear that pole ω p frequency is affected by the parasitics and non-idealities of the active element used, however, they can be minimized by:

  1. (i)

    making the β very close to unity and/or,

  2. (ii)

    choosing C ≫ C z and/or,

  3. (iii)

    choosing g m  ≫ 1/R z .

4 Loading effect analysis

In addition, the loading effects at both output terminals are also worth to be investigated. Assuming equal load R L1 = R L2 = R L and considering the non-idealities and parasitics of the VDIBA in Eq. (10), straightforward analysis gives the following voltage transfer functions:

$$ T_{1} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = \frac{{\left( {sC - g_{m} } \right)\left( {R_{L} + R_{w - } } \right)R_{z} }}{{s\left( {CR_{L} R_{z} + C_{z} R_{L} R_{z} + CR_{z} R_{w - } + C_{z} R_{z} R_{w - } } \right) + R_{L} + R_{w - } + R_{z} + \frac{{R_{z} R_{w - } }}{{R_{L} }} + \beta R_{L} R_{z} g_{m} }}, $$
(15a)
$$ T_{2} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \beta T_{1} \left( s \right). $$
(15b)

Assuming R L  ≫ R w−, TFs in Eqs. (15a) and (15b) turn to:

$$ T_{1} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = \frac{{sC - g_{m} }}{{s\left( {C + C_{z} } \right) + \beta g_{m} + \frac{1}{{R_{z} }} + \frac{1}{{R_{L} }}}}, $$
(16a)
$$ T_{2} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \beta T_{1} \left( s \right). $$
(16b)

Finally, considering R z  ≫ R L , TFs in Eqs. (16a) and (16b) change to:

$$ T_{1} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = \frac{{sC - g_{m} }}{{s\left( {C + C_{z} } \right) + \beta g_{m} + \frac{1}{{R_{L} }}}}, $$
(17a)
$$ T_{2} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \beta T_{1} \left( s \right), $$
(17b)

and hence, the pole \( \omega^{\prime }_{p} \) frequency in Eq. (14b) turns to be:

$$ \omega_{p}^{\prime } = \frac{{\beta g_{m} + \frac{1}{{R_{L} }}}}{{C + C_{z} }}. $$
(18)

The active and passive sensitivities of the \( \omega^{\prime }_{p} \) can be calculated as:

$$ S_{C}^{{\omega_{p}^{\prime } }} = - \frac{1}{{1 + \frac{{C_{z} }}{C}}},\quad S_{{C_{z} }}^{{\omega_{p}^{\prime } }} = - \frac{1}{{1 + \frac{C}{{C_{z} }}}},\quad S_{\beta }^{{\omega_{p}^{\prime } }} = S_{{g_{m} }}^{{\omega_{p}^{\prime } }} = \frac{1}{{1 + \frac{1}{{\beta g_{m} R_{L} }}}},\quad S_{{R_{L} }}^{{\omega_{p}^{\prime } }} = - \frac{1}{{1 + \beta g_{m} R_{L} }}. $$
(19)

Additionally, using (9) in (18), between \( \omega^{\prime }_{p} \) and ω p the following relationship can be calculated:

$$ \omega_{p}^{\prime } = \frac{1}{{R_{L} \left( {C + C_{z} } \right)}} + \frac{C}{{C + C_{z} }}\omega_{p} . $$
(20)

To illustrate the effect of the load, Eq. (20) was further investigated, as it is shown in Fig. 4. The calculation has been done for three different values of R L  = {1; 10; 100} kΩ while keeping the C and C z values identical with in the Sect. 5 listed once. From Fig. 4 it can be realized that for lower pole frequencies the effect of R L on the deviation of the pole frequency from its original value becomes dominant with respect to the parasitic effect (C z ). Hence, lower values of R L restrict the proper operation of the proposed APF at lower pole frequencies, where a phase shift of 90° must be obtained.

Fig. 4
figure 4

\( \omega^{\prime }_{p} \) versus ω p for different values of load

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5 Performance verifications

5.1 Simulation results

To verify the theoretical study, the behavior of the introduced VDIBA shown in Fig. 2 has been verified by SPICE simulations with DC power supply voltages equal to +V DD  = −V SS  = 0.9 V. In the design, transistors are modeled by the TSMC 0.18 μm level-7 CMOS process parameters (V THN = 0.3725 V, μN = 259.5304 cm2/(V·s), V THP = −0.3948 V, μP = 109.9762 cm2/(V·s), T OX = 4.1 nm) [2]. The aspect ratios of the OTA (M1–M4) and the IVB (M5 and M6) were chosen as W/L (M1–M4) = 18 μm/1.08 μm and W/L (M5, M6) = 54 μm/0.18 μm, respectively. Note that the W/L ratio of the transistors M5 and M6 should be selected sufficiently high to decrease the loading effect.

First of all, the performance of the VDIBA was tested by AC and DC analyses. The AC simulation results for both transconductance and voltage transfers of the VDIBA are shown in Fig. 5(a), (b), respectively. In the simulations the bias current was selected as I B  = 100 μA, which results in g m approximately equal to 600 μA/V with f −3dB frequency of 226.32 MHz. Subsequently, the obtained gain of the IVB voltage transfer shown in Fig. 5(b) is equal to β = 0.922 and its f −3dB frequency is found to be 51.93 GHz. Hence, the maximum operating frequency of the VDIBA is f max  = min{f β, f gm } ≈ 226.32 MHz. In addition, the z and w− terminal parasitic capacitance and resistances were found as C z  = 367 fF || R z  = 131.93 kΩ and R w- = 42.36 Ω, respectively. The DC characteristics such as plots of I z against both V v+ and V v−, when g m  = 600 μA/V and DC voltage characteristic of V w− against V z for the proposed VDIBA are shown in Fig. 6(a), (b), respectively. The maximum values of terminal voltages without producing significant distortion are approximately computed as ±200 mV for the OTA and −0.9 to +0.5 V for the IVB, respectively.

Fig. 5
figure 5

AC analysis of VDIBA in Fig. 2: (a) transconductance gain and (b) voltage gain versus frequency

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Fig. 6
figure 6

DC analysis of VDIBA in Fig. 2: (a) I z versus V v+ and V v−, (b) V w− versus V z

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In order to verify the workability of the proposed VM APF in Fig. 3, it has been further analyzed using the designed CMOS implementation of the VDIBA in SPICE software. Fig. 7(a), (b) show the ideal and simulated gain and phase responses illustrating the electronic tunability of the proposed filter. The pole frequency is varied for f 0 ≅ {1.07; 1.84; 3.31; 5.67; 9.44} MHz via the bias current I B  = {6; 11; 22; 45; 100} μA, respectively. In all simulations the value of the capacitor C has been selected as 9.6 pF. Note that the external capacitor C appears parallel with C gs6 parasitic capacitance of the transistor M6, which value is equal to 461 fF. Theoretically, therefore, its total value equal to C ≈ 10 pF should be taken into account. Hence, considering I B  = 100 μA (g m  = 600 μA/V), the 90° phase shift is at pole frequency f 0 ≅ 9.44 MHz, which is close to the ideal f 0 equal to 9.54 MHz. The obtained gains for the first and the second outputs are equal to 1.075 and 0.987, respectively. The small discrepancy between ideal and simulated gain results can be attributed to the non-ideal voltage gain β and the non-idealities of the active element used and hence in practice a precise design of the VDIBA should be considered to alleviate the non-ideal effects. Using the INOISE and ONOISE statements, the input and output noise behavior for both responses with respect to frequency have also been simulated, as it is shown in Fig. 8(a), (b). The equivalent input/output noises for the first and the second responses at operating frequency (f 0 ≅ 9.44 MHz) are found as 6.02/6.39 and 6.03/5.91 nV/√Hz, respectively.

Fig. 7
figure 7

Electronical tunability of the pole frequency by the bias current I B : (a) inverting, (b) non-inverting VM first-order all-pass filter responses

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Fig. 8
figure 8

Input and output noise variations for (a) V o1 and (b) V o2 versus frequency

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To illustrate the time-domain performance, transient analysis is performed to evaluate the voltage swing capability and phase errors of the filter as it is demonstrated in Fig. 9 while keeping the I B  = 100 μA (g m  = 600 μA/V) and C = 9.6 pF. Note that the output waveforms are close to the input one. The total harmonic distortion (THD) variations with respect to amplitudes of the applied sinusoidal input voltages at 9.44 MHz are shown in Fig. 10. An input with the amplitude of 100 mV yields THD values of 1.81 % and 1.86 % for the first and second output of the proposed filter, respectively. In addition, the +90° and −90° phase shifts in the first and the second outputs against the input at pole frequency 9.44 MHz are also illustrated in the Lissajous patterns shown in Fig. 11(a), (b), respectively. The total power dissipation of the circuit is found to be 10.5 mW.

Fig. 9
figure 9

Time-domain responses of the proposed all-pass filter at 9.44 MHz

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Fig. 10
figure 10

THD variation of the proposed all-pass filter for both responses against applied input voltage at 9.44 MHz

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Fig. 11
figure 11

Lissajous patterns showing (a) +90° phase shift of V o1 and (b) −90° phase shift of V o2 against input voltage at 9.44 MHz

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5.2 Measurement results

In order to confirm the theoretical results, the behavior of the proposed APF has also been verified by experimental measurements using network-spectrum analyzer Agilent 4395A, function generator Agilent 33521A, and four-channel oscilloscope Agilent DSOX2014A. In measurements the VDIBA was implemented based on the structure illustrated in Fig. 12 using readily available ICs OPA860 [27] by Texas Instruments. The DC power supply voltages were equal to ± 5 V and the resistor R ADJ (see [27]) was chosen as 270 Ω. The OPA860 contains the so-called ‘diamond’ transistor (DT) and fast voltage buffer (VB). In the input stage, in order to increase the linearity of collector current versus input voltage V d , the DT1 is complemented with degeneration resistor R G  ≫ 1/g mT , added in series to the emitter, where the g mT is the DT transconductance. Then the total transconductance decreases to the approximate value 1/R G [17]. The DT2 together with R E and R C represent the IVB with the gain of the amplifier calculated as β ≅ −R C /R E [17]. The input stage and the IVB are separated by the VB2.

Fig. 12
figure 12

VDIBA implementation by two Texas Instruments ICs OPA860

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The developed PCB (printed circuit board) is shown in Fig. 13. In all measurements the values of the resistors R E and R C have been chosen as 157 and 172 Ω to improve the gain of the IVB, respectively. In the proposed filter, the value of the capacitor C has been selected as 150 pF and value of the degeneration resistor R G was set to 1 kΩ. In this case the 90° phase shift is at f 0 ≅ 1 MHz and the results are shown in Fig. 14(a), (b), respectively. The time-domain responses of the measured APF are shown in Fig. 15 in which a sine-wave input of 500 mV amplitude and frequency of 1 MHz was applied to the filter. Subsequently, the Fourier spectrum of both output signals, showing a high selectivity for the applied signal frequency, is shown in Fig. 16(a), (b), respectively. The THDs at this frequency are found as 1.19 % and 1.11 % for the first and second output of the proposed filter, respectively.

Fig. 13
figure 13

The PCB prototype of the proposed all-pass filter based on VDIBA implementation from Fig. 12

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Fig. 14
figure 14

Measured gain and phase characteristics of the proposed all-pass filter: (a) T 1(s), (b) T 2(s)

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Fig. 15
figure 15

Measured time-domain responses of the proposed all-pass filter at 1 MHz

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Fig. 16
figure 16

Measured Fourier spectrum of the output signals: (a) V o1, (b) V o2

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From the simulation results and experimental measurements it can be seen that the final solution is in good agreement with the theory.

6 Applications of the proposed filter

In this section, the proposed VM APF in Fig. 3 is used as basic building block of more complex circuits. To the best of the authors’ knowledge, the given applications based on the new APF topology are also new and unpublished.

6.1 Second-order all-pass filter

To illustrate the utility of the proposed first-order APF, a new dual-output second-order all-pass filter is proposed by connecting in cascade two APFs in an open loop. The proposed circuit in Fig. 17 only employs two VDIBAs and two capacitors. Taking into account the non-ideal voltage gain β i (i = 1, 2) of VDIBAs, routine analysis gives the following voltage TFs:

$$ T_{3} \left( s \right) = \frac{{V_{o1} }}{{V_{in} }} = - \beta_{1} \frac{{s^{2} - s\left( {\frac{{g_{m1} }}{{C_{1} }} + \frac{{g_{m2} }}{{C_{2} }}} \right) + \frac{{g_{m1} g_{m2} }}{{C_{1} C_{2} }}}}{{s^{2} + s\left( {\frac{{\beta_{1} g_{m1} }}{{C_{1} }} + \frac{{\beta_{2} g_{m2} }}{{C_{2} }}} \right) + \frac{{\beta_{1} \beta_{2} g_{m1} g_{m2} }}{{C_{1} C_{2} }}}}, $$
(21a)
$$ T_{4} \left( s \right) = \frac{{V_{o2} }}{{V_{in} }} = - \beta_{2} T_{3} \left( s \right). $$
(21b)
Fig. 17
figure 17

Proposed resistorless dual-output VM second-order all-pass filter

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Hence, the designed second-order APF configuration can simultaneously provide phase shifting both between +π (at ω = 0) to −π (at ω = ∞) and 0 (at ω = 0) to −2π (at ω = ∞), at output terminals V o1 and V o2, respectively.

From Eqs. (21a) and (21b), the angular resonance frequency (ω0) and the quality factor (Q) are given by:

$$ \omega_{0} = \sqrt {\frac{{\beta_{1} \beta_{2} g_{m1} g_{m2} }}{{C_{1} C_{2} }}} ,\quad Q = \frac{{\sqrt {\beta_{1} \beta_{2} g_{m1} g_{m2} C_{1} C_{2} } }}{{\beta_{1} g_{m1} C_{2} + \beta_{2} g_{m2} C_{1} }}. $$
(22)

From Eq. (22) it is evident that the proposed filter circuit realizes only relatively low Q values and hence the new circuit is not suitable for synthesis of higher-order filters. It may be noted that the realized ω and Q values can be changed electronically through g m1 and g m2. However, considering equal transconductances of both VDIBAs (g m1 = g m2) and constant passive elements, the Q value of the circuit in Fig. 17 is fixed. Hence, this makes the circuit good for fixed Q applications [28]. It is thus to be concluded that the new proposed circuit provides useful active-C dual-output VM second-order all-pass filtering option with minimum components and low transistor count.

The SPICE verification of the new filter is given in Fig. 18, which show the ideal and simulated gain and phase responses for both outputs. In the simulations the values of capacitors C 1 = C 2 have been selected as 9.6 pF with consideration of parasitic capacitance of C gs6i  = 461 fF of the transistor M6 for ith VDIBA (i = 1, 2). Hence, theoretically their total value are equal to C 1 = C 2 ≈ 10 pF. Considering I B1 = I B2 = 100 μA (g m  = 600 μA/V), the theoretical angular resonant frequency is f 0 ≅ 9.51 MHz, whereas the simulated value is 9.32 MHz, which is 1.9 % in relative error. The THD variations with respect to amplitudes of the applied sinusoidal input voltages at 9.32 MHz are shown in Fig. 19. An input with the amplitude of 100 mV yields THD values of 1.75 % and 1.74 % for the first and second output of the proposed second-order all-pass filter, respectively.

Fig. 18
figure 18

Ideal and simulated gain and phase responses of the proposed VM second-order all-pass filter: (a) inverting (V o1), (b) non-inverting (V o2) responses

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Fig. 19
figure 19

THD variation of the proposed second-order all-pass filter for both responses against applied input voltage at 9.32 MHz

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6.2 Four-phase quadrature oscillator

As another application example, a VM four-phase quadrature oscillator is given by connecting the proposed APF in cascade to a lossy integrator in a closed loop. It is well-known that quadrature oscillators are important circuits for various communication applications, wherein there is a requirement of multiple sinusoids that are 90° phase shifted, e.g. in quadrature mixers and single-sideband modulators, or for measurement purposes in the vector generator or selective voltmeters. Here proposed new circuit shown in Fig. 20 consists of two VDIBAs, two capacitors, and a single resistor. Routine circuit analysis yields the following characteristic equation (CE):

$$ {\text{CE}}:\quad s^{2} C_{1} C_{2} R + s\left( {C_{1} + C_{2} g_{m1} R - 2C_{1} g_{m2} R} \right) + g_{m1} = 0. $$
(23)
Fig. 20
figure 20

Proposed VM four-phase quadrature oscillator

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For the start-up of oscillation, the roots of the CE should be in the right-hand plane, which indicates that the coefficient of ‘s’ term in Eq. (23) should be negative. Replacing s = jω in Eq. (23), the frequency of oscillation (FO) and the condition of oscillation (CO) can be evaluated as:

$$ {\text{FO}}:\quad \omega_{0} = \sqrt {\frac{{g_{m1} }}{{C_{1} C_{2} R}}} , $$
(24a)
$$ {\text{CO}}:\quad g_{m2} \ge \frac{1}{2}\left( {\frac{1}{R} + g_{m1} \frac{{C_{2} }}{{C_{1} }}} \right). $$
(24b)

From Eqs. (24a) and (24b), it is clear that the FO can be controlled by adjusting the value of the resistor R and/or by varying the control current I B1 of g m1.

Assuming that the used external capacitors and the transconductance of both VDIBAs are equal, i.e. C 1 = C 2 and g m1 = g m2, the relationship between four quadrature output voltages V o1, V o2, V o3, and V o4 can be expressed as:

$$ \frac{{V_{o1} }}{{V_{o2} }} = - j,\quad \frac{{V_{o2} }}{{V_{o3} }} = - j,\quad \frac{{V_{o1} }}{{V_{o4} }} = j, $$
(25)

ensuring the output voltages V o2–V o1, V o3–V o2, V o4–V o3, and V o1–V o4 to be quadrature (in Fig. 21 the phase differences are ϕ = 90°) and have equal amplitudes.

Fig. 21
figure 21

Phasor diagram of four-phase oscillator

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Assuming the non-ideal behavior of the active elements (β i ), the CE, FO, and the CO in Eqs. (23), (24a), and (24b) change to:

$${\rm CE}:\quad s^{2} C_{1} C_{2} R + s\left[ {C_{1} + \beta_{1} C_{2} g_{m1} R - \beta_{2} C_{1} g_{m2} R\left( {\beta_{1} + 1} \right)} \right] + \beta_{1} g_{m1} = 0, $$
(26a)
$${\rm FO}:\quad \omega_{0} = \sqrt {\frac{{\beta_{1} g_{m1} }}{{C_{1} C_{2} R}}}, $$
(26b)
$$ CO:\quad g_{m2} \ge \frac{1}{{\beta_{2} \left( {\beta_{1} + 1} \right)}}\left( {\frac{1}{R} + \beta_{1} g_{m1} \frac{{C_{2} }}{{C_{1} }}} \right). $$
(26c)

From Eqs. (26b) and (26c) it can be seen that the non-ideal behavior of the active elements affects both the frequency of oscillation and the condition of oscillation, however, CO can be satisfied by adjusting g m2 without affecting FO.

The proposed oscillator was designed with the following active parameters and the passive element values I B1 = 100 μA, R = 1650 Ω, and C 1 = C 2 = 9.6 pF, respectively, to obtain the sinusoidal output waveforms with the oscillation frequency of f 0 = ω0/2π ≅ 8.5 MHz. In practice, to ensure the startup (build-up) of oscillations and subsequently to satisfy the CO in Eq. (24b) the value of I B2 is chosen as 131 μA. The waveforms of the quadrature voltages are shown in Fig. 22. In addition, Fig. 23 shows the frequency spectrum of the output waveforms and the value of total harmonic distortion (THD) at all outputs are less than 2.25 %. The results are summarised in Table 2.

Fig. 22
figure 22

Simulated output waveforms of the proposed four-phase oscillator in Fig. 20

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Fig. 23
figure 23

Simulated frequency spectrums of outputs V o1 − V o4

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Table 2 THD analysis of the proposed VM four-phase quadrature oscillator
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7 Conclusions

This paper presents a new active element from the group of ‘voltage differencing’ devices, namely voltage differencing inverting buffered amplifier (VDIBA). The input part of the VDIBA is formed by the OTA, which is followed by the IVB with a gain of −1 that makes the introduced element attractive for resistorless and electronically controllable linear circuit design. As an application examples a new resistorless dual-output VM first-order all-pass filter, dual-output second-order all-pass filter, and four-phase quadrature oscillator circuits are proposed. SPICE simulation and experimental results confirm the feasibility of the proposed circuits.

8 Appendix

This section provides full nomenclature of the mentioned ABBs in Table 1 in alphabetical order.

C-(I)CDBA:

Current-controlled (inverting) current differencing buffered amplifier

CCCDTA:

Current controlled current differencing transconductance amplifier

CCCII+(−):

Plus-type (minus-type) second-generation current-controlled current conveyor

CC-VCIII−:

Minus-type current-controlled third-generation voltage conveyor

DDCC:

Differential difference current conveyor

DVCC+(−):

Plus-type (minus-type) differential voltage current conveyor

DV-VB:

Differential-voltage voltage buffer

FD-OpAmp:

Fully-differential operational amplifier

IUGA:

Inverting unity gain amplifier

IVB:

Inverting voltage buffer

MO-CCCCTA:

Multiple-output current controlled current conveyor transconductance amplifier

OTA:

Operational transconductance amplifier

UGDA:

Unity gain differential amplifier

UVC:

Universal voltage conveyor

VD-DIBA:

Voltage differencing-differential input buffered amplifier

VDIBA:

Voltage differencing inverting buffered amplifier