1 Introduction

In recent years, infrared focal plane arrays (IRFPAs) detector is a critical component in infrared imaging system, especially indium antimonide (InSb) IRFPAs detector with cut-off wavelength 5.5 µm at 77 K, is widely used in many military guiding system and civil applications (Benson et al. 2000; Hoffman et al. 2004). With the development of technology, there is a growing need for very large format IRFPAs to achieve simultaneously high resolution and wide field of view image data. A 4 × 4 mosaic of 2 k × 2 k HgCdTe SCAs with 67 million pixels were assembled for the VISTA telescope to survey the entire sky by Raytheon (Hoffman et al. 2006), and the Gigapixel IRFPAs for UVOIR Space Telescopes has been developed by the Space Telescope Science Institute, which has been up to 32 K × 32 K elements in size, and consists of sixteen fully independent 8 K × 8 K focal plane arrays (Ebbets et al. 2009). For InSb arrays, the large arrays with formats of 2 K × 2 K pixels have also been built (Hoffman et al. 2004), and 4 K × 4 K, 8 K × 8 K devices presently have being developed (Davis and Greiner 2011). But, due to the special structure of InSb IRFPAs, a very low yield limits its applicability, especially for large format. InSb IRFPAs is usually fabricated by flip chip bonding technology, typical hybrid FPA structure is showed as Fig. 1 (Rogalski 2004). That is, indium bumps are deposited on both detector array and Si ROIC dies, which are then hybridized together using a flip-chip bonder. Then the gap between bumps is backfilled with underfill. The electric contacts to the p-type layer in each pixel are made by indium bumps, and the electric connection to n-type layer is completed by the common negative electrode at the edge of the array (not shown in Fig. 1) (Zhang et al. 2013; Gektin et al. 1997). To reduce crosstalk, InSb chip is usually thinned to about 10 µm. Besides, InSb IRFPAs needs to be mounted and stored in room temperature (300 K), and operate at liquid nitrogen temperature (77 K). The temperature fluctuation is over 200 K, fracture usually occurs due to the mismatch of the coefficients of thermal expansion (CTE) of neighboring components, which has been a main problem, especially in large format InSb IRFPAs.

Fig. 1
figure 1

Hybrid FPA with independently optimized signal detection and readout (Rogalski 2004)

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The thermo-mechanical reliability of flip chip assemblies is usually assessed by numerical simulation technique in conjunction with experimental verification (Guo et al. 2013; Hegde et al. 2008; Bai et al. 2014). The finite element method is a powerful tool in optimization design of packaging. However, the simulations on traditional three dimensional (3-D) model of large format IRFPAs are very difficult, due to the complicated structure of IRFPAs detector and huge meshing number of large format IRFPAs. To solve the problem, the improved equivalent modeling method of “first split, then equivalently replace” is put forward in our previous paper (Zhang et al. 2013). The simulation results show the discontinuous stress extreme value appears in the area above the public negative electrode, which are consistent with the fracture photographs in experiment (Zhang et al. 2013, 2014; Meng et al. 2014), these results also indicate that most of the cracks in InSb IRFPAs originate in the area above the public negative electrode.

To study the reliability and reduce the thermal stress in the crack originating area above the public electrode, basing on the improved equivalent modeling method, a 32 × 32 array is adopted to replace the real 128 × 128 array, a 3-D structural model of large format hybrid InSb IRFPAs is established in this article. We investigated the influences of electrode materials, electrode structure size and layout on the thermal stress and its distribution in large format InSb IRFPAs. All these lay a good foundation for structural design and optimization for large format InSb IRFPAs detector.

2 Modeling of InSb IRFPAs and material characterization

2.1 Finite element model

The commercial FEA software ANSYS is used for both finite element modeling and analysis. Basing on the proposed improve equivalent modeling method of “first split, then equivalent” (Zhang et al. 2013), a 128 × 128 format IRFPAs is equivalent replaced with a small 32 × 32 format IRFPAs, and three dimensional (3-D) InSb IRFPAs model is shown in Fig. 2. Using the geometrical symmetry, only one-eighth of the actual structure is modeled here. The model is divided into two parts along the plane S–P–Q: the inner part is photosensitive element arrays, and the outer part includes public negative electrode and several rows/columns photosensitive elements array for testing or protecting. The structure of InSb IRFPAs comprises of five different materials, which are InSb chip, public negative electrode, indium bump arrays, underfill and Si ROIC from top to bottom. The enlarge side view along the O′–P–O plane near the electrode and the division is shown in Fig. 2b.

Fig. 2
figure 2

a Finite element model of InSb IRFPAs detector, and b Enlarge side view along the O′–P–O plane near the electrode and the division

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In this model, the thicknesses of InSb chip and Si ROIC substrate are 10 and 300 µm, respectively. The indium bump diameter is 20 with 50 µm pitch, the indium bump arrays and underfill has the interlacing distribution, with the same thickness of 10 µm. And the public negative electrode has thickness range of 2–6 µm. Since InSb IRFPAs flip chip process is completed at 370 K, the materials in IRFPAs are assumed to be stress free at this temperature. The assembly is uniformly cooled down from 370 to 77 K, and no thermal gradient and no transient heat transfer are considered in simulation. Due to the one-eighth of the actual structure, the symmetry boundary conditions are used on the symmetric O′–P–O and O′–Q–O planes, and single node constraint on the bottom surface center point of the package is also applied for avoiding movement. Meshing the whole model free, and a locally refine mesh pattern is maintained for accurate results.

2.2 Material parameters

Indium (In) is commonly used as an attachment material in packaging structures intended for operation at extreme cold-temperature environment applications. For its high homologous temperatures, e.g., 0.70 Tm (in K) at room temperature (300 K), when the thermally activated strains impose on the attachment of indium, due to CTE mismatch between packaging materials, it gives rise to a complex deformation behavior. This deformation behavior is associated with the irreversible, temperature and rate (or time) dependent inelastic characteristics, are known to be viscoplastic, which is described with Anand model (Chang and McCluskey 2009). Based on the compression test data, the material parameters of indium bump in Anand’s model were acquired to simulate the steady-state viscoplastic behavior and stress/strain responses by Chang research group in 2009 (Chang and McCluskey 2009). Here, indium bump is built using VISCO107 element type, and the other materials are built using SOLID95 element type.

Underfill is usually described as classical constant elastic material, or described as viscoelastic material around glass transition temperature, once completely cured, it shows obvious temperature dependent elasticity, the temperature dependent CTEs of underfill were measured using a thermal mechanical analyzer (TMA) operated in expansion mode by He research group (He et al. 2000). For InSb IRFPAs, the service conditions require functions at cryogenic temperatures, even below the temperature of liquid nitrogen (77 K). The hybrid detector often undergoes a wide temperatures range from room temperature to cryogenic temperature. During this wide temperature change, not only the mechanical properties of underfill shows obvious temperature dependent elasticity, but the CTEs of other materials are not constant values. So, the temperature-dependent properties of the materials have to be employed, which are given in Table 1 (Chang and McCluskey 2009; He et al. 2000; Cheng et al. 2012; Hahn 1970; White and Collins 1972). All the other employed parameters are listed in Table 2, where µ is the Poisson’s ratio, α is the linear CTEs of underfill.

3 Results and discussion

3.1 Effects of different electrode materials on thermal stress

Copper (Cu) and Gold (Au) have excellent conductivity, widely used as the electrode materials in many flip-chip devices. Indium (In) is often used as an electrical connection material in packaging structures, due to its greater ductility and excellent conductivity at extreme cold-temperature environment. To learn the influences of electrode material parameters on the reliability in detector, three different materials Cu, Au and In are respectively adopted as the public negative electrode, the thermal stresses appearing in detector are studied. Under thermal shock, the Von Mises stress maximal values of all materials at three different electrode materials Cu, Au and indium are depicted in Fig. 3, here the electrode thickness keeps 4 μm.

Fig. 3
figure 3

Comparison of Von Mises stress maximal values of all materials at different selected electrode materials Cu, Au and In

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From these results, it is clear that the stresses in underfill, indium bump arrays and Si ROIC are approximately constant or have very little difference at three different electrode materials. However, the stresses appearing in InSb chip and public negative electrode don’t keep unchanged, but have significant difference, especially between indium and the other two materials as the electrode. Specifically, when selecting respectively Au and Cu as the electrode, the maximal stresses in InSb chip are 503 and 512 Mpa; while selecting indium as the electrode, the maximal stress in InSb chip is up to 918 MPa, which increases nearly 81%. Conversely, selecting In as the electrode, the maximal stress in public negative electrode is 2.82 MPa, which much smaller than 242 and 323 MPa respectively for Au and Cu as the electrode. Apparently, the three materials have different material parameters in Tables 1 and 2, but the similar stress change trend appears for Au and Cu electrode, the opposite stress change trend for indium as the electrode. Through comparing and analysis, it can be found that Au and Cu have similar CTEs in Table 1, however In has much larger CTEs than the other two electrode materials. These results show that the CTEs are the main electrode material parameter to influence the thermal stress appearing in InSb chip and the electrode. Considering the cracks usually happen in thinner InSb Chip, although In has excellent malleability, ductility at extreme cold-temperature environment, it is not a good selection for the public electrode material. Due to its larger CTEs, the accumulated thermal stress in indium electrode is shifted to InSb chip through indium electrode distortion, which makes the stress in indium electrode become smaller and the stress in InSb chip become larger, the stress concentration in InSb chip makes it easier to fracture. Although there are similar stress change trends for Au and Cu electrode due to their similar CTEs, considering that copper is easily to be oxidized and Au has better ductility, malleability than Cu in extreme cold-temperature environment. To improve the stability and reliability of IRFPAs, Au is usually adopted to be the public electrode material in InSb IRFPAs.

Table 1 The CTEs of all the employed materials (10−6 K−1)
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Table 2 The liner elastic material parameters
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3.2 Effects of different electrode thickness on thermal stress

To learn the effects of the electrode structure size on the reliability of InSb detector, the thermal stress in detector are simulated through changing the electrode thickness from 2 to 6 μm for a fixed electrode width. Considering its better ductility and stability, Au material is used as electrode in the following simulation. The simulated stress change rules are given in Fig. 4. To compare the simulation results, the model meshing, constraints and loading in any model are same. Apparently, as the electrode thickness increases from 2 to 6 µm, the stress maximum in Si ROIC, underfill and indium bump almost keeps at 350, 280, 2.8 MPa respectively, and almost does not vary with increasing electrode thickness. However, the maximal Von Mises stresses appearing in InSb chip and the electrode both decline gradually with the increasing electrode thickness, which have the similar varying tendency. The only difference is that the maximal stress in electrode reduces more quickly, when the electrode thickness changes from 3 to 4 μm. It is worth noticing that the maximal Von Mises stress appearing in InSb chip is always much larger than that in other materials at different electrode thickness. This phenomenon is also consisted with that in Fig. 3, which originates from stress concentration in thinned thickness (10 μm) Insb chip. Even though underfill has the same 10 μm thickness, the maximal stress in underfill is also smaller than that in InSb chip because underfill has larger CTEs than InSb chip. From Fig. 4, it can be included that the thermal stress in InSb chip and the electrode are obviously affected by the electrode structure thickness. The larger electrode thickness, the stresses in InSb and electrode are smaller. From Fig. 2, it can been seen that the public electrode locates in top of underfill between InSb chip and Si, and indium bumps are designed under the electrode to obtain electrical interconnections. Increasing the electrode thickness, accordingly the height of indium bumps under the electrode need to be decreased, but too small indium bumps will also bring the reliability and technology problems of solder joints. Considering the stress in electrode reduces more quickly during the electrode thickness changing from 3 to 4 μm, the electrode thickness is selected to be 4 μm in the following discussion.

Fig. 4
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Maximum Von Mises stress of materials with different electrode thickness

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3.3 Effects of the electrode layout design on thermal stress

In InSb IRFPAs, the common negative electrode is arranged at the edge of the detector, which is attached to bottom surface of InSb chip. To obtain better electrical connection and bondability between p-type layer of InSb chip and the common electrode, one small part are often designed to insert into active p-type layer of InSb, as shown in Fig. 2b. The stress distribution appearing in InSb chip is illustrated in Fig. 5a. Apparently, the stress above the electrode area is much larger than other outer regions, especially above the overlap region of indium bumps and the embedded part of common electrode, there are discontinuous distribution of stress concentration. The position layout between the electrode and indium bumps below is given detailedly in Fig. 5b, it can be seen that the left column indium bumps have overlapped the embedded part of public electrode.

Fig. 5
figure 5

a Stress distribution in InSb chip with electrode layout (b); c Stress distribution in InSb chip with electrode layout (d)

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It can be deduced that the discontinuous distribution of stress concentration is attributed to two aspects, one is the area of InSb chip above the embedded part of Au electrode is much thinner, its anti-deformation intensity in the overlap region changes smaller, another is that the indium bumps has larger CTEs and greater ductility than underfill, the accumulated thermal stress in indium electrode is shifted to InSb chip through indium electrode distortion. When the inserted part of common electrode is moved to the position between two columns indium bumps, as shown in Fig. 5d, the stress distribution of InSb chip is given in Fig. 5c. Comparing two stress simulation results, it can be found that the maximum Von Mises stress of InSb almost have no change, but the stress distribution above the electrode area is obvious different. In Fig. 5c, the stress concentration phenomenon above the electrode area become much smaller, and no obvious discontinuous distribution of extreme values. Obviously, avoiding the overlap between indium bumps and the inseted part of electrode is good to decrease the stress of InSb chip above the embedded part of electrode area and reduce the fracture originating from the electrode area.

4 Conclusions

Basing on improved finite element equivalent modeling method, a 128 × 128 format IRFPAs is equivalent replaced with a small 32 × 32 format IRFPAs, three dimensional InSb IRFPAs structure model is built. At the same time, taking account of the temperature dependence of coefficient of thermal expansion, the effects of electrode materials, structure size and layout on the thermal stress and its distribution in large format InSb IRFPAs are analyzed. Simulation results show that the coefficient of thermal expansion and structure size of common electrode material obviously influence the thermal stress appearing in InSb chip and common electrode. Combining with material and structure parameters, these simulation results are beneficial to optimize the design of InSb IRFPAs. And adjusting the electrode layout and avoiding the overlap between indium bumps and the inserted part of common electrode can effectively reduce the stress concentration in the electrode region. These simulation results are favorable to more comprehensive understanding of the influences of electrode material, structure size and layout on the reliability of InSb IRFPAs, and improving the production ratio.