1 Introduction

Fuzzy logic [1] has wide applications in industry and in decision-making systems [2, 3]. Many of them are based on hardware implementation of fuzzy systems [4–7]. Recent years, the number of applications of fuzzy systems developed on field programmable gate array (FPGA) has been increased [7–13]. FPGAs are programmable semiconductor devices that are based around a matrix of configurable logic blocks connected through programmable interconnects [14]. FPGAs can be easily reprogrammed to the desired application or functionality requirements [10, 14–20]. This paper presents the design in one scheme of FPGA of several parametric families of conjunctors and t-norms built from simple basic t-norms that can be used in efficient FPGA implementation of reconfigurable fuzzy systems. Below is a short survey of the works on parameterized and generalized fuzzy operations and their FPGA implementation.

The generalized operations of fuzzy logic-like non-associative or non-commutative conjunctions (conjunctors) and parameterized or reconfigurable t-norms give possibility to build sophisticated and more flexible fuzzy models in comparison with traditional fuzzy models based on basic t-norms [21–24]. The most general extension of conjunction operation T from binary to fuzzy setting requires the monotonicity of this operation and the fulfillment of boundary conditions [25]: T(0,0) = T(1,0) = T(0,1) = 0, T(1,1) = 1. The most important from the mathematical point of view fuzzy extension of conjunction operation is a t-norm [26, 27] satisfying also the associativity and commutativity properties and the boundary condition T(1,x) = x for all x in [0, 1]. But the hardware implementation of the most popular parametric families of (associative) t-norms consumes sufficiently many resources due to their use in their definition of the multiplication, division, exponentiation operations, or logarithm function. As it was noted in [23, 24], the associativity property often does not require from the fuzzy conjunction operations used in applied fuzzy models with two inputs. It gives rise to build more simple non-associative parametric conjunction operations suitable for efficient hardware implementation. The commutativity property of conjunctions also may be not necessary when the position of arguments in fuzzy models is fixed. For these reasons, the study of non-associative and non-commutative conjunctions (conjunctors) has the practical interest in fuzzy modeling. Another point of interest in building of fuzzy models is to consider parameterized fuzzy operations that can be tuned to achieve the better performance of these models [23, 24]. The tuning of membership functions in fuzzy models can lead to fuzzy sets that loss the expert knowledge presented by fuzzy sets before the tuning. In such cases, the tuning of parameters of fuzzy operations instead of (or additionally to) tuning of membership functions can help to preserve expert knowledge presented in fuzzy sets. The main parametric families of t-norms and t-conorms are described in [26]. In [23, 24], the simple parametric classes of fuzzy conjunctors suitable for tuning in fuzzy models are introduced. In [28], it compared the influence of fuzzy control systems on the tuning parameters of operations versus the parameters of membership functions. The paper [29] discussed the methods of information aggregation in intelligent systems using generalized operators. The application of generalized operations of fuzzy logic in inference engines is discussed in [30]. Zhang et al. [31] studied a fuzzy logic system based on parametric family of Schweizer–Sklar t-norm. Different aggregation functions including generalized conjunctions are considered in [32]. Alcalá-Fdez [33] used parameterized operations for achieving better co-operation among fuzzy rules. The methods of construction of parametric classes of digital conjunctors based on generator functions using simple operations like addition, subtraction, minimum, maximum, and comparison suitable for efficient hardware implementation are introduced in [34–36]. The digital conjunctors considered in these works are particular cases of discrete fuzzy conjunctors [37, 38] defined on a set of integer numbers L = {0, 1,…, n}. In [39], it proposed the method of the monotone sum of basic t-norms for the construction of simple parametric conjunctors for hardware implementation. The paper [40] presents modular neuro-fuzzy systems based on parametric classes of generalized conjunction and disjunction operations. A survey of weak connectives and the problem of the preservation of their properties in some aggregation functions are considered in [41]. Dependencies between fuzzy conjunctions and implications are studied in [42, 43]. Application of parametric t-norms and various fuzzy operations in neural networks is considered in [44, 45]. t-norms and t-conorms on the sets of multisets or strings to achieve strict monotonicity of these operations for finite scales are considered in [46]. In [47], the Hamacher parameterized t-norms are used to induce the priority weight in prioritized weighted aggregation in multicriteria decision making. The authors of [48] used parametric conjunctors in a fuzzy rule-based control system. The paper [49] used parameterized uninorm and absorbing norm for logic design. The tuning of parameterized conjunctors is used in the optimization of the type-l fuzzy neural system for slip control of a quarter car model [50], for trajectory tracking of a 2-DOF helicopter system using neuro-fuzzy system [51], and for optimization of an interval type-2 fuzzy neural system [52]. The paper [53] studied a general class of increasing binary operations including conjunctions. The application of generalized norms in digital/analog scheme's synthesis and analysis is discussed in [54]. The parameterized operations over t-norms are considered in [55]. Adaptive conjunction operations are used in [56] in linguistic fuzzy modeling. The paper [57] discussed the relationship between monotone and ordinal sums of basic t-norms and proposed the new methodologies for generation of parametric digital t-norms suitable for efficient hardware implementation. The parametric inverse Hamacher operations are discussed in [58]. The authors of [59] proposed a generalized fuzzy similarity measure that can be used in the construction of fuzzy systems. The paper [60] developed multivalued automaton based on generalized fuzzy operations for control of mobile agents and the locomotion model. The application of the generalized logic operations in fuzzy predicate systems for clustering is discussed in [61]. Preservation of fuzzy relation properties based on generalized fuzzy conjunctions and disjunctions during aggregation process is studied in [62]. FPGA implementation of different parametric families of digital conjunctors based on generator functions is considered in [63–65]. FPGA implementation of diverse fuzzy t-norms and t-conorms is considered in [66]. The papers [67, 68] proposed the methods of FPGA implementation of p-monotone sum and (p, 1 − p) monotone sum of basic t-norms. FPGA implementation of Sugeno and Mamdani fuzzy inference systems with parametric families of conjunctors obtained by monotone sum of basic t-norms is discussed in [69, 70].

This work is based on the theoretical results from [57]. The main contribution of the paper is the following. The paper proposes the method of unified presentation of the p-monotone sum, the simplified versions of the ordinal sum of t-norms and t-subnorms, and the method of extension of t-norms by the drastic t-norm. Such unification gives possibility to join several methods of construction of parametric digital conjunctors and t-norms in one scheme with the efficient FPGA implementation. The logic schemes of the proposed design are presented, and the comparative analysis of the latency time and the resources used for the implementation is given.

The paper has the following structure. Section 2 gives the definitions of digital conjunctors and t-norms. Section 3 discusses the methods of construction of parametric conjunctors and t-norms implemented further on FPGA. Section 4 presents the design on FPGA of parametric families of conjunctors and t-norms. Section 5 contains the comparative analysis of the latency time and the resources used for the implementation. The last section contains conclusions.

2 Digital Conjunctors and t-Norms

Consider the set L = {0, 1,…, n}, n ≥ 1 of digital representations of truth (degree, membership, etc.) values. If m-bits integer representation is used, then we have n ≤ 2m − 1. We will consider conjunctors and t-norms defined on the set L, and the maximal value of this set I = n will correspond to the value 1 in traditional set of truth values [0, 1]. Consider the function T:L × L → L with the following possible properties on L:

$$\text{A1}\text{.}\;T(x,{\mathbf{I}}) \, = \, x, \, T({\mathbf{I}}, \, y) \, = \, y,\quad \quad \left( {\text{boundary conditions}} \right)$$
$$\text{A2}\text{.}\;T\left( {x, \, y} \right) \le T\left( {u, \, v} \right),{\text{ if }}x \le u, \, y \le v.\quad \quad \left( {\text{monotonicity}} \right)$$
$$\text{A3}\text{.}\;T\left( {x, \, y} \right) \, = \, T\left( {y, \, x} \right),\quad \quad \left( {\text{commutativity}} \right)$$
$$\text{A4}\text{.}\;T\left( {x, \, T\left( {y, \, z} \right)} \right) \, = \, T\left( {T\left( {x, \, y} \right),z} \right).\quad \quad \left( {\text{associativity}} \right)$$
$$\text{A5}\text{.}\;T(x, \, y) \le { \hbox{min} }\left( {x, \, y} \right).\quad \quad \left( {\text{range condition}} \right)$$

This function will be called a conjunctor, a commutative conjunctor, a t-norm, or a t-subnorm, if the following properties are fulfilled for all x, y, z ∈ L, correspondingly {A1, A2}, {A1–A3}, {A1–A4}, and {A2–A5}. See [26, 27, 37, 38, 57] for properties of these operations on [0, 1], on discrete set and on L = {0, 1,…, n}. For any conjunctor from A1, A2, it follows for all x, y ∈ L:

$$T(x,0) \, = 0, \quad T(0, \, y) \, = 0.$$

Generally, we can consider conjunctors and t-norms defined on a set L containing only one element L = {0}. In this case, we have I = 0. Below there are the simplest t-norms that will be considered as basic t-norms in the generation of digital fuzzy parametric conjunctors and t-norms:

$$T_{M} \left( {x,y} \right) \, = { \hbox{min} }\left\{ {x,y} \right\},\quad \quad \left( {\text{Minimum}} \right)$$
$$T_{N} \left( {x,y} \right) = \left\{ {\begin{array}{*{20}l} {\hbox{min} \left( {x,y} \right),} \hfill & {{\text{if}}\;x + y > {\mathbf{I}}} \hfill \\ {0,} \hfill & {\text{otherwise}} \hfill \\ \end{array} \quad } \right.\quad \left( {\text{Nilpotent minimum}} \right)$$
$$T_{L} \left( {x,y} \right) = { \hbox{max} }\left\{ {x + y \, - {\mathbf{I}}, \, 0} \right\},\quad \quad \left( {{\text{Lukasiewicz t}}\text{-}{\text{norm}}} \right)$$
$$T_{D} \left( {x,y} \right) = \left\{ {\begin{array}{*{20}l} {x,} \hfill & {{\text{if}} \;y = {\mathbf{I}}} \hfill \\ {y,} \hfill & {{\text{if}} \;x = {\mathbf{I}}} \hfill \\ {0,} \hfill & {{\text{if}} \;x,y < {\mathbf{I}}} \hfill \\ \end{array} } \right..\quad \quad \left( {\text{Drastic product}} \right)$$

These t-norms have efficient hardware implementation, because their definition uses very simple mathematical operations. Figure 1 depicts the shapes of these t-norms defined on \(L = \{ 0,\;1, . . . , 31\}.\).

Fig. 1
figure 1

Simplest t-norms: a Drastic, b Lukasiewicz t-norm, c Nilpotent minimum, d Minimum

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In some cases, we will also consider a basic conjunctor as the following operation:

$$T_{P} \left( {x,y} \right) \, = \, x*y,\quad \quad \left( {\text{product}} \right)$$

where the operation * is a normalized product of x and y and taking values in L:

$$T_{P} \left( {x, \, y} \right) \, = \, xy/{\mathbf{I}}.$$

This operation has a little bit more complicated hardware implementation on the set of integer values L than other basic t-norms; moreover, this digitalized version of the product t-norm will be not associative and hence will be not a t-norm but only a conjunctor. It can be used as a digital approximation of the product t-norm.

Denote T 1 ≤ T 2 if T 1 (x,y) ≤ T 2 (x,y) for all x,y from L. For any conjunctor T and for considered above t-norms, we have

$$T_{D} \le T \le T_{M}, \quad T_{D} \le T_{L} \le T_{N} \le T_{M}, \quad T_{D} \le T_{L} \le T_{P} \le T_{M} .$$

From T ≤ T M , it follows that any t-norm is a t-subnorm.

3 Construction of Parametric Conjunctors and t-Norms

Let L = {0, 1,…, n} be a set of integer values and a, b ∊ L, be two integers such that a ≤ b. A sequence of consecutive numbers changing from a till b will be called an interval and denoted as [a, b]. Let p ∈ {0, 1,…, n} is an integer parameter. When p ≥ 1 divide L on 2 intervals: X 1 = [0, p − 1], X 2 = [p, n], and all domain L × L divide on 4 sectors: D 1 = X 1 × X 1, D 2 = X 2 × X 1, D 3 = X 1 × X 2, D 4 = X 2 × X 2, see Fig. 2 for n = 15. When p = 0 we have only one interval X 2 = [0, n] and one sector D 4 = X 2 × X 2 = L × L coinciding with all domain L × L. In this case, all other sectors D 1, D 2, and D 3 will be empty.

Fig. 2
figure 2

a Partition of L × L on segments defined by parameter p. b Method 4T of constructing conjunctors

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Below we consider methods of construction and hardware implementation of conjunctors and t-norms on L × L by means of basic t-norms T i associated with sectors D i , i ∈ {1, 2, 3, 4}. These methods are particular cases of the general methods discussed in [26, 27, 37, 38, 57]. To simplify references on these methods, we give short names for them.

3.1 Method 4T

This method can use four different t-norms. Let T i , i ∈ {1, 2, 3, 4} be t-norms defined on L = {0,1,…, n}, such that

$$T_{ 1} \le T_{ 2} \le T_{ 4} , \quad T_{ 1} \le T_{ 3} \le T_{ 4} .$$

Then, the function T: L × L → L defined by

$$T\left( {x,y} \right) = \left\{ {\begin{array}{*{20}l} {T_{1} \left( {x,y} \right),} \hfill & {\quad {\text{if}}\;x,y < p} \hfill \\ {T_{2} \left( {x,y} \right),} \hfill & {\quad {\text{if}}\;y < p,p \le x,} \hfill \\ {T_{3} \left( {x,y} \right),} \hfill & {\quad {\text{if}}\;x < p,p \le y} \hfill \\ {T_{4} \left( {x,y} \right),} \hfill & {\quad {\text{if}}\;p \le x,y} \hfill \\ \end{array} } \right.,$$

is a conjunctor, where p ∈ {0, 1,…, n} is a parameter. Figure 2b shows t-norms used in segments D 1 − D 4 of L × L in construction of conjunctor T(x,y) by method 4T. Conjunctor T(x,y) is commutative if all T i are commutative and T 2 = T 3. Note that when p = 0, the conjunctor T equals to T 4 defined on all domain L × L. On the other hand, when p = n, the resulting conjunctor T equals to T 1 because T used only border values of t-norms T 2, T 3, and T 4 defined by A1 condition and hence coinciding with the corresponding values of T 1.

The method 4T of generation of conjunctors is based on the p-monotone sum of t-norms [39, 57]. We denote here this method for short as 4T instead of (T 1, T 2 , T 3, T 4) used in [57] and we use notation 4Tc for commutative conjunctors. In Table 1 and Fig. 6, this method has types 0 and 1 for non-commutative conjunctors and types 2 and 3 for commutative conjunctors. Similarly, below, instead of the notations (T, M, M, M), (D, D, D, T), (T, M, M, T), used in [57] where M denotes T M and D denotes T D we use notations T3M, 3DT, and TMMT, respectively.

Table 1 Classification of conjunctors and t-norms by type configuration parameter
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3.2 Method 3DT

Suppose T D is defined on L = {0, 1,…, n}, p ∈ {0, 1,…, n} and t-norm T 4 is defined on L 4 = {0, 1,…, n −p}, then for all x, y ∈ L = {0, 1,…, n} the following function is a t-norm on L:

$$T(x,y) = \left\{ {\begin{array}{*{20}l} {p + T_{4} \left( {x - p,y - p} \right), } \hfill & {{\text{if}} \quad p \le x,y} \hfill \\ {T_{D} \left( {x,y} \right), } \hfill & {\text{otherwise}} \hfill \\ \end{array} } \right..$$

The method 3DT is based on Proposition 3 from [57]. Figure 3a depicts the location of basic t-norms used in this method in segments of L × L. In Table 1 and Fig. 6, this method is referred to as the method of type 4. See Table 10 and Fig. 10 for examples.

Fig. 3
figure 3

a 3DT and b TMMT (ordinal sum) methods of constructing t-norms

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3.3 Method TMMT

Let p ∈ {0, 1,…, n}, T 1 be a t-norm on L 1 = {0, 1,…, p} and T 4 be a t-norm on L 4 = {0, 1,…, n − p}, then the following function is a t-norm on L = {0, 1,…, n}:

$$T(x,y) = \left\{ {\begin{array}{*{20}l} {T_{1} \left( {x,y} \right) } \hfill & {{\text{if}}\; x,y < p} \hfill \\ {p + T_{4} \left( {x - p,y - p} \right) } \hfill & {{\text{if}} \;p \le x,y} \hfill \\ {{ \hbox{min} }(x,y)} \hfill & {\text{otherwise}} \hfill \\ \end{array} } \right..$$

This method is based on ordinal sum of t-norms [26, 37, 38, 57]. Figure 3b depicts the location of basic t-norms used in this method in segments of L × L. In Table 1 and Fig. 6, this method has the type 6. See Table 10 and Fig. 10 for examples.

3.4 Method T3Ms

Suppose p ∈ {0, 1,…, n} and i 1 ∈ {0, 1,…, 2n} are parameters and T 1 is a t-norm defined on [0, i 1]. The following function defined on L = {0, 1,…, n} is a t-norm:

$$T\left( {x,y} \right) = \left\{ {\begin{array}{*{20}l} {T_{1} \left( {x,y} \right) } \hfill & {{\text{if }}x,y < { \hbox{min} }(i_{1} ,p)} \hfill \\ {{ \hbox{min} }\left( {x,y} \right) } \hfill & {\text{otherwise}} \hfill \\ \end{array} } \right..$$

Method T3Ms is based on the ordinal sum of t-subnorms [27] and also referred to as a method of constructing t-norms with shifted domains, see Proposition 6 in [57]. Letter “s” in the name of the method T3Ms denotes “shifted.” Figure 4 depicts the location of basic t-norms used in this method in segments of L × L when i 1 > p. When i 1 < p, this method can be obtained from the method TMMT when the parameter p is replaced by parameter i 1 and instead of T 4 it is used T M . See Table 10 and Fig. 10 for examples of such t-norms used as a part of other types of t-norms 3DTs and TMMTs.

Fig. 4
figure 4

Method T3Ms. t-Norm T 1 is defined on [0, i 1] and it is “visible” only in “window” [0, p − 1] × [0, p − 1]

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Note that the domains of t-norms T 1 used in monotone sum of t-norms (method 4T), in ordinal sum of t-norms (method TMMT) and in T3Ms method generally are different. In the monotone sum of t-norms, T 1 is defined on L = {0, 1,…, n}. In the ordinal sum of t-norms, T 1 is defined on “window” L 1 = [0, p] × [0, p], where p ∈ {0, 1,…, n}. In T3Ms method, the domain of t-norm T 1 generally differs from the domains of both of these methods and can be defined on any interval [0, i 1]. From this point of view, the domain of T 1 in T3Ms method is “shifted” with respect to the domains of T 1 in the first two methods. For simplicity of hardware implementation, we selected i 1 ∈ {0, 1,…, 2n}.

In Table 1 and Fig. 6, this method is used as a part of the methods 3DTs and TMMTs with types 5 and 7 correspondingly when t-norms T 1 and T 4 have shifted domains. These methods are defined as follows.

3.5 Method 3DTs

Suppose T D is defined on L = {0, 1,…, n}, p ∈ {0, 1,…, n}, i 4 ∈ {0, 1,…, 2n} and t-norm T 4 is defined on L 4 = {0, 1,…, i 4}. Then for all x, y ∈ L = {0,…, n}, the following function is a t-norm on L:

$$T(x,y) = \left\{ {\begin{array}{*{20}l} {p + T_{4} \left( {x - p,y - p} \right) } \hfill & {{\text{if}} \;p \le x,y < \hbox{min} \left( {n,p + i_{4} } \right)} \hfill \\ {{ \hbox{min} }\left( {x,y} \right) } \hfill & {{\text{if}} \;p + i_{4} \le x,y \le n} \hfill \\ {T_{D} \left( {x,y} \right) } \hfill & {\text{otherwise}} \hfill \\ \end{array} } \right..$$

Figure 5 depicts the location of basic t-norms used in this method. See Table 10 and Fig. 10 for examples.

Fig. 5
figure 5

Method 3DTs. t-Norm T 4 is defined on [0, i 4], where i 4 = 12. It is “visible” only in window [p, n − 1] × [p, n − 1] =  [6, 14] × [6, 14]

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3.6 Method TMMTs

Let p ∈ {0, 1,…, n}, i 1 ∈ {0, 1,…, 2n}, i 4 ∈ {0, 1,…, 2n}, t-norm T 1 be a t-norm on L 1 = {0, 1,…, i 1} and T 4 be a t-norm on L 4 = {0, 1,…, i 4}. Then, the following function is a t-norm on L = {0, 1, 2,…, n}:

$$T(x,y) = \left\{ {\begin{array}{*{20}l} {T_{1} \left( {x,y} \right),} \hfill & {{\text{if}} \;x,y < { \hbox{min} }(i_{1} ,p)} \hfill \\ {p + T_{4} \left( {x - p,y - p} \right), } \hfill & {{\text{if }}\;p \le x,y < { \hbox{min} }(p + i_{4} ,n)} \hfill \\ {{ \hbox{min} }(x,y),} \hfill & {\text{otherwise}} \hfill \\ \end{array} } \right..$$

Note that when i 1 < p, the parameter p is replaced by parameter i 1. See Table 10 and Fig. 10 for examples.

Table 1 gives the type codes of the methods considered above and Fig. 6 depicts the flow diagram of the process of selection of the methods of construction of conjunctors and t-norms based on these type codes in FPGA implementation.

Fig. 6
figure 6

The flow diagram of the process of selection of operations in FPGA implementation

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The considered above unification of the simplified versions of different methods discussed in [57] gives the basis for the generation of a variety of parametric families of digital t-norms and conjunctors that have efficient implementation in hardware when we use the simplest t-norms as basic modules. Generally, as in the continuous case [26, 27], the ordinal sum can be applied to more than two summands. Another way to extend the number of diagonal sections is to apply recursively ordinal sum with two summands several times.

4 Hardware Design of Parametric Operations

In this section, we discuss the design and the implementation on a FPGA of parametric digital conjunctors and t-norms considered in the previous section. First, we show the logic schemes of the implementation of basic t-norms, and after that it will show the methodology to build parametric conjunctors and t-norms in one building block.

4.1 Basic t-Norms Implementation

Figure 7 depicts the schemes of basic t-norms (digital Product is a conjunctor): (a) Drastic, (b) Lukasiewicz, (c) Product, (d) Nilpotent, and (e) Minimum that have one more input unlike the implementation of these t-norms in [47, 53] (with exception of Minimum). The I input is used for specifying parametric domain of a t-norm, where if one t-norm has m-bits representation, the values to I input belong to [0, 2m + 1 − 1] interval. It also can be observed that for these implementations, we used only simple digital combinatorial circuits as adders, comparators, multiplexors, and multipliers (which can be implemented by using both adder and multiplexor or defined by multiplier embedded on chip).

Fig. 7
figure 7

Logic schemes of basic t-norms: a Drastic, b Lukasiewicz, c Product, d Nilpotent, e Minimum, f t-norms multiplexed

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Because the fact that definition of basic digital t-norms is valid in the interval [0, n] (instead of unit interval), some modifications in their definitions are done.

  1. (i)

    Due to I input size is defined on (m + 1)-bits, the operations (combinatorial circuits) into each module should be defined on (m + 1)-bits, in spite of X, Y inputs and \(T_{i}\) output are defined on m-bits.

  2. (ii)

    (m + 1)-bits operations avoid overflow in Nilpotent and Lukasiewicz t-norms (X + Y).

  3. (iii)

    Special implementation is done for Lukasiewicz t-norm for avoiding negative values. When X + Y < I (corresponding a negative number in traditional definition), the most significant bit (MSB) bit on the subtract operation of Fig. 7b is set to 1, and these results can be considered as incorrect, and for the other hand when X + Y ≥ I, MSB on subtract operation is set to 0. Then, the MSB bit is used as input selector of a multiplexor with both X + Y − I or 0 inputs, and therefore only correct result will be chosen.

  4. (iv)

    Due to the multiplication on unsigned integer representation is an operation from m to 2 m-bits, the result of this operation will be normalized to m-bits. Then, the definition of \(T_{\text{P}}\) t-norm is modified to

    $$T_{P} \left( {x,y} \right) = x*y/I.$$

    With this normalization, all results are assured to be in \(L\), and \(T_{\text{P}}\) output takes the m-LSBs of the divisor. The disadvantage of this modification for one hand is the aggregation of a divisor, see Fig. 7c. As a consequence, it is more expensive on resource consumed and latency time slower. On the other hand, digital multiplication operation does not satisfy association property due to the discretization of the results, and therefore, this operator is not a t-norm but it is a conjunctor. It will be referred to as a quasi-t-norm. For these reasons, we present in the next section the results of the implementation of parametric operators including and not including product t-norm as a basic t-norm separately.

For getting a conjunctor or t-norm generated from basic t-norm, we multiplexed the different modules as shown in Fig. 7f using a 4-input multiplexor, i.e., a mu × 4 × 1 (or mu × 5 × 1, when t-product is included), which can be configured as shown in Table 2a (or Table 2b, when t-product is included).

Table 2 Selector of t-norms
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4.2 Implementation of Parametric Conjunctors and t-Norms

For designing parametric conjunctors and t-norms, it is needed to define some input parameters that can be classified as tuning parameters and configuration parameters. The tuning parameters are p, i 1, and i 2, which can take different values in the definition of one conjunctor or t-norm. The configuration parameters T i are used for specifying conjunctors or t-norms applied in specific method defined by type configuration parameter. In spite of the parametric operator has eight input parameters, all of them are not always used to define a specific t-norm or conjunctor. Table 3a shows the input parameters that are used in specific method and Table 3b gives information about the number of bits used by each inputs. Type input is not included in Table 3a, but it is clear that this input is necessary in general scheme. The inputs X and Y and Z output are not included in Table, because they are not parameter, but these should be considered as the input and output in the design with m-bits.

Table 3 Input parameters of conjunctors and t-norms methodologies
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Figure 8 shows the implementation schemes of the six different methods. Taken into account, the features of these schemes are as follows: (a) All schemes have different sets of inputs. (b) All implementations need a control module, called Ctrl1. This module is used for splitting the input space LxL in four regions D i as it is specified in Table 4, and it uses the simple comparators for its implementation. (c) The implementation of a parametric t-norm requires two subtractors and one adder used to compute t-norm specified on region D 4. Therefore, 2-input multiplexors are implemented to choose the inputs and the output of t-norm module, which are controlled by the ANDed output of Ctrl1 module, referred as xyGEp (X and Y are greater or equal to p). (d) For implementation of a t-norm with shifted domain, a control module was created, called Ctrl2, which configures the selector of t-norm module, according to the values of D i , X, Y, I, and T i . Two control modules are used to reduce the complexity of the design.

Fig. 8
figure 8

Schemes of families of parametric conjunctors and t-norms. a 4T y 4Tc, b 3DT, c 3DTs, d TMMT, e TMMTs

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Table 4 Conditions for configuring Ctrl1 module
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In the rows 5 and 7 of Table 5, there are specified the conditions to configure 3DTs and TMMTs methods. In the next section, the latency times and resources used by each implementation in comparison with the general implementation of the operator including all parametric families are shown and analyzed.

Table 5 Conditions for configuring Ctrl module
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4.3 Implementation of the General Operator

To implement the general operator, we use common parts from the different families’ implementations as shown in Fig. 8, together with the control module, Ctrl, that generalizes the differences of all types (see Fig. 9). Ctrl module has X, Y, D i , i i , t i and type inputs for configuring the sel t and sel l and xyGEp outputs that are plugged to inputs of t-norm module and multiplexors according to specification of Table 5. The p input parameter is used for dividing the L × L space on four sections: D 1 , D 2 , D 3, and D 4 as shown in Fig. 2a. The values of p belong to [0, n] interval. xyGEp signal is set to 1, when (x,y) tuple is in the region D 4 and Type input is >3, otherwise xyGEp signal is set to zero. The input selectors of t-norm and multiplexor MULL modules will be configured according to the type of parametric family of t-norm or conjunctors and to some of the input values of the parameters \(i1,\; i4, \;X,\; Y,\; p,\) corresponding to the type of the operator.

Fig. 9
figure 9

Logic scheme of the implementation of parametric conjunctors and t-norms

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For simplicity of the design, the Ctrl module was implemented using behavioral description, i.e., the behavior of the logic as shown in Table 5 was described using switch-case and if-else Verilog sentences [16].

Note that the implementation of the conjunctor is not validated to avoid the user errors, i.e., to verify the fulfillment of the conditions \(T_{1} \le T_{2} \le T_{4 }\) and \(T_{1} \le T_{3} \le T_{4 }\). Such module is not hard to develop. However, the authors consider that it affects the latency time of the operator, and as it is only necessary for families of conjunctors, so it is not included in the design. The generation of valid conjunctors is the responsibility of the users.

The assignation of specific t-norm to each section is defined by user or, by default, according to the type of the chosen conjunctor or t-norm. The users can define a specific t-norm using \(T_{1} , \;T_{2} ,\;T_{3} ,\;T_{4}\) configuration parameters, which can be configured according to the values of Table 2a, b (depending of the number of the basic t-norms), for example, if the user wants to define Lukasiewicz and Nilpotent t-norms in sections D 1 and D 4, respectively, then \(T_{1} = 1 {\text{ and }}T_{4} = 2\).

When a commutative conjunctor from 4Tc family is selected, the type input should be assigned the value 2 or 3, then the value of \(T_{3}\) input is not matter, because it is set equal to \(T_{2}\) by default. For the cases of type = 4, 5 t-norms, only the value of \(T_{4}\) input is user-defined and the other ones are set to \(T_{\text{D}}\) by default. Finally, for type = 6, 7 t-norms, the values of \(T_{2} , \;T_{3}\) are not matter and they are equal to \(T_{\text{M}}\), i.e., selT signal is set to 3 by default.

As it was mentioned in Sect. 3, type 5 and 7 t-norms can have shifted domains; therefore, the design has (m + 1)-bits inputs i 1 and i 4, for setting the domains of \(T_{1}\) (only for type 7) and \(T_{4},\) respectively.

In the next section, we will depict some examples of the input configuration for performing some conjunctors and t-norms. Also, the resources and latency time used for the implementation of the operators with different numbers of bits representation are given.

5 Results

The design of parametric operator for hardware implementation on FPGA was implemented on EP4CE115F29C7 device of Cyclone IV E of Altera [71–73], using Verilog language [16], for four different sizes of digital representations, when m equals to 5, 8, 16, and 32-bits, using product quasi-t-norm (the scheme presented in section IV) and without product quasi-t-norm, respectively.

We present a comparative analysis of the latency time and resources used in the implementations on EP4CE115F29C7 device of (a) the basic t-norms, (b) the six methodologies separately, and (c) the general parametric operator. Table 6 shows the resources and latency times used on the implementation of basics t-norm, in which one can note that all t-norms with exception of product t-norm have similar latency times and number of resources used for their respective implementations. The product t-norm is about 40 times slower in latency time and requires 10 times more resources than other ones, so we recommend including this t-norm in general parametric operator only when it is really necessary.

Table 6 Cost for implementing basic t-norms
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Table 6 also shows the resources and latency time of t-norm multiplexed and we can see that the time latency is about 14 % slower than for the slowest individual t-norm, and the resources used are less than for the sum of individual t-norms. It is possible because of more combinational functions could be mapped in the same reconfigurable area (Logic Elements) of the device.

Table 7 shows the resources and latency times used in the implementation of the different families of the operations, corresponding to the designs shown in Fig. 8, on the EP4CE115F29C7 device, where basic t-norm product is not included. We can watch that all families have similar latency time for the same m-bit size with the exception of the generation of 4T and 4Tc conjunctors (which are basically implemented only using a multiplexor).

Table 7 Cost for implementing parametric conjunctors and t-norm families
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We can say that latency time in parametric conjunctors 4T and 4Tc is about 30 % slower than the slowest individual t-norm (T L , Lukasiewicz, as shown in Table 6) and they use less resources than the overall sum of individual basic t-norms by the same reason of t-norm multiplexed, and the implementation of a parametric t-norms (3DT, 3DTs, TMMT, and TMMTs) uses about three times more resources than implementation of a parametric conjunctors, and its latency time is about two times slower.

Table 8 shows the values of resources consumed and latency time in the implementation of general operator using and not using product basic t-norm. Without product t-norm, the resources used are less than 1 % of total resources of this device [51] and the results are getting in one clock cycle with F max = 60.42 MHz in the case of 32-bits representation.

Table 8 Resources and latency time used for implementing parametric operator
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Comparing this result with the implementation of separated t-norm and conjunctors families, we can determine that the latency time is similar, and resources used are only 14 % more than the family TMMTs, so we can say that there is no degradation in latency time, and cost of resources is good for implementing general parametric operator. These results can be attributed to similar structures that have the six different families of t-norm and conjunctors, and optimization performed by Altera synthesizer, and mapped of different functions in same reconfigurable area.

Table 8 also shows latency time and resources used, when product t-norm is included, and as we expected, the cost of the operator is very bigger compared with same operator without the product t-norm. However, its implementation is feasible because this uses 4 % of total resources of the device, and its latency time is in the order of nanoseconds.

Finally, we present a comparison of our results with the results presented in [31] in which the cost of hardware implementation of one conjunctor was reported. In that work, the implementation was performed on 3E3S500EFG320-5 FPGA from Xilinx and the parametric conjunctor used 382 gates and latency time of 14.03 ns on 8-bits representation. For better comparison, we reimplement the operator on Altera FPGA using basic t-norm introduced in Fig. 7. Table 9 presents the cost of implementation of the parametric conjunctor and it also presents the cost of some of the conjunctors and t-norm designed from a particular family introduced in this work. From this table, we can infer that the conjunctor generated from 4T and 4Tc families is the fastest and with low-complexity of resources and the conjunctor from [31] has similar latency times that of t-norms presented in this work.

Table 9 Cost for implementing individual parametric conjunctor and t-norm
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We did not implement traditional complex parametric t-norm such as Yager, Hamacher, Dombi, etc., analyzed in [4, 48] because we can deduce that these do not have efficient hardware implementation due to a) these require product t-norm and other complex mathematic functions and b) their implementation is not good for digital representation.

For testing, the hardware implementation was simulated in model-sim simulator of mentor graphics using a 5-bits representation (\(N \in [0 - 31]\)), then the design was synthesized in the FPGA device and for verifying its hardware operation, it used hardware in the loop (HIL) approach, in which basically all possible values of (X, Y) from Matlab software to FPGA implementation were send, and the values of Z output of FPGA were returned to Matlab, for more details of HIL see [57, 58], and we obtained same results that in simulations. The data obtained were potted using Matlab software. For other representations, n equal to 8, 16, and 32, only some samples were verified.

Figure 10 shows the graphic surfaces corresponding to the t-norms and conjunctors specified in Table 10 for different values of parameterized inputs. Note that the cells with X value, corresponds to do not care condition, and then their values are not considered. With Fig. 10 and Table 10, we are trying to show all general different cases of configuring the operator because it is not practical to show each different family of the operator (see Table 11).

Fig. 10
figure 10

Surfaces of t-norms and conjunctors corresponding to Table 10

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Table 10 Configuration of t-norms and conjunctors
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Table 11 Classification of t-norms by type input
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Note that the cells with X value correspond to do not care condition, and then their values are not considered. With Fig. 10 and Table 10, we are trying to show all general different cases of configuring the operator because it is not practical to show each different family of the operator (see Table 11).

Finally, Table 11 shows the number of conjunctors and t-norms families that can be configured according to number of basic t-norms used, i.e., for 3 (as was implemented in [53]), 4 and 5 basic t-norms (presented in this paper). The cases of commutative and non-commutative conjunctors using 5 basic t-norm were taking into account that \(T_{\text{P}}\) and \(T_{\text{N}}\) cannot be compared, and so both of them cannot be included in the same parametric conjunctor. Therefore, the total different parametric operators that can be implemented in general operator are 41, 95, or 135 when 3, 4, or 5 different basic t-norms are used, respectively.

6 Conclusions

This paper presents the implementation of a generalized digital operator on FPGA that can be configured as a parametric conjunctor or a t-norm in fuzzy inference system. This design consists of Drastic, Lukasiewicz, Product, Nilpotent, and Minimum basic t-norms. This design is more complicated than the another one presented in [53], because it includes more basic t-norms, different methods of aggregation of t-norms such as an ordinal sum of t-norms, an ordinal sum of subnorms based on basic t-norms, monotone sum of t-norms, and extension of basic t-norms by Drastic t-norm [28, 47–50]. The efficient implementation in one scheme of the several parametric methods of generation of conjunctors and t-norms was achieved due to a unified representation of simplified versions of different methods of aggregation of t-norms considered in [47].

This design has efficient implementation with similar latency time of the different families presented, and the resources used are less than 1 % of the total resources of EP4CE115F29C7 device FPGA.

This design can be extended directly for implementation also (p, I − p)-monotone sum methodology presented in [54] by a simple modification in control unit. We present the results of this operator implementation considering until a 32-bits for digital representation, because we think that for a more precise representation it is better to use floating point representation.

This implementation does not contain a validation module for protecting operator from bad configurations that user can generate, because such module will make the implementation slower. For solving this problem, we recommend two solutions: (a) to make the validation in software or (b) to make a hardware validation module as it was done in [53].

As it was shown in Sect. 5, the implementation can be configured to obtain one of the 135 operators; therefore, we can suppose that this operator is very useful at implementations of adaptive fuzzy systems with reconfigurable logic operations that include a learning algorithm.