1 Introduction

According to the circuit theory, there are three fundamental two-terminal circuit element, defined with the relationship of current-voltage, charge-voltage, and flux-current. The relationship between current (I) and voltage (v) defines resistor, the relationship between charge (q) and voltage (v) defines capacitor, and the relationship between flux (\(\phi \)) and current (I) defines inductor. The fourth missing fundamental two-terminal circuit element is characterized by the relation between flux (\(\phi \)) and charge (q), known as the memristor.

In 1971 L. O. Chua [1] reported the fourth missing circuit element memristor, which means memory depending upon past history (memory + resistor) and the physical relationship between \(\phi \) and q is not a necessary condition. Memristor is characterized by a relation g (\(\phi \), q) = 0. It provides a missing link between flux and charge. Maxwell’s equation explain the non-linear characterization of memristor, charge \(q(t)=\int _{-\infty }^{t}i(t)dt\) and flux \(\phi {(t)}=\int _{-\infty }^{t}v(t)dt\). Memristor has peculiar properties, then resistor, inductor, or capacitor which cannot be realized using RLC networks. Somehow memristor behaves as a non-linear resistor with memory. At high frequency, the memristor behaves as a linear resistor.

Fig. 1
figure 1

a Circuit symbol of OTA and b internal structure of CMOS realization of OTA

Full size image

The two new memory elements that are generalized by the memristor are memcapacitor and meminductor [2]. Both have the storage capacity of energy in the form of capacitance and inductance, respectively. Recently in analog memory, these circuits have many applications as adaptive filters [3], neuromorphic circuit [4], low power computation [5], and programmable analog circuits [6, 8]. Hewlett Packard designed a thin-film \(TiO_{2}\) [8] based memristor, but it had a disadvantage of complexity in design. The complexity of design in Hewlett Packard led the analog designer to use various active blocks for the modeling of the memristor [9]- [11]. But, there are no standard models of memristor that can be followed for designing memristor. Recently it has been generated with VDTA (Voltage Difference Transconductance Amplifier) and OTA (Operational Transconductance Amplifier). In this, memristance swing can be controlled by changing the current of the OTA. Later, a flux controlled memristor using Operational Transconductance become new analog emulator circuit. Meminductor is a new special class of memory element realized by connecting memristors with the mutator circuit. This phenomenon is similar to a memristor emulator that converts the mutator into a non-linear characteristic of a memristor [12, 13]. Mutator based meminductor [14] does not apply to all memristors. However, the researcher designed a meminductor using commercially available ICs [15]; but, this type of meminductor has a large number of passive components and less operating frequency. Therefore, in this paper meminductor with three active element (OTA) and only two capacitor has been proposed. This paper is organized as follows: Sect. 2 incorporates the circuit description of proposed OTA based tunable meminductor, along with the mathematical derivation for investigation. Simulation parameters and results are elaborated in Sect. 3. Parameters variability analysis has ben done in Sect. 4. Finally, Sect. 5 draws important conclusions from present investigation.

2 Circuit description

The Operational Transconductance Amplifier (OTA) has high input impedance as well as high output impedance. The circuits symbol of OTA is shown in Fig. 1a and CMOS realization of OTA is shown in Fig. 1b.

The characteristics of an OTA is expressed as

$$\begin{aligned} I_{o} = G_{m} V_{in}, \end{aligned}$$
(1)

where \(V_{in} = V_{+}-V_{-}\) , called as differential input, \(G_{m}\) is the transconductance of an OTA [16]. The transconductance of an OTA is expressed as

$$\begin{aligned}&G_{m} = \frac{K}{\sqrt{2}}{(V_{B}-V_{ss}-2V_{th})}, \end{aligned}$$
(2)
$$\begin{aligned}&K = \mu {C_{ox}}\frac{W}{L}, \end{aligned}$$
(3)

where \(\mu \), \(C_{ox}\), W, L, and \(V_{th}\) are mobility of carrier, capacitance per unit area, channel width, channel length, and threshold voltage of MOSFET respectively. The CMOS realisation of the proposed grounded meminductor emulator is shown in Fig. 2

Fig. 2
figure 2

a Schematic diagram of the proposed grounded meminductor emulator realization with CMOS

Full size image

The mathematical analysis of the proposed meminductor emulator can be done in following ways using design shown in Fig. 2

$$\begin{aligned}&I_{1} = G_{m1}V_{in}, \end{aligned}$$
(4)
$$\begin{aligned}&V_{1} = \frac{G_{m1}}{C_{1}} \int {V_{in}dt} = \frac{G_{m1}\phi (t)}{C_{1}} \end{aligned}$$
(5)
$$\begin{aligned}&I_{2} = G_{m2}V_{1}, \end{aligned}$$
(6)
$$\begin{aligned}&I_{2} = \frac{G_{m1}G_{m2}\phi (t)}{C_{1}}, \end{aligned}$$
(7)
$$\begin{aligned}&V_{2} = \frac{G_{m2}G_{m1}\rho (t)}{C_{1}C_{2}}, \end{aligned}$$
(8)
$$\begin{aligned}&V_{B3} = V_{2}, \end{aligned}$$
(9)
$$\begin{aligned}&V_{B3} = \frac{G_{m2}G_{m1}\rho (t)}{C_{1}C_{2}}, \end{aligned}$$
(10)

where \(\rho (t) = \int {\phi (t)dt}\). Further, calculations are;

$$\begin{aligned}&I_{3} = \pm {G_{m3}V_{1}}, \end{aligned}$$
(11)
$$\begin{aligned}&I_{3} = \pm \frac{G_{m1}G_{m3}\phi (t)}{C_{1}}, \end{aligned}$$
(12)
$$\begin{aligned}&I_{in} = - {I_{3}}, \end{aligned}$$
(13)
$$\begin{aligned}&I_{in} = \pm \frac{G_{m1}G_{m3}\phi (t)}{C_{1}}, \end{aligned}$$
(14)
$$\begin{aligned}&\frac{I_{in}}{\phi (t)} = \pm \frac{G_{m1} G_{m3}}{C_{1}}. \end{aligned}$$
(15)

From Eqs. (2)–(15)

$$\begin{aligned} \frac{I_{in}}{\phi (t)} = \pm \frac{G_{m1}}{C_{1}}{\frac{K}{\sqrt{2}}}{(V_{B3}-V_{ss}-2V_{th})}. \end{aligned}$$
(16)

From Eqs. (10)–(16)

$$\begin{aligned} \frac{I_{in}}{\phi (t)} = \pm \frac{G_{m1}}{C_{1}}{\frac{K}{\sqrt{2}}}{(\frac{G_{m2}G_{m1}\rho (t)}{C_{1}C_{2}}-V_{ss}-2V_{th})}. \end{aligned}$$
(17)
Table 1 Aspect ratio of MOSFET used for the simulation of the proposed meminductor
Full size table

Thus, the relation between \(I_{in}\) and \(\phi (t)\) has been obtained in Eq. (17). Here, the positive sign indicate the incremental operation and negative sign indicate the decremental operation. Hence, the proposed tunable CMOS realization of OTA can operate in both incremental and decremental operation by interchanging the terminal of third OTA between \(V_{+}\) and \(V_{-}\).

3 Simulation parameters and results

Simulation of OTA based grounded tunable meminductor realization with CMOS using Cadence Virtuoso Tool, at gdpk 0.18 \(\upmu {m}\) technology having aspect ratio as given in Table (1) justify the above theoretical explanation. In simulation a supply voltage of \(V_{DD} = -V_{SS} = 1.2\) V with a tuned voltage of \(V_{B1} = V_{B2} = 0.1\) V. Layout of the proposed OTA based grounded meminductor is shown in Fig. 3, transient response are shown in Fig. 4a, b, whereas hysteresis plot is shown in Fig. 4c. These responses were carried out for input supply voltage having magnitude 500 mV at frequency 10 MHz. The value of capacitor \(C_{1} = 1\) pF and \(C_{2} = 2\) pF. The input voltage and flux have a \(90^\circ \) phase shift.

Fig. 3
figure 3

Layout of proposed OTA based tunable meminductor

Full size image
Fig. 4
figure 4

Transient response of the proposed OTA based tunable meminductor between a input voltage and current, b between flux and current, and c hysteresis loop of the proposed tunable meminductor

Full size image

As non-volatile nature is an important characteristic of the memristor family, the proposed meminductor is examined for non-volatile nature in Fig. 5 by considering the input pulse amplitude of 500 mV at a pulse width of 100 ns for the period of 250 ns. The external bias voltage is 500 mV, \(C_{1} = 90\) pF, and \(C_{2} = 1\) pF. In Fig. 5a, b input voltage and meminductance is plotted with respect to time and shows that proposed grounded meminductor is non-volatile in nature as the flux and current varies during on time and it remains constant during off state.

Fig. 5
figure 5

a Incremental mode and b decremental mode of the proposed meminductor

Full size image

4 Parameters variability analysis

4.1 Process variation

Process variation for different process model like SS, SF, NN, FS, and FF has been examined for the proposed grounded tunable meminductor. The current flow in FF model is larger than SS model along with area variation in hysteresis loop for 500 KHz at \(C_{1} = 30\) pF and \(C_{2} = 40\) pF as shown in Fig. 6. It also exhibits pinched hysteresis loop in all the process variation.

Fig. 6
figure 6

Hysteresis loop at different process corners

Full size image

4.2 Capacitor variation

Effect on \(V_{\phi }-I\) hysteresis loop for \(C\in \left\{ 40, 45, 50, 60\right\} \) pF at fixed value of frequency 500 KHz, fixed bias voltage \(V_{B1} = V_{B2} = 0.1\) V, and amplitude of input signal 1 V has been shown in Fig. 7. It shows that the magnitude of current increases through the meminductor by moving to the lower value of capacitances, which validates the Eqs. (17) as this equation says that current through meminductor is inversely proportional to the capacitance.

Fig. 7
figure 7

Hysteresis loop of \(V_{\phi }-I\) for \(C\in \left\{ 40, 45, 50, 60\right\} \) pF, at \(V_{B1} = V_{B2} = 0.1\) V, and input signal 1 V

Full size image

4.3 Voltage variation

Equation (17) of the proposed meminductor shows that current of meminductor is directly proportional to transconductance \(G_{m1}\) and \(G_{m2}\). This \(G_{m1}\) and \(G_{m2}\) are directly proportional to external bias voltage \(V_{B1}\) and \(V_{B2}\) as per Eq. (2). So, according to these equation meminductance should increase with increase of external voltage and same characteristic is shown by the proposed meminductor in Fig. 8. The simulation is carried for external bias voltage \(V_{B2}\in \left\{ 25, 50, 75, 100\right\} \) mV at frequency 500 KHz, \(C_{1} = 30\) pF, and \(C_{2} = 40\) pF. It concludes that meminductance can be tuned by external bias voltage.

Fig. 8
figure 8

Hysteresis loop of \(V_{\phi }-I\) for \(V_{B2}\in \left\{ 25, 50, 75, 100\right\} \) mV, at frequency 500 KHz, \(C_{1} = 30\) pF, and \(C_{2} = 40\) pF

Full size image

4.4 Temperature variation

In CMOS circuit temperature has a large impact on the carrier mobility, threshold voltage, and velocity saturation [17], which further affect the drain current and performance of the circuit.The effect of temperature on the hysteresis loop is shown in the Fig. 9. for \(T\in \left\{ -40^\circ , -20^\circ , 0^\circ , 20^\circ , 40^\circ \right\} \) C at frequency 500 KHz, \(C_{1} = 30\) pF, \(C_{2} = 40\) pF, \(V_{B1} = V_{B2} = 0.1\) V and amplitude of input signal 1 V. The proposed meminductor shows robust performance with the change of temperature.

Fig. 9
figure 9

Hysteresis loop of \(V_{\phi }-I\) for \(T\in \left\{ -40^\circ , -20^\circ , 0^\circ , 20^\circ , 40^\circ \right\} \) C at frequency 500 KHz, \(C_{1} = 30\) pF, \(C_{2} = 40\) pF, \(V_{B1} = V_{B2} = 0.1\) V and amplitude of input signal 1 V

Full size image

4.5 Frequency variation

In the proposed meminductor frequency variation of \(f\in \left\{ 400, 500, 600\right\} \) KHz at \(C_{1} = 30\) pF, \(C_{2} = 40\) pF, \(V_{B1} = V_{B2} = 0.1\) V and amplitude of input signal 1 V is shown in Fig. 10. According to this meminductance decreases with increase of frequency. But, this issue has been resolved by proper selection of capacitance value of \(C_{1}\) and \(C_{2}\) as shown in Fig. 11 where at \(C_{1} = 1\) pF and \(C_{2} = 2\) pF the proposed meminductor give good performance even at \(f = 10\) MHz.

Fig. 10
figure 10

Hysteresis loop of \(V_{\phi }-I\) for \(f\in \left\{ 400, 500, 600\right\} \) KHz at \(C_{1} = 30\) pF, \(C_{2} = 40\) pF, \(V_{B1} = V_{B2} = 0.1\) V and amplitude of input signal 1 V

Full size image
Fig. 11
figure 11

Hysteresis loop of \(V_{\phi }-I\) for various combination of f, \(C_{1}\), and \(C_{2}\) at \(V_{B1} = V_{B2} = 0.1\) V and amplitude of input signal 1 V

Full size image

4.6 Comparison

The proposed tunable meminductor has been compared with existing meminductor in terms of number of active components like VDTA, OTA, etc., number of passive components like resistor, capacitor, inductor, etc., modes in which these are operating, and their operating frequency. The comparison are shown in Table 2. Thus, from this comparison we conclude that the proposed tunable meminductor has less number of passive components which reduces the power consumption of the circuit. The current in the pinched hysteresis loop of our proposed grounded meminductor circuit ranges from 600 to \(-600~\upmu \)A in comparison 20 to \(-20~\upmu \)A in circuit design reported by Vista and Ranjan (2020) [22]. At the same time capacitor used in our design is 1 pF and 2 pF, whereas Vista and Ranjan (2020) used 50 pF and 85 pF, therefore in the proposed circuit design delay will be less and will also require less area in layout design. The average power dissipation in proposed circuit is \(120~\upmu \)W, whereas circuit reported by Vista and Ranjan has \(200~\upmu \)W average power dissipation. Finally, the operating frequency of 10 MHz for proposed tunable meminductor is highest among all the reported work in Table 2, which makes it more suitable for high-frequency applications. Further, it can also be tuned to desired frequency by proper selection of capacitor.

Table 2 Comparison of proposed tunable meminductor with existing meminductor on different parameters
Full size table

5 Conclusion

Memristor emulators have gained attention nowadays because of its unique features, so it becomes essential to develop a memristor-based circuit and system design. We have proposed a simple and robust design for CMOS realization of a tunable grounded meminductor using three OTA and two capacitors. Meminductor has grounded passive elements, which make it more suitable for making it fully monolithic. The proposed meminductor exhibits excellent performance in comparison to existing emulators. Both theoretical analyses and simulation using commercially available tool Cadence Virtuoso at 0.18 \(\upmu {m}\) CMOS technology parameters verify the validity of the meminductor. Various parameters variability analysis like process variation, capacitor variation, voltage variation, temperature variation, and frequency variation has been carried out, and our proposed meminductor has shown excellent performance. For a better analysis of performance, the proposed meminductor has been compared with the existing emulators and has shown better performance than existing. Its operating frequency of 10 MHz makes it suitable for high-frequency applications.