1 Introduction

The transfer function of a general nth-order filter (NOF) response can be expressed as:

$$T(s) = \frac{N(s)}{D(s)} = \frac{{a_{n} s^{n} + a_{n - 1} s^{n - 1} + \cdots + a_{1} s + a_{0} }}{{s^{n} + b_{n - 1} s^{n - 1} + \cdots + b_{1} s + b_{0} }}, $$
(1)

where a 0 through a n are real numbers, and b 0 through b n−1 are positive real numbers. The second-generation current conveyor (CCII) is an essential building block for current-mode (CM) processing. It is one of the most versatile devices [1]. Several NOF based on CCII and its related building blocks are suggested [2–10]. A reconfigurable NOF (RNOF) is a versatile filter that can be flexibly used to realize any NOF function without hardware change and hence serves wide range of applications. Such filters are core parts of systems utilizing field-programmable analog array (FPAA) [11]. This work investigates the use of CCII in the design of RNOF.

Integrated circuit applications require filters to be associated with programmable parameters to adjust the filter frequency response compensating for components, process and temperature variations. The nature of RNOF demands even broader programmability features to accommodate wide range of selectivity requirements. In this regard, NOF filters can be classified based on their TFs coefficients into programmable or not programmable designs. Also, it is important to further classify the programmable filters as those with orthogonally or independently tuned parameters. Independent tuning of the RNOF coefficients allows adjusting one parameter (e.g. accommodating different bandwidths) but also changing the filter type (e.g. low- to bandpass), and modifying the overall response (e.g. Butterworth [BT] to Chebyshev).

Traditional CCII, however, does not exhibit programmability feature obstructing its utilization in integrated VLSI applications involving complete systems on chip. In this work, voltage-mode (VM) and CM structures of RNOF based on CCII are explored. Then, the work addresses possible options for providing tuning characteristics. Section 2 provides summary of the available solutions and identifies those suitable for RNOF designs. The proposed filter is presented in Sect. 3. Experimental results obtained from standard 0.18 μm CMOS chips are given in Sect. 4.

2 Available solutions

Unlike other techniques such as LC simulation which results in single function with dependent coefficients [2], integrator based filter topologies provide all functions simultaneously with possible independent tuning characteristics. They adopt either distributed inputs (DIs) or summed outputs (SOs) topologies to generate various N(s) terms. In practice, there could be two different circuit realizations these filters based on the availability of the s n function of N(s) from the core circuit. The circuits without s n term are often canonic in the sense that n devices are required to realize the n integrators. In such cases, s n is often obtained through subtracting various outputs from the input signal results in a TF with several matching conditions for realizing the s n function. Table 1 summarizes the different characteristics of the available filters [3–10].

Table 1 Summary of NOF using CCII
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The filter presented in [3, 4] uses 3n − 2 CCII to realize a VM filter topology while the filter in [5] employs n + 2 current differencing buffered amplifier (CDBA) to construct CM filter topology. A CDBA is realized using two current-feedback amplifiers (CFAs). On the other hand, a CM NOF was presented in [6] incorporating 3n + 2 electronically programmable CCII (ECCII). The filter in [7] employs n − 1 current controlled CCII (CCCII) with one output and a CCCII with n + 1 outputs whereas the filter of [8] incorporates n − 1 differential difference current conveyor (DDCC) and a fully differential CCII (FDCCII). The filters in [9] employs only n − 1 differential voltage current conveyor (DVCC) with one output and a DVCC with n + 1 output to provide the feedback paths. It requires n + 1 copies of the input current. Circuit required to generate copies of input current for the filter of [9] is not counted. On the other hand, filters in [10] use 2n + 1 CCIIs with single output and one CCII with n + 1 outputs. In addition, realizations of the core NOF based on several different active elements are also suggested. The VM filter in [12] adopts the CFA. The CM filter in [13] is based on dual-output CCCII. The log-domain VM filters of [14, 15] and square root domain filter of [16].

It can be seen that the filter topologies in [7–10] are incompatible. They lead to transfer functions wherein the coefficients of N(s) cannot be independently controlled. Also, the filters of [7, 8] have another drawback as they do not provide s n term function. Although the filters in [3–6] are less efficient in terms of number of devices they are attractive as they are associated with transfer functions of independent coefficients. The filters [3–5] lack the programmability feature because traditional CCII does not exhibit programmability feature. The filter of [5] has another problem as it adopts 2n + 4 CFAs. A CFA consists of a CCII followed by a voltage buffer (VB). Given that CCII is often realized with a VB and a current mirror, it can be seen that the filter topology of [5] would approximately employ 4n + 8 CCIIs and hence less efficient than its counterpart of [4].

It is possible to change active-RC filters based on the CCII in [4] to their active-C counterparts utilizing translinear current conveyors such as [17]. In this case, the passive resistors would be replaced by the internal resistance of the X terminals (r x ) of the conveyor. It can be shown that NOF filter developed based on CCCII would exhibit dependent coefficients of N(s) and D(s). A CCII with both voltage and current gain called VCG-CCII was suggested in [18, 19]. The voltage gain V x /V y , just like any voltage amplifier, suffers from gain-bandwidth product problems. Whereas the current gain I z /I x is proportional to the small signal transconductance [18] or output resistance [19] of current mirroring transistors. The bandwidths of the current transfer characteristics of the VCG-CCII of [18, 19] are limited to approximately 20 kHz and 1 MHz, respectively. Alternatively, a current amplifier (CA) can be injected in the design of CCII to form ECCII such as [6]. In these topologies, the output current of CCII (I x ) is sensed and then applied to the input of a small signal CA. The CA amplifies I x and makes it available from a high output terminal Z. However, the main problem with ECCII of [6] and the ECCII of [17–19] is that their operations are valid only for small signal processing, resulting in limited tuning range and linearity performance.

Replacing the 3n − 2 CCIIs in [4] by ECCIIs would lead to a filter design with independently programmable characteristics. This filter would employ 3n − 2 CCIIs and -CAs which are less by four CCIIs and four CAs compared with its filter counterpart of [6]. Therefore, it can be seen that this modified filter of [4] and the filter of [6] would be suitable for the design of RNOFs. However, they suffer from three main drawbacks: (1) the large number of active devices, (2) the large number of resistors 3n − 2 in [4] and 3n + 3 in [6], and (3) the limited tuning range provided by ECCII which is contrary to the wide tuning range requirement of FPAA.

The third problem can be resolved through adopting digitally programmable CCIIs. A digitally programmable CCII was presented in [20] using several cascaded current division cells. Each cell (one-bit) consists of seven transistors and consumes 150 μA leading to area and power inefficient solution. Another digitally programmable CCII utilizing the active current division network (CDN) of [21] was suggested in [22]. It utilizes two CCII and a CDN to form a digitally programmable CCII. This conveyor has a single output and hence it could be used in the design of the filters of [4] or [6]. In fact, the work in [22] used the topology of [6] to realize filters for FPAA.

3 The proposed design

The filter proposed in this work will be shown to employ considerably less number of active devices and passive resistors compared with [3, 4, 6, 22]. This would result in significant improvements in power consumption and area. Also, it will be shown that the proposed filter further extends the tuning range without increase in power consumption. These advantages are achieved first by adopting a better filter topology and consequently utilizing an improved digitally programmable current conveyor.

The terminal characteristics of a CCII can be described as follows: I y  = 0, V x  = V y and I z  = ±I x where the positive and negative signs denote CCII+ (I x and I z have same direction) and CCII−, respectively. The following points should be observed in order to realize filters with independent coefficients. First, it can be seen that distributing the inputs or summing desired outputs using active elements with programmable gains a 0 through a n inherently result in filters with independent coefficients of N(s). Second, it can be seen that these topologies result in independent tuning of D(s) coefficients if programmable active elements are used to realize the feedback factors (b 0 through b n−1). With the help of the filter of [6], VM and CM RNOFs based on CCII can be developed. A mixed-mode filter (input and output signals can be voltage or current) is shown in Fig. 1. It employs 3n + 2 CCIIs for CM processing while two additional CCIIs are needed for VM signals.

Fig. 1
figure 1

Realization of mixed-mode filter topology based on single output CCIIs

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Alternatively, dual- or multi-output CM active devices are often utilized to reduce the number of active elements. A single CCII can be utilized to efficiently develop the integrator such that the feedback factor and output signals can be realized using the same device as shown in Fig. 2. This topology is adopted for CM signals since it is more efficient. A similar topology based on OTAs was suggested in [23].

Fig. 2
figure 2

A CM RNOF based on multi-output CCII

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The remaining issue in the design of Fig. 2 is introducing the tuning feature to permit adjusting the filter coefficients. Here, it is proposed to utilize the digitally programmable CCII suggested in [24] instead of its counterpart of [22]. The conveyor of [24] is formed of a CCII, CDNs, and digitally controlled current followers (DCCFs) as shown in Fig. 3. This solution provides double the tuning range and better tuning resolution compare to its counterpart of [22] without additional power consumption and hence it is more attractive for FPAA. The switches involved in the design of the CDN and DCCF are original parts of these devices and hence do not contribute nonlinearity. The DCCF is used to provide current gain (α), whereas the CDN is utilized to provide attenuation (β). In filter design, current gains can scale up the frequency characteristics, whereas attenuations can be used for frequency scale down. The tuning range of b i and a i would be equal to the product βα comprising 216 ≈ 65,500 steps with resolution of 0.0039 and hence it combines both the wide tuning range of digital elements and continuous programmability feature of analog tuning.

Fig. 3
figure 3

A widely programmable multi-outputs CCII

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The transfer functions of the proposed filter can be expressed as:

$$\frac{{i_{m} (s)}}{{i_{s} (s)}} = \frac{{s^{m} \beta_{am} \alpha_{am} \prod\nolimits_{i = m}^{n - 1} {\frac{1}{{C_{i + 1} R_{i} }}} }}{{s^{n} + \sum\nolimits_{i = 0}^{n - 1} {\beta_{bi} \alpha_{bi} s^{i} } \prod\nolimits_{j = i}^{n - 1} {\frac{1}{{C_{j + 1} R_{j} }}} }}\quad {\text{for}}\;m = 0\;{\text{to}}\;n - 1, $$
(2a)
$$\frac{{i_{n} (s)}}{{i_{s} (s)}} = \frac{{s^{n} \beta_{an} \alpha_{an} }}{{s^{n} + \sum\nolimits_{i = 0}^{n - 1} {\beta_{bi} \alpha_{bi} s^{i} } \prod\nolimits_{j = i}^{n - 1} {\frac{1}{{C_{j + 1} R_{j} }}} }}. $$
(2b)

Clearly, the coefficients of D(s) and N(s) can be independently adjusted through various β b α b and β a α a , respectively

4 Experimental results

The 4th-order filter obtained from the topology of Fig. 2 has been fabricated in a 0.18 μm N-well CMOS process. Die photograph of the filter is shown in Fig. 4. The VB and DCCF of [25] are utilized to realize the widely programmable CCII of Fig. 3.

Fig. 4
figure 4

Die photograph of the fabricated filter

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Throughout testing, the supply voltages were set to ±0.9 V and the currents of the CCII were I B  = 20 μA and I SB  = 5 μA. The respective standby currents of a CCII with three outputs and the DCCF are approximately 3I B  + 6I SB and 3I B  + 4I SB . Since the other CCIIs and DCCFs share the same I B and I SB , each of these CCII and DCCF is biased with 2I B  + 5I SB and 2I B  + 3I SB , respectively. The corresponding total power consumption of the filter is approximately 1.55 mW. The input- and output currents are converted to voltage signals using passive resistors of 1 kΩ. A VB is also used to drive the output terminal. Equal resistors (R 0 = R 1 = R 2 = R 3) of 159 kΩ and equal capacitors (C 0 = C 1 = C 2 = C 3) of 1 pF are used. These values lead to nominal pole frequency (f o ) of approximately 1 MHz. With eight-bit CDN, β can be adjusted from 0 to 0.996 whereas α can be changed from 1.004 to 256. First, CDNs are programmed to realize lowpass BT response with minimum pole frequency. This is achieved by selecting the lowpass output through setting \(\beta_{{a_{1} }}\) through \(\beta_{{a_{4} }}\) to zero. The lowest pole frequency of approximately 250 kHz is obtained by setting \(\beta_{{b_{0} }} \alpha_{{b_{0} }}\) to 0.0039 while the other corresponding values of β b α b and \(\beta_{{a_{0} }} \alpha_{{a_{0} }}\) are given in Table 2. The table shows the required theoretical values and the closest available digital word. Then, the pole frequency was varied to its maximum value of 4 MHz by setting \(\beta_{{b_{0} }} \alpha_{{b_{0} }}\) to 256. The corresponding values for other β b α b and \(\beta_{{a_{0} }} \alpha_{{a_{0} }}\) preserving the BT response and same gain are given in Table 2. Next, the pole frequency was set to an arbitrary value of 1 MHz through programming β b α b and \(\beta_{{a_{0} }} \alpha_{{a_{0} }}\) according to the values given in Table 2. The obtained measurement results demonstrating pole frequency adjustments are shown in Fig. 5. After that, the filter was reconfigured to realize band- and highpass responses by selecting the desired output signals. The bandpass response is obtained by setting \(\beta_{{a_{0} }} ,\) \(\beta_{{a_{1} }} ,\) \(\beta_{{a_{3} }} ,\) and \(\beta_{{a_{4} }}\) to zero while the highpass response is realized by making \(\beta_{{a_{0} }} ,\) \(\beta_{{a_{1} }} ,\) \(\beta_{{a_{2} }} ,\) and \(\beta_{{a_{3} }}\) equal to zero. Also, gain adjustments are demonstrated by increasing the gain to 12 dB as shown in Fig. 6.

Table 2 Various settings to achieve the desired responses
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Fig. 5
figure 5

Measured (thick curve) BT response showing pole adjustments

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Fig. 6
figure 6

Measured (thick curves) band- and highpass responses with gain adjusted to 12 dB

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The linearity of the filter was determined by finding the input third-order intercept point (IIP3) determined by performing several intermodulation (IM3) tests using 800 and 900 kHz signals. IIP3 estimation for in-band signals measured at the LPF output is found to be approximately 28 dBm (referenced to 50 Ω). The output noise root spectral density for the LPF at gain of 12 dB was approximately 365 nV/Hz1/2 over the passband. Thus, the total in-band noise for the LPF is calculated to be less than −68 Bm over bandwidth of 1 MHz. These values correspond with in-band spurious-free dynamic range of 64 dB.

5 Conclusion

The number of active devices can be reduced by using multi-output devices. But that approach traditionally leads to losing the programmability feature of N(s) and/or D(s) coefficients. In order to promote programmability feature, devices having different current gains would be required. This work adopts two CDNs in the design of digitally programmable CCII to provide wide tuning range suitable for FPAA. In general, the available solutions provide simulation results. Performance characteristics of the filters in terms of power consumption (only [8] reported simulation results of 15.4 mW for 3rd-order filter), noise, and linearity are not reported. Hence, numerical performance comparison is not visible. However, it is clear that the proposed filter would provide improved performances due to significant reduction in the number of active devices and passive resistors. The proposed filter would require n + 1 CCIIs and 2n + 1 CAs (DCCFs) compared with 3n − 2 CCIIs and -CAs for its counterpart of [4]. Whereas the filter of [6] would use 3n + 2 CCIIs and -CAs and the filter of [22] would require 6n + 4 CCIIs. Also, the proposed filter exhibits wider tuning range. These advantages are crucial for FPAA applications. The advantages of the proposed filter are supported by experimental results obtained from 0.18 μm CMOS process.