1 Introduction

The emulation circuits for memelements are attracting interest due to their use in nonlinear circuit memristive applications [4, 14, 20, 31]. As compared to the other two memelements, the memristor realization has been a well-established domain since the last decade. From the use of Op-Amp (Operational Amplifier) to the employment of OTAs (Operational Transconductance Amplifiers), the memristor emulators have been built using several kinds of active elements so far [1, 3, 5, 12, 15, 19, 21, 22, 27, 32]. Also, some other kinds of circuit structures based on diode-bridge networks have been reported to emulate the memristor characteristics [13, 30]. Unlike the memristor which became popular, other memelements, memcapacitor and meminductor, are not well studied. There are some circuit implementations of these memelement emulators, which are reported in [2, 10, 17, 23,24,25,26, 28, 34, 35].

Apart from the memelement emulators that can realize only single memelement functions [1,2,3, 5, 10, 12, 13, 15, 17, 19, 21,22,23,24,25,26,27,28, 30, 32, 34, 35], the multi-(universal/dual) memelement emulators are also gaining importance among circuit theorists [6, 7, 9, 11, 29, 33, 36]. The aim of a circuit designer always remains the emulation of maximum numbers memelement functions using a single circuit configuration based on a minimum number of circuit resources possible. And also, flexibility is a very desirable feature (freedom to have all the desired emulated memelement functions by executing the least number of changes in the circuit). The universal memelement emulators present in the existing literature [33, 36] cannot be considered easily reconfigurable, as they require multiple changes in the circuit design to switch from one memelement function to another. However, it can be proven by simple circuit logic that the realization of such a highly flexible (which requires only a single change keeping the same input port) universal emulator is not a possibility. Only two of the three memelements can be realized at most keeping the same architecture (resulting in a very flexible dual memelement emulator), the realization of the third memelement requires a lot of alterations in the design of the circuit. In the existing literature, some dual memelement emulation circuits are available [6, 7, 9, 11, 29]. It is observed in these emulators that maintaining the same circuit design (except the change of one passive element) realization of only two memelements is possible; however, the third element comes out to be a non-ideal capacitor or inductor. The work first discusses the two approaches that can be followed to obtain the simplest design of a single input single element-controlled flux/charge dependent multi-memelement emulator. Then, the limitation of these circuit concepts is discussed in the realization of a single input single element-controlled universal memelement emulator. Further, validation of this argument is demonstrated through the OTA-CCII-based circuit structures following the discussed concepts.

2 Single Input Single Element-Controlled Multi-Memelement Emulators and Their Inability to Realize all Three Memelements

The use of linear functions of flux/charge/TIF (Time integral of Flux)/TIQ (Time integral of Charge) has been common among circuit designers to realize the corresponding memelement emulators. In almost every memelement emulators given previously [1,2,3, 5,6,7, 9,10,11,12,13, 15, 17, 19, 21,22,23,24,25,26,27,28,29,30, 32,33,34,35,36], the realizing memelement functions exhibit linear dependency on the time integral of the applied current/voltage/charge/flux signal, which has a relation in the time-domain as follows:

$$ y(t) = \left( {a + b\int_{0}^{t} {x(k)\,{\text{d}}k} } \right)x(t) $$
(1)

where x(t) and y(t) represent the corresponding basic quantities of the memelements (which are voltage (vin) and current (iin) in the case of a memristor).

From Eq. (1), the memelement function becomes; \(G_{{\text{M/memcap/memind}}} = \left( {a + b\int_{0}^{t} {x\left( k \right){\text{d}}k} } \right)\), where a and b may be the coefficients depending upon the realization schemes.

Figure 1 shows possibly the simplest circuit structure to realize a voltage-controlled multi-memelement emulator with external multiplier-less architecture. This concept is based on a transconductance (with gain g) and a transadmittance amplifier (with a transfer function Zk (s)) with two grounded passive elements. The second block (transadmittance amplifier) can be a type of filtering circuit, having a transfer function, Zk that can be tuned to be; transconductive (g), transinductive (\(sg^{\prime\prime}\)) or transcapacitive \(\left( {\frac{{g^{\prime}}}{s}} \right)\).

Fig. 1
figure 1

A simples realization approach for voltage-controlled memelement emulator using external multiplier-less configuration

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Upon applying basic circuit principles, the i–v relation of the above-depicted circuit idea (in Fig. 1) is revealed as follows:

$$ I_{{{\text{in}}}} (t) = \left( {k + \frac{{R_{1} }}{{C_{1} }}\int_{0}^{t} {Z_{k} V_{{{\text{in}}}} (k){\text{d}}k} } \right)R_{1} Z_{k} V_{{{\text{in}}}} (t) $$
(2)

The first term between the brackets denotes the transconductance of the first amplifier, biased by the voltage across C1. The transient plot for Eq. (2) between Iin (k) and Vin (k) for the sinusoidal signal application is shown in Fig. 2.

Fig. 2
figure 2

Transient i–v response for Eq. (2) [between Iin and VR (voltage across resistance R1 in Fig. 1)] by employing Eq. (1), plotted for the memelements realized employing the approach depicted in Fig. 1

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By observing Figs. 1 and 2 and using Eq. (1), it can be deduced that by selecting the gain of the transadmittance amplifier as (g) and \(\left( {\frac{{g^{\prime}}}{s}} \right)\), the realization of memristor and meminductor can be achieved, respectively. If we select this amplifier gain as \(sg^{\prime\prime}\) (transinductive), we can achieve the following kind of i–v relation:

$$ i_{{{\text{in}}}} (t) = \left( {k + \frac{{R_{1} }}{{C_{1} }}\int_{0}^{t} {\left( {\frac{{{\text{d}}v_{{{\text{in}}}} (k)}}{{{\text{d}}k}}} \right){\text{d}}k} } \right)R_{1} \frac{{{\text{d}}v_{{{\text{in}}}} (t)}}{{{\text{d}}t}} $$
(3)

Therefore, in this case, Eq. (1) cannot realize the ideal memcapacitor function. Due to this, it can be concluded that no such circuit configuration can be designed, which can be used to realize all three voltage-controlled memelement functions by executing only a single change and maintaining the same input connections. Some existing universal emulators provide the realization of the three popular memelements, but they require the employment of three or more passive and active components (like those reported in [6, 7, 9, 11, 29]) and need multiple changes.

On comparing with the conventional capacitive relationship (i = cdv/dt), we can understand that Eq. (3) is representing the time-domain relationship of a nonlinear voltage-controlled capacitor.

Now, Fig. 3 depicts a simple realization concept that is single input single element-controlled architecture. However, it can be proved using similar logic that it cannot be used to realize all three memelements.

Fig. 3
figure 3

A simplest realization approach of multi-memelement current-controlled memelement emulation using external multiplier-less configuration

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For this circuit configuration, the i-v relation is found as follows:

$$ V_{{{\text{in}}}} (t) = \left( {k + g_{2} \frac{1}{{C_{1} }}\int_{t}^{t} {Zi_{{{\text{in}}}} (k){\text{d}}k} } \right)R_{1} Zi_{{{\text{in}}}} (t) $$
(4)

Equation (4) suggests that selecting the impedance Z as R results in the realization of a memristor and taking it as the capacitance C provides the emulation of memcapacitor. Interestingly, the selection of the impedance Z as an inductor L does not provide the function of meminductor rather it realizes only the nonlinear inductor (current controlled).

Therefore, using the basic circuit structure of Fig. 3, we can only realize the current-controlled memristor and memcapacitor and hoping for the realization of a meminductor, the third element comes out to be a non-ideal inductor. So, even for the current-controlled elements, all three types of memelement functions cannot be realized employing such single input single element structures. At most, these compact architectures can only be used to realize two memelement functions. Nevertheless, the possibility can be explored to design such a true universal memelement emulator by using a very versatile block with several input/output ports (resulting in complex internal structures based on a large number of transistors). The realization of such a block and its use in the designing of a universal memelement emulator can be investigated in the future.

The discussed arguments in this section have been validated by implementing the above-mentioned circuit concepts (in Figs. 1 and 3) by using OTA and CCII-based configurations.

3 Implementations of the Multi-Memelement Emulators Using OTA and CCII

The employed OTA has a single current output (IO) related to its voltage inputs by the relationship:

$$ I_{{\text{O}}} = g_{{\text{m}}} \left( {V_{ + } - V_{ - } } \right) $$
(5)

Here, gm denotes the transconductance of OTA given by \({g}_{\mathrm{m}}=k({V}_{\mathrm{B}}-{V}_{\mathrm{SS}}-{V}_{\mathrm{t}})\), in which bias voltage is VB, and VSS is the power supply value, Vt is the transistors’ threshold voltage value depending upon the technology, and k is the process parameter.

And the CCII is chosen with dual current outputs with port relationships given as follows:

$$ V_{X} = V_{Y} , I_{Z + } = - I_{Z - } = I_{X} \quad {\text{and}}\quad I_{Y} = 0 $$
(6)

3.1 Flux-Controlled Single Input Single Element-Controlled Multi-Memelement Emulator

The designed proposed circuit configuration of the designed Flux-dependent multi-memelement emulator is depicted in Fig. 4. The circuit comprises one OTA along with CCII and three passive elements in the grounded state.

Fig. 4
figure 4

Flux-controlled multi-memelement emulator using OTA and CCII [8]

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At the X port of the CCII, the connected impedance Z can be selected as: Resistor (R), Capacitor (C), and inductor (L), for the realization of the different element functions. It can be noticed from Fig. 4 that \(I_{Z + } = I_{X} = \frac{{V_{X} }}{Z},I_{Z - } = - I_{X} = - V_{X} /Z\), where ZX is the impedance present at the X terminal of the CCII. It suggests that 1/Z is acting like a transadmittance from port X to port Z. It is equivalent to the transadmittance amplifier, and the second stage of the circuit idea is depicted in Fig. 1.

By using Eqs. (5) and (6), the current Iin can be evaluated as follows:

$$ I_{{{\text{in}}}} = k\left( {\frac{1}{C}\int_{0}^{t} {\frac{{ V_{{{\text{in}}}} }}{Z}} {\text{d}}t - V_{{\text{t}}} - V_{{{\text{SS}}}} } \right)\frac{{ V_{{{\text{in}}}} }}{Z}R $$
(7)

3.1.1 Case 1: Replacing Impedance Z with Resistance R 1

On putting Z = R1, Eq. (7) is modified as follows:

$$ I_{{{\text{IN}}}} = k\frac{R}{{R_{1} }}\left( {\frac{1}{{R_{1} C}}\int_{0}^{t} { V_{{{\text{in}}}} {\text{d}}t - V_{{{\text{SS}}}} - V_{{\text{t}}} } } \right) V_{{{\text{in}}}} $$
(8)

By using Eq. (8), it is clear that after connecting R1, the circuit depicted in Fig. 4 emulates the behavior of a Flux-dependent memristor with memristance GM equals to:

$$ G_{{\text{M}}} = k\frac{R}{{R_{1} }}\left( {\frac{1}{{R_{1} C}}\int_{0}^{t} { V_{{{\text{in}}}} {\text{d}}t - V_{{{\text{SS}}}} - V_{{\text{t}}} } } \right) $$
(9)

The PSPICE simulations are performed to test the working of this circuit as a memristor emulator. The employed CMOS implementations of the used CCII and OTA are taken from the works reported in [16, 18]. The emulated memristor (realized using Eq. 8) using the designed emulator is simulated by selecting R1 = 8 K, C1 = 0.036 nF, and R = 5 K. Figure 5 demonstrates the memristor PHL curves for three operating frequencies, and it plotted between transient input voltage and current. According to the well-known memristor fingerprints, the memristor i–v contour should intersect itself at the origin, and its enclosed area should diminish upon raising the operating frequency of the applied signal.

Fig. 5
figure 5

Plotted PHL curves of the emulated memristive behavior

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3.1.2 Case 2: Replacing Impedance Z by Inductor L 1

On putting Z = sL, Eq. (7) can be written as follows:

$$ I_{{{\text{in}}}} = k\frac{R}{{L_{1} }}\left( {\frac{1}{{L_{1} C}}\int_{0}^{t} {\int_{0}^{t^\prime } {} } V_{{{\text{in}}}} {\text{d}}k{\text{d}}t^\prime - V_{{{\text{SS}}}} - V_{{\text{t}}} } \right)\int_{0}^{t} {V_{{{\text{in}}}} {\text{d}}t} $$
(10)

Equation (10) suggests the realization of a flux-controlled meminductor if an inductor is connected at the X port of the CCII. The realized inverse meminductance LM−1 can be found as follows:

$$ L_{{\text{M}}}^{ - 1} = k\frac{R}{{L_{1} }}\left( {\frac{1}{{L_{1} C}}\int_{0}^{t} {\int_{0}^{t^\prime } {V_{{{\text{in}}}} {\text{d}}k{\text{d}}t^\prime - V_{{{\text{SS}}}} - V_{{\text{t}}} } } } \right) $$
(11)

To simulate the emulated meminductor, the simulation parameters are selected as: R = 2 K, C = 0.075 nF, and L1 = 0.01 mH. The simulation results illustrated in Fig. 6 exhibit the ϕ–i (flux-current) plots of the emulated flux-controlled meminductor traced at three frequencies.

Fig. 6
figure 6

PHL plots of the realized meminductor (VR1 is proportional to (−ϕ), and the x-axis is chosen as-VR1))

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3.1.3 Case 3: Replacing Impedance Z with Capacitor C 1

In this case, the Eq. (7) should be written as follows:

$$ I_{{{\text{in}}}} = kRC_{1} \left( {\frac{{C_{1} }}{C}\left( { V_{{{\text{in}}}} } \right) - V_{{{\text{SS}}}} - V_{{\text{t}}} } \right)\frac{{\text{d}}}{{{\text{d}}t}}\left( { V_{{{\text{in}}}} } \right) $$
(12)

On comparing Eq. (12) with the commonly used capacitive current relation Iin = Cdv/dt, the emulated nonlinear capacitance CM by the circuit depicted in Fig. 4 is found as follows:

$$ C_{{\text{M}}} = kRC_{1} \left( {\frac{{C_{1} }}{C}\left( { V_{{{\text{in}}}} } \right) - V_{{{\text{SS}}}} - V_{{\text{t}}} } \right) $$
(13)

Similarly, the realized nonlinear capacitance is tested by applying a sinusoidal signal with amplitude VP = 0.01 V with operating parameters chosen as: C = 0.01 nF, C1 = 0.075 nF, and R = 5 K. Equation (13) suggests that the characteristics of this nonlinear capacitor must be traced between Iin and dv/dt. For a sinusoidal input with a voltage signal as: v = vpsin2πFint, the x-axis variation will be controlled by dv/dt = 2πFin vpsin2πFint. It clearly suggests that span of the PHL curve along the x-axis should depend upon the input signal frequency. It can also be observed in the plots demonstrated in Fig. 7. The nonlinear capacitors have also been called dual of memcapacitor.

Fig. 7
figure 7

Transient characteristics of the realized nonlinear capacitor traced in the (i–dv/dt) plane (IC1 is directly proportional to the dv/dt)

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3.2 Charge-Controlled Single Input Single Element-Controlled Memelement Emulator

The circuit described in Fig. 8 is the implementation of the circuit block diagram discussed in Fig. 3 for current-controlled multi-memelement emulators. The depicted schematic consists of two OTAs and a CCII along with three grounded passive elements.

Fig. 8
figure 8

Charge-controlled multi-memelement emulator using OTA and CCII

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On performing circuital analysis by using Eqs. (4) and (5), the input current Iin is obtained as follows:

$$ V_{{{\text{in}}}} = k\left( { g_{{{\text{m}}2}} \frac{Z}{{C_{1} }}\int_{0}^{t} {I_{{{\text{in}}}} {\text{d}}t - V_{{{\text{th}}}} - V_{{{\text{SS}}}} } } \right) I_{{{\text{in}}}} ZR_{1} $$
(14)

In Eq. (14), the first product term is the transconductance gain of OTA1, while gm2 represents the transconductance amplifier of OTA2.

Now, on selecting the different types of impedance Z, three different cases can be studied.

3.2.1 Case 1: When Z is Selected as Resistance R

In this case, Eq. (14) can be modified as follows:

$$ V_{{{\text{in}}}} = k\left( { g_{{{\text{m}}2}} \frac{R}{{C_{1} }}\int_{0}^{t} {I_{{{\text{in}}}} {\text{d}}t^\prime - V_{{{\text{th}}}} - V_{{{\text{SS}}}} } } \right) I_{{{\text{in}}}} RR_{1} $$
(15)

It can be deduced from Eq. (15) that by choosing Z as resistance R, the circuit of Fig. 8 realizes the function of a charge-controlled memristor.

3.2.2 Case 2: When Z is Selected as Capacitance C

For the use of the capacitance, the i–v relationship of the circuit can be computed from Eq. (14) as follows:

$$ V_{{{\text{in}}}} = k\left( { g_{{{\text{m}}2}} \frac{1}{{CC_{1} }}\int_{0}^{t} {\int_{0}^{t^\prime } {} } I_{{{\text{in}}}} {\text{d}}k{\text{d}}t^\prime - V_{{{\text{th}}}} - V_{{{\text{SS}}}} } \right)\frac{1}{{C_{1} }}\int_{0}^{t} {I_{{{\text{in}}}} {\text{d}}t^\prime R_{1} } $$
(16)

On comparing Eq. (16) with the standard charge-controlled capacitance equation, we can understand that Eq. (16) is realizing the function of a charge-controlled memcapacitor.

3.2.3 Case 3: When Z is Selected as Inductance L

In this case, the input i–v relationship of the designed circuit is obtained as follows:

$$ V_{{{\text{in}}}} = k\left( { g_{{{\text{m}}2}} \frac{L}{{C_{1} }} I_{{{\text{in}}}} - V_{{{\text{th}}}} - V_{{{\text{SS}}}} } \right)ZR_{1} L \frac{{\text{d}}}{{{\text{d}}t}}\left( { I_{{{\text{in}}}} } \right) $$
(17)

Equation (17) suggests the realization of only a nonlinear current-controlled inductor. Therefore, selecting the impedance Z as inductance L does not provide the emulation of a charge-controlled meminductor.

Therefore, the circuit concept of Fig. 3 is unable to realize all three memelements with a single input single element-controlled structure.

4 Conclusion

The paper discusses that a single input single element-controlled Flux-dependent multi-memelement emulator provides the realization of only the ideal memristor and ideal meminductor, and the other case results in a nonlinear voltage-controlled capacitor. Similarly, in the case of the current-controlled emulator, the ideal memristor and memcapacitor are realized but the third one is obtained as a nonlinear inductor. There is no possibility to modify these circuit configurations by executing any change in the emulator circuits into a perfect universal memelement emulator without losing the various advantages of the emulator related to flexibility. Therefore, it is proved in this article that such universal memelement emulators cannot be designed whose behavior can be switched only by executing a single change in the circuit configuration.