Abstract
SysML state machine diagrams are used to describe the behavior of blocks in the system under consideration. The work in [1] proposed a formalization of SysML state machine diagrams in which the diagrams were translated into CSP# processes that could be verified by the state-of-the-art model checker PAT. In this paper, we make several modifications and add new rules to the translation described in that work. First, we modify three translation rules, which we think are inappropriately defined according to the SysML definition of state machine diagrams. Next, we add new translation rules for two components of the diagrams – junction and choice pseudostates – which have not been dealt with previously. As the contribution of this work, we can achieve more reasonable verification results for more general SysML state machine diagrams.
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Zhang, S.J., Liu, Y.: An Automatic Approach to Model Checking UML State Machines. In: IEEE International Conference on Secure Software Integration and Reliability Improvement Companion, pp. 1–6 (2010)
OMG: OMG Systems Modeling Language Version 1.3 (June 2012), http://www.omg.org/spec/SysML/1.3/PDF
OMG: OMG Unified Modeling Language Superstructure Version 2.4.1 (August 2011), http://www.omg.org/spec/UML/2.4.1/Superstructure/PDF
Edmund, M., Clarke, J., Grumberg, O., Peled, D.A.: Model Checking. The MIT Press (1999)
Holzmann, G.: The Model Checker Spin. IEEE Trans. 23(5), 279–295 (1997)
Cimatti, A., Clarke, E., Giunchiglia, F., Roveri, M.: NUSMV: A New Symbolic Model Verifier. In: Halbwachs, N., Peled, D.A. (eds.) CAV 1999. LNCS, vol. 1633, pp. 495–499. Springer, Heidelberg (1999)
Larsen, K.G., Pettersson, P., Yi, W.: Model-Checking for Real-Time Systems. In: Reichel, H. (ed.) FCT 1995. LNCS, vol. 965, pp. 62–88. Springer, Heidelberg (1995)
Sun, J., Liu, Y., Dong, J.S.: Model Checking CSP Revisited: Introducing a Process Analysis Toolkit. In: Margaria, T., Steffen, B. (eds.) ISoLA 2008. CCIS, vol. 17, pp. 307–322. Springer, Heidelberg (2008)
Hoare, C.A.R.: Communicating Sequential Processes. Commun. ACM 21(8), 666–677 (1978)
Bhaduri, P., Ramesh, S.: Model Checking of Statechart Models: Survey and Research Directions. CoRR cs.SE/0407038 (2004)
McMillan, K.L.: Symbolic Model Checking: An approach to the state explosion problem. PhD thesis, Pittsburgh, PA, USA (1992)
The Formal Systems website: FDR2.91 (November 2010), http://www.fsel.com/
Latella, D., Majzik, I., Massink, M.: Automatic Verification of a Behavioural Subset of UML Statechart Diagrams Using the SPIN Model-checker. Formal Asp. Comput. 11(6), 637–664 (1999)
Lilius, J., Paltor, I.P.: vUML: A Tool for Verifying UML Models, 255–258 (1999)
Clarke, E.M., Heinle, W.: Modular Translation of Statecharts to SMV. Technical report (2000)
Dubrovin, J., Junttila, T., Högskolan, T., Dubrovin, J., Junttila, T., Dubrovin, C.J., Junttila, T.: Symbolic Model Checking of Hierarchical UML State Machines. Technical report, Helsinki University of Technology Laboratory (2007)
Niewiadomski, A., Penczek, W., Szreter, M.: A New Approach to Model Checking of UML State Machines. Fundam. Inf. 93(1-3), 289–303 (2009)
Hansen, H.H., Ketema, J., Luttik, B., Mousavi, M.R., van de Pol, J.C.: Towards Model Checking Executable UML Specifications In MCRL2. Innovations in Systems and Software Engineering 6, 83–90 (2010)
Rasch, H., Wehrheim, H.: Checking Consistency in UML Diagrams: Classes and State Machines. In: Najm, E., Nestmann, U., Stevens, P. (eds.) FMOODS 2003. LNCS, vol. 2884, pp. 229–243. Springer, Heidelberg (2003)
Ng, M.Y., Butler, M.: Towards Formalizing UML State Diagrams in CSP. In: 1st International Conference on Software Engineering and Formal Methods, pp. 138–147. IEEE Computer Society (2003)
Groote, J.F., Mathijssen, A., Reniers, M., Usenko, Y., Weerdenburg, M.V.: The Formal Specification Language mCRL2. In: Proceedings of the Dagstuhl Seminar. MIT Press (2007)
Baeten, J.C.M., Weijland, W.P.: Process Algebra. Cambridge University Press (1990)
Technical Rockstars: clooca, http://www.clooca.com
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Ando, T., Yatsu, H., Kong, W., Hisazumi, K., Fukuda, A. (2013). Formalization and Model Checking of SysML State Machine Diagrams by CSP#. In: Murgante, B., et al. Computational Science and Its Applications – ICCSA 2013. ICCSA 2013. Lecture Notes in Computer Science, vol 7973. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-39646-5_9
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DOI: https://doi.org/10.1007/978-3-642-39646-5_9
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