Overview
- The first addressing the low-power design by doing system-level trade-offs of (dynamic concurrent) task scheduling which does not fully depend on Dynamic Voltage Scaling (DVS) or Dynamic Power management (DPM)
- Highlights a set of solid system synthesis techniques that have been partly verified with realistic demonstrators and that are also supported in our prototype tools
- Together with the connection between embedded memory and processor, these features make our book different from other books in the processor mapping area
- With the rapidly increasing interest in (portable) system designs based on multiprocessor SoC platforms where energy-aware real-time signal processing is a must, we believe a clear market for this type of system exploration methodology exists
Buy print copy
About this book
Similar content being viewed by others
Keywords
Table of contents (12 chapters)
Editors and Affiliations
About the editors
Francky Catthoor is a leading researcher at IMEC and is very well established within the EDA community. He is IEEE Fellow and has edited and authored 6 books for Springer/Kluwer.
Bibliographic Information
Book Title: Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms
Editors: Zhe Ma, Pol Marchal, Daniele Paolo Scarpazza, Peng Yang, Chun Wong, José Ignacio Gómez, Stefaan Himpe, Chantal Ykman- Couvreur, … Francky Catthoor
DOI: https://doi.org/10.1007/978-1-4020-6344-2
Publisher: Springer Dordrecht
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media B.V. 2007
Hardcover ISBN: 978-1-4020-6328-2Published: 09 July 2007
Softcover ISBN: 978-90-481-7610-6Published: 19 October 2010
eBook ISBN: 978-1-4020-6344-2Published: 26 August 2007
Edition Number: 1
Number of Pages: XII, 264
Topics: Circuits and Systems, Programming Languages, Compilers, Interpreters, Computer-Aided Engineering (CAD, CAE) and Design, Processor Architectures, Image Processing and Computer Vision