SiO₂ based conductive bridging random access memory

Abstract

We present a review on the subject of Conductive Bridging Random Access Memory (CBRAM) based on copper- or silver-doped silicon dioxide. CBRAM is a promising type of resistive non-volatile memory which relies on metal ion transport and redox reactions to form a persistent conducting filament in a high resistance film. This effect may be reversed to return the device to a high resistance state. Such control over resistance can be used to represent digital information (e.g., high =0, low =1) or produce multiple discrete or even continuous analog values as required by advanced storage and computing concepts. Many materials have been used in CBRAM devices but we concentrate in this paper on silicon dioxide as the ion conducting layer. The primary benefits of this approach lie with the CMOS process compatibility and the ubiquity of this material in integrated circuits which greatly lower the barrier for widespread usage and permit integration of memory with silicon-based devices. Our discussion covers materials and electrochemical theory, including the role of counter charge in these devices, as well as the current understanding of the nature of the filament growth. Theory of operation is supported by descriptions of physical and electrical analyses of devices, including in-situ microscopy and impedance spectroscopy. We also provide insight into memory arrays and other advanced applications, particularly in neuromorphic computing. The radiation tolerance of these devices is also described.

1 Introduction

In the era of information explosion, the sharing, storage and analysis of information is happening all the time at every corner of the world. The increasing popularity of virtual reality (VR), artificial intelligence (AI) and Internet of Things (IoT) also pose great challenge for efficient data manipulating. The desire for high density, fast speed and low power non-volatile memory has never been greater. Conventional magnetic hard disk drives (HDDs) are being relegated to back-up duty in data centers as their inherent high latency, high power consumption, considerable bulk, and fragility mean that they are less able to play in the new mobile markets [1]. NAND Flash bests HDDs in terms of latency and portability [2]. The scaling anxiety of planar NAND has been greatly relieved because of recent breakthroughs in 3D integration [3]. However, the programming speed and endurance of NAND Flash still cannot meet the requirements of many applications. In addition, the lack of ionizing radiation immunity of floating gate technology hinders its usage in the realm of medical equipment and space-based systems where radiation tolerance is required [4]. The reliability of NAND flash becomes even worse with continuous shrinking of device size since less than hundred electrons are stored in the floating gate for 1× nm technology node, single electron loss will introduce great variations in gate threshold voltage.

Resistive switching random access memory (RRAM or ReRAM) is a type of emerging non-volatile memory (NVM) technology. The resistive switching phenomenon that was first reported as early as the late 1960s [5] in binary oxide-based devices [6, 7]. It was reported that the device resistance was tunable after a relatively high field dielectric soft breakdown. The device performance at that time was not good enough for memory applications. However, due to the advances in modern micro/nano fabrication and thin film deposition technology, the device performance was greatly improved and it gained significant attention from both academy and industry [8–10]. RRAM device has a simple metal-insulator-metal (MIM) structure in which an insulating thin film is sandwiched between two metal electrodes. The resistance of the sandwiched insulating layer can be changed between high and low resistance states by externally applied voltage, thereby the bit information, i.e. “0” and “1”, is represented. Many models have been proposed to explain the resistance switching behavior, among which the ‘filament’ model is the most popular [11]. In the ‘filament’ model, the change in resistance is associated with the formation and dissolution of conductive filament in an otherwise insulating material. Due to its numerous merits [12], such as fast programming speed (in nanoseconds), excellent endurance (up to 10¹² cycles), lower power consumption (~ 1 pJ/bit), RRAM is recognized to be one of the most promising alternative to Flash.

Based on the ‘filament’ model, three distinct switching mechanisms have been identified for the RRAM devices, i.e., a unipolar switching RRAM, a bipolar switching RRAM with conducting oxide filament and a bipolar switching RRAM with metallic filament [10]. NiO based devices are usually unipolar switchable [13], unipolar means that the device can be programmed and erased by voltage with the same polarity. It is believed that Joule heating plays an important role in switching process [14], the large switching current of NiO RRAM is not desirable for low power memory applications. Many transition metal oxides have been tried for resistive switching including both binary oxides, such as HfO_x [15–17], TaO_x [18, 19] and TiO_x [20, 21], and complex oxides such as SrTiO₃ [22–24], in which a bipolar switching characteristic is often observed. Different from unipolar RRAM, the programming and erasing of bipolar RRAM is achieved by applying voltage with opposite polarity. The conductive filament in bipolar RRAM is composed of a highly reduced oxide phase in which the metal valance state deviates from its stoichiometric value. Such oxygen deficient phases can be generated and recovered through a field induced drift of oxygen anions [25]. The need for oxygen transport (or change of metal valance state) in switching process has led to this technology known as OxRAM (or VCM, valance change memory) [26]. The third RRAM type has a similar switching mechanism to the second one in terms of its voltage requirement. It also requires voltage with opposite polarity for programming and erasing. However, instead of oxide filament, it has metallic filament which relies on electrochemical redox reactions and the transport of metal ions (typically Ag or Cu ions) [27]. This type of RRAM is called conductive-bridging RAM (CBRAM), programmable metallization cell (PMC), or electrochemical metallization (ECM) memory. As has been discussed, CBRAM and OxRAM have many similarities. For example, both of them are bipolar type memory and rely on ion transport to form the conductive filament(s). However, a key difference between them is that in OxRAM both electrodes are inert while one electrode in CBRAM has to be electrochemically oxidizable in order to supply metal ions for filament formation. The active electrode is usually made of Ag or Cu while the inert electrode can be W, TiN, Pt, etc. The thin solid electrolyte layer in between can be chalcogenide glass, oxides, amorphous Si, or a multi-layered film. Examples of solid electrolyte used in CBRAM are presented in Table 1. The underlying electrochemical interactions in CBRAM is generally reviewed in Section 2 and a discussion of electrochemical process for CBRAM composed of different materials system is also provided in [28]. Chalcogenide based CBRAM has been commercialized in the form of discrete non-volatile memory components, indicating that the operating characteristics of the technology are sufficiently robust for demanding markets [29, 30].

Table 1 Examples of material systems used in CBRAM devices

Whereas chalcogenide based CBRAM devices have proven to be viable replacements for certain types of non-volatile memory devices, there is still some unwillingness, particularly with major integrated circuit foundries, to incorporate these materials into back-end-of-line (BEOL) processing. Ironically, a potential solution to the reticence surrounding “new materials” lies with Cu diffusion in deposited silicon dioxide films, as both materials are commonplace in advanced ICs. Cu migration in dielectrics has been a persistent problem for semiconductor manufacturers who wished to adopt Cu interconnect [31] but Cu-SiO₂ based CBRAM exploits this “problem” to enable controlled transport of Cu and metallic bridge switching in the SiO₂. This approach has drawn increasing attention in recent years since the devices exhibit similar switching characteristics to those based on chalcogenide glasses while possessing inherently greater CMOS compatibility. In this paper, we present a review of the developments in SiO₂ based CBRAM using either Cu or Ag as active electrode.

2 Physicochemical principles and materials

2.1 Filament growth in SiO₂ CBRAM

The filament growth in chalcogenide based CBRAM has been well described in many works [9, 80]. It is generally accepted that a metallic filament grows from inert electrode towards active electrode, resulting in a conical shape with a thicker body near inert electrode and a thinner body near active electrode. However, due to the low ion mobility in many oxides, the direction of filament growth in SiO₂ based CBRAM may be different. Some of recent works suggest that the filament in thin film oxide grows from active electrode towards inert electrode, therefore, a reversed conical filament is formed [81–83]. Based on these works, a filament growth model for Cu-SiO₂ CBRAM has been proposed and is depicted in Fig. 1.

Fig. 1

Schematic of filament growth and dissolution in Cu-SiO₂ CBRAM. © 2015 IEEE. Reprinted with permission from Ref. [87]

First, one should notice that the line with solid circle marker in Fig. 1 is a typical switching curve of Cu-SiO₂ CBRAM. The x-axis is the applied voltage, which is referenced from the Cu top electrode to the inert metal bottom electrode. The y-axis is the corresponding current through the two terminal device. In the initial high resistance state (i), it has only small amount of Cu ions close to the Cu electrode which could be due to incidental incorporation of Cu during device fabrication. Under positive bias the Cu electrode will lose electrons through an oxidization process and generates Cu ions (Cu → Cu²⁺ + 2e⁻). Cu ions in SiO₂ will drift towards the inert electrode along the electric field. Different from ions in chalcogenide materials, the Cu ion moves much slower in SiO₂, thus, the reduction of Cu ion occurs before it reaches inert electrode by capturing electrons tunneling through thin SiO₂ film (Cu²⁺ + 2e⁻ → Cu). As long as there are enough electrons tunneling through and reducing Cu ions, a filament will start growing from the active electrode towards inert electrode (ii) until a bridge between the terminals is formed (iii). At this point, the device is switched to a low resistance state (LRS) and the current increases dramatically until limited by current compliance. This HRS to LRS transition is also known as the set process which is marked by the arrow on right side of the figure. Since the ion concentration close to Cu electrode is higher than the reset of SiO₂ film, the formed filament has a thicker body at Cu electrode and thinner body at inert electrode resulting in a reversed conical shape. Reset is essentially an opposite process of the set process. The conductive filament will be oxidized and dissolved into the SiO₂ matrix if a negative voltage is applied, then it switches back to HRS (iv). The reset process is initiated at the inert electrode/oxide interface which is the weakest part of the filament. The LRS to HRS transition is marked by the blue arrow on left side of the figure.

It should be noted that the above model illustrates only one out of many possible mechanisms for filament growth in thin film oxides, but it is good enough to explain the common approach of resistive switching and the primary redox reactions in SiO₂ based CBRAM. Indeed, due to the variations in thin film properties, fabrication conditions and characterization environment, inconsistent filament morphology and growth direction have been reported across different works. Some in-situ microscopy of oxide based CBRAM also show a reversed filament growth, i.e. from inert electrode towards active electrode [84, 85]. In addition, recent electrochemistry studies point out that water moisture in SiO₂ may affect the growth dynamics in significant way [86]. A detailed discussion on this will be provided in a later section.

2.2 Cation conduction in SiO₂ thin films

Classical solid electrolytes such as silver iodide (AgI) show essentially no electronic conduction. In contrast, higher chalcogenides can be doped to become mixed ionic-electronic conductors (e.g. Ag-GeS [88] or Ag-GeSe [89]). Oxides such as SiO₂, Ta₂O₅ or Al₂O₃ are not considered as classical electrolytes but at the nanoscale they can conduct cations. This is exploited in oxide based CBRAMs. The diffusion coefficient of singly ionized cations in bulk SiO₂ has been measured by capacitance-voltage measurements and Rutherford backscattering spectroscopy [90]. When extrapolated to room temperature, the diffusion coefficient of Cu⁺ and Ag + would be D _Cu ≈ 10⁻²¹ cm²/s and D _Ag ≈ 10⁻²³ cm²/s respectively. With the ion drift velocity for high-field ionic drift given as

$$ {v}_D=\frac{ D ze}{k_B T}{E}_0 \exp \left(\frac{E}{E_0}\right), $$

(1)

a typical switching voltage of V _SET = 0.5 V and a SiO₂ film thickness of 20 nm (i.e., an electric field of E = 250 kV/cm), one would calculate a switching time of more than a year. Here, k _B is the Boltzmann constant and E ₀ = 1 MV/cm [91]. Even if the effective length of cation migration is reduced to 1 nm, the calculated switching time is still orders of magnitude higher than observed in experiments. It is difficult to explain higher diffusion coefficients by Joule heating in SiO₂ based CBRAMs (in contrast to OxRAMs based on the Valence Change Mechanism [92]), as switching is reported even in the pA-range [93]. Recently, redox reactions of Ag or Cu at the interface with SiO₂ [53, 58] have been studied by cyclic voltammetry (CV) and the estimated diffusion coefficients are much higher than reported for bulk materials.

Figure 2 depicts exemplary cyclic voltammograms (1st cycle of a pristine cell and a subsequent cycle) of a Cu/SiO₂/Pt CBRAM device. The current peaks j _p are attributed to anodic and/or cathodic redox reactions. As a three-electrode configuration is difficult to use in vertical thin film structures, specific redox reactions cannot simply be identified by the peak positions. However, we can use the standard redox potentials (Table 2) to discuss which reactions are most likely to be observed [53, 94]. For the pristine device (no cations present), Cu is at first oxidized to Cu²⁺ given this reaction is thermodynamically more favourable and j _p,ox(1) is attributed to this reaction. The oxidation to Cu⁺ takes place at higher absolute voltages. When the voltage direction is changed, Cu⁺ is reduced to Cu (j _p,red(2)) and afterwards Cu²⁺ to Cu (j _p,red(1)). There might be also a reduction of Cu²⁺ to Cu⁺ at even lower voltages. Some Cu⁺ ions may not be reduced during the first cycle and an oxidation to Cu²⁺ takes place at the beginning of the second cycle (j _p,ox(2), which is not observed in the first cycle). Apparently both cation species can be found in SiO₂. X-ray absorption spectroscopy reveals that Cu²⁺ is the more mobile ion species than Cu⁺, thus Cu²⁺ is believed to dominate the switching effect [95]. From the CV-curves the ion concentration and diffusion coefficient can be estimated [96].

Fig. 2

Cyclic voltammetry of a Cu/SiO₂/Pt CBRAM device (reproduced from Ref. [53] with permission by the Royal Society of Chemistry)

Table 2 Standard redox potentials of some selected redox reactions [94]

In contrast to AgI the ion concentration in SiO₂ depends on the device operation. When the voltage sweep rate ν is high, only a short time to generate ions is available, and thus the ion concentration c _ion is lower compared to low sweep rates (c _ion accounts for all ion species, including cations and counter charges, see below). Due to ion-ion interactions similar to what is observed in concentrated solution conditions, the effective diffusion coefficient of the ions depends on c _ion [53]. Figure 3 depicts the ionic diffusion coefficients of Ag and Cu based SiO₂ and Ta₂O₅ cells, respectively. Note that the diffusion coefficient shown here is that of the limiting ionic species. As there is a difference between Ag and Cu based cells (assuming similar redox reactions at the counter electrode) D _ion is most likely the diffusion coefficient of Ag or Cu ions, respectively.

Fig. 3

Ionic diffusion coefficient of Ag and Cu based SiO₂ (data from Ref. [53, 97]) and Ta₂O₅ (data from Ref. [98]) CBRAMs

2.3 Electrochemical reactions and the role of counter charge

Early simplified switching models [99] only accounted for the anodic oxidation at the active electrode and the role of the counter electrode was almost ignored. When no cations at the filament tip or at the counter electrode are available, a counter reaction is required to compensate the reaction at the opposite electrode. Electro-neutrality is given by either a redox reaction at the counter electrode and/or counter charges including hydroxide ions OH^─ or electrons. Surprisingly, the compensation of the anodic oxidation just by electrons (leakage current) has been found to be less likely by various switching studies in variable atmospheres [86]. The electrode reaction may therefore be represented by

$$ {2\mathrm{H}}_2\mathrm{O} + {2\mathrm{e}}^{\hbox{--}}\to {2\mathrm{O}\mathrm{H}}^{\hbox{--} } + {\mathrm{H}}_2. $$

(2)

In Eq. 2, the OH^─ are the counter charges. As previously mentioned, the overall ion concentration c _ion consists of all involved ions and the contribution of cations${\ c}_{{\mathrm{Me}}^{+}}$ and OH^─ ${c}_{{\mathrm{OH}}^{-}}$cannot be clearly separated by measurement (assuming no electronic conductivity):

$$ {c}_{\mathrm{ion}}={c}_{{\mathrm{Me}}^{+}}+{c}_{{\mathrm{OH}}^{\hbox{-} }} $$

(3)

However, for Ag-based devices ${\ c}_{{\mathrm{Me}}^{+}}$ ≈ [Ag⁺] ≈ ${c}_{{\mathrm{OH}}^{-}}$ and for Cu-based devices ${\ 2\ c}_{{\mathrm{Me}}^{+}}$ ≈ 2 [Cu²⁺] ≈ ${c}_{{\mathrm{OH}}^{-}}$ is a reasonable approximation.

Knorr et al. first reported the impact of water on switching in organic thin film junctions [101], followed by experiments for Ta₂O₅ and SiO₂ based devices [100, 102]. While Tsuruoka et al. reported on the strong impact of the ambient humidty on the SET voltage V _SET of Cu/SiO₂/Pt devices, no effect is observed for Ta₂O₅ based devices (Fig. 4(a)). FT-IR studies revealed that for Ta₂O₅, incoporated water is not removed in vacuum [100]. However, in a recent study, Mannequin et al. showed that the sensitivity to the water partial pressure pH₂O depends on the deposition conditions [103].

Fig. 4

Impact of (a) the ambient pressure on the resistive switching characteristics of SiO₂ and Ta₂O₅ based systems (reproduced from Ref. [100] with permission by John Wiley and Sons), and (b) the impact of the water partial pressure pH₂O on CV curves of Cu/SiO₂/Pt CBRAMs (reproduced from Ref. [86] with permission by the American Chemical Society)

The influence of the ambient atmosphere on SiO₂ devices is not due to a water-triggered increase of the ion mobility. Figure 4(b) depicts CV-curves for a Cu/SiO₂/Pt CBRAM for variable pH₂O [86]. The electrochemical response is increased by the increase of pH₂O, and so is the ion concentration while the diffusion coefficient remained nearly constant. More importantly, the electromotive force (emf) depends strongly on pH₂O (Fig. 5(a)) [86]. In a high input-impedance emf measurement, the impact of the ion mobility is completely supressed. The cell voltage V _Cell is directly linked to the emf-voltage by the ratio of the ionic and electronic transfer numbers [105]. By tuning pH₂O, V _Cell can be reproducibly increased and decreased (inset Fig. 5(a)). The more hydroxide ions can be formed, the more cations are injected into the oxide. Thus, c _ion depends on the catalytic activity of counter electrode material. Electrodes like Pt, Ir or Ni show a high ion concentration compared to electrode materials like Zr or Ti as expected from their hydrogen evolution potential [104].

Fig. 5

Role of OH⁻ on redox reactions in SiO₂ based CBRAMs. (a) Impact of pH₂O on the cell voltage V _Cell, and thus, on the emf-voltage. The cell voltage can be reproducibly increased and decreased (shown in inset). Reproduced from Ref. [86] with permission of the American Chemical Society. (b) Impact of the ion concentration on the counter electrode materials’ hydrogen evolution potential (reproduced from Ref. [104] with permission by the Royal Society of Chemistry)

3 Device characterization

3.1 Recent advances and challenges in in-situ electron microscopy

The filamentary model was proposed based on the electrical characteristics of the device, including the dramatic change in current and the observation that the on-state resistance does not scale with electrode size [38]. However, direct evidence of filament existence is required to support such hypothesis. Electron microscopy (EM) is a versatile technology to monitor the filament in CBRAMs and to characterize the switching in-situ (or in-operando). There are three EM techniques to be distinguished:

• Scanning Electron Microscopy (SEM)

• Transmission Electron Microscopy (TEM)

• Scanning Transmission Electron Microscopy (STEM)

The first ex-situ images of conductive filaments in CBRAM-type switches were reported by Guo et al. in 2007 in a Ag/H₂O/Pt system [106], in which the conductive filament after switching were analysed by SEM. Since then, this simple but efficient technique has been widely adopted to image filaments grown in many CBRAMs, including SiO₂ based CBRAM [82, 107]. Figure 6 shows a SEM image of filament growth in Ag/SiO₂/Pt planar CBRAM. As shown in Fig. 6(d), a Ag filament appears after 30 V voltage applied on Ag electrode for 210 s. The filament has a conical shape with a thicker part close to Ag electrode. Rather than a continues metallic filament usually observed in chalcogenide based CBRAM [108], the filament in SiO₂ shown in Fig. 6 is composed of many discrete Ag particles distributed on the surface or penetrated into SiO₂ layer. This granulated filament can be a result of low ionic mobility and redox reaction rate in SiO₂ material.

Fig. 6

Dynamic filament growth in planar Ag/SiO₂/Pt CBRAM. (a) as-fabricated device, (b–d) stressed for 10s, 150 s, 210 s at 30 V with compliance current of 10uA. Reprinted by permission from John Wiley and Sons: Advanced Functional Materials, Ref [107]

An early TEM imaging of physical filament was reported by Zhi et al. in which real-time filament growth in a Ag/Ag₂S/W CBRAM was characterized in-situ [109]. Later, ex-situ TEM studies on the growth of filaments in Ag/SiO₂/Pt were reported by Yang et al. [82]. In contrast to the devices studied by Zhi et al., the authors fabricated planar structures with a lateral gap in between the Ag and Pt electrode (gap length ≈ 200 nm). A pristine device, the device after switching and after erase are shown in Fig. 7(a–c), respectively. Figure 7(d, e) depict the I/V curves for switching and erase. Interestingly, more than one filament is formed (indicated by arrows) in the gap. Moreover, the filament grows from the Pt electrode towards the Ag electrode, which is consistent with the classical electrochemical theory [10]. In another device, where the authors studied the formation of the metal bridge by ex-situ SEM, the filament appears to grow from the Ag electrode towards the inert electrode.

Fig. 7

Ex-situ resistive switching of a Ag/SiO₂/Pt lateral device on suspended Si₃N₄ TEM windows. The scale bar for a-c is 200 nm. (a) Pristine state of the device after fabrication. The device structure is shown in the inset. (b) Device after resistive switching and (c) after erase. (d) and (e) depict the I/V curves for switching and reset, respectively. Reprinted by permission from Macmillan Publishers Ltd.: Nature Communication, Ref. [82], copyright 2012

More recently, Yang et al. published a study on resistive switching analysed by in-situ TEM [110]. In this study, the authors deposited a thin layer (~ 10 nm) of SiO₂ on a sharp and movable W-tip to contact the oxide with a Ag wire forming a W/SiO₂/Ag layer structure. The in-situ observations indicate a growth of the Ag filament (within the oxide) towards the W electrode and part dissolution of the filament upon reset. However, the current response during the switching looks significantly different from what is typically observed in crossbar devices in ambient conditions. Again, this could be contributed to the absence of OH⁻ ions acting as counter charges. In the same study, the authors fabricated Au/SiO₂/Au devices by FIB-cut with Ag, Cu, Pt and Ni particle inclusions in the oxide matrix. By applying a voltage between the Au electrodes, the particles migrate within the oxide. The authors concluded that their observations can be best explained by dynamic nanoparticles within the oxide which are formed and migrate depending on a complex interplay between the redox rate (i.e., how fast ions are generated) and the ion mobility (see Fig. 8). This interplay could not only explain the different growth directions observed for CBRAMs but also the different sizes and shapes of filaments observed by in-situ and ex-situ TEM. Furthermore, the redox rate and ion mobility may be different on the local scale and subject to the ambient conditions as well.

Fig. 8

Model to explain the effective growth direction of the filament and the filament shape depending on the redox rate Γ ⁱ and ion mobility μ of a particular ion i (i.e. Ag⁺ or OH⁻). (a) For a high mobility and high redox rate, a thick filament grows from the inert electrode towards the active electrode. (b) In case both mobility and redox rate are small, the nanoparticles intrusion is only a few nanometer while the ions are sufficiently fast reduced by electrons. (c) For low mobility and a high redox rate, larger clusters are formed within the oxide and appear to migrate while the driving force is applied. (d) For a high mobility but low redox rate, a thin filament dendrite is formed growing again from the inert electrode towards the active electrode. Reprinted by permission from Macmillan Publishers Ltd.: Nature Communication, Ref. [110], copyright 2014

It stands to reason that the electron perturbation into the switching material during in-situ TEM could affect the formation, reduction and migration of cations (and could even act as counter charges). With a typical TEM electron-beam current well below I = 1 μA (n _e  = I/e ≈ 6 × 10¹² electrons per second), an acceleration energy of E = 200 keV = m ₀ v ²/2 and the electron mass m ₀ = 9.12 × 10⁻³¹ kg, the electron velocity is v ≈ 2x10⁸ms⁻¹. Each electron is then separated on average by v/n _e  ≈ 30 μm, and thus, with a sample thickness usually below 100 nm statistically less than one electron is found in the specimen at a given moment. Hence, unintentional interactions of the electron-beam with cations might seem to be a minor problem. However, especially at low switching currents below 100 nA, electron-beam induced artefacts might be inevitable.

A more serious concern is the device geometry. For purely lateral devices where the electrodes are patterned by electron-beam lithography for example, the switching gap distance (e.g. 200 nm [82]) is significantly larger than for vertical devices (usually below 20 nm). Furthermore, devices prepared by FIB cut can suffer from ion-beam induced damage [111]. In most cases, the geometry and surface to volume ratio is different from that of vertical devices and filaments could be formed (in part at least) at the surface of the oxide matrix rather than inside. For lateral devices the electrodes might be also affected by unintentional surface oxidation during device fabrication, which results in a chemically different electrolyte/active electrode interface. Moreover, switching in high-vacuum is reported to be different from switching in ambient conditions for many CBRAM and even VCM systems [100, 112, 113], in particular SiO₂ based devices [86]. Thus, environmental electron microscopy should be considered for further research in more realistic conditions.

3.2 In-situ spectroscopy

Besides monitoring the filament growth by electron microscopy, in-situ spectroscopy would also be highly desirable. However, most spectroscopic techniques like X-ray photoelectron spectroscopy [86] (XPS) or X-ray absorption spectroscopy [95] (XAS) require large device areas (in the order of ≈ 50 μm × 50 μm for example) and are generally not sensitive enough to study the formation of a filament with an area of π(5 nm)² ≈ 100 nm². In the case of XPS, ultra-high-vacuum conditions are required and the X-rays can interact with the switching material and cations as well.

Recently, Di Martino et al. reported on a new spectroscopic technique, namely Nanoscale Plasmon-Enhanced Spectroscopy (NPES), which allows study of the switching process in ambient conditions by the interaction of incident light with the filament and electrodes which form a plasmonic system [114]. These interactions affect the spectra of the backscattered light and are advantageously very sensitive to atomic reconfigurations in the switching gap. Another advantage of this technique is that nanoscale vertical crossbar structures, similar to those in practical memory arrays, can be analysed with a simple measurement setup. The authors could in-situ probe the resistive switching of an Ag/SiO₂/Au device and the results indicate that filament particles remain in the gap during reset and the filament can grow at different positions from cycle to cycle. However, the drawback of the technique is that the interpretation of the backscattered spectra is challenging as it is not a direct imaging of the filament within the insulator. The choice of the electrodes is also limited to materials (like Au and Ag) which allow sufficient interactions with the incident light.

3.3 Impedance spectroscopy

Impedance spectroscopy (IS) is a simple but powerful electrical method that has been extensively used to investigate electrochemical systems, such as batteries, electroplating, corrosion, etc. [115]. In impedance spectroscopy the characteristics of interfaces and electrolytes can be equivalent to electrical circuits of capacitor, resistor and inductor combination [116]. In recent years this non-destructive method has been widely employed to explore the materials and electrical properties of resistive switching devices and numerous meaningful results have been obtained including: a percolation network identified in a Ag/a-Si CBRAM [117], a layered electrolyte with high and low doped region found in aAg/Ge_xSe_y CBRAM [118], and a filament model observed for a TiO₂ based OxRAM [119].

The impedance response of Cu-SiO₂ CBRAM was also reported in [57]. Figure 9(a) shows the IS results of as-fabricated Cu-SiO₂ CBRAM devices with different sizes [57]. The as-fabricated devices were not being electrically switched; thus it is basically a well preserved MIM capacitor with no physical damages in the dielectric layer. The IS results are presented in a Cole-Cole plot format, in which the abscissa is the real part and the ordinate is the imaginary part of the measured impedance. As shown in Fig. 9(a), the experimental results (symbols) are well fitted to a parallel RC network (red lines). The extracted resistance and capacitance values for devices with different sizes are shown in Fig. 9(b). The extracted resistance and capacitance values agree well with the classical resistance (R_ideal) and capacitance (C_ideal) theory, respectively, i.e., resistance changes inversely with area and capacitance is proportional to area. The extracted dielectric constant is ~5, which is slightly greater than pure bulk SiO₂ (3.9). This could be attributed to the incorporation of Cu atoms into SiO₂ during device fabrication [120]. In addition to as-fabricated devices, programmed devices were also IS characterized. Figure 10 gives the IS results obtained on a 500 × 500 μm² device that has been programmed into a range of resistance states (from 230 Ω to 55 kΩ) prior to IS measurement. By inputting the programmed resistance and capacitance values of the as-fabricated device into the above parallel RC circuit model, the fitting results can be obtained. As can be seen in Fig. 10, the fitting curves (red lines), which show excellent agreement with the experimental data (symbols), indicate that the device capacitance is independent of resistance states. This non-correlation between resistance and capacitance indicates that the multilevel resistive switching occurs only in localized conducting region, which has negligible size compared to the device. The change of resistance state is attributed to the modulation of filament dimension and/or number.

Fig. 9

(a) Impedance spectra of virgin-state Cu/SiO₂ CBRAM with different sizes, symbols are experimental data and solid lines are simulation data, inset picture shows the equivalent RC circuit used for fitting. (b) Extracted resistance and capacitance value vs. device size. © 2016 IEEE. Reprinted with permission from Ref. [57]

Fig. 10

Impedance spectra of a 500 × 500 μm² Cu/SiO₂ CBRAM switched to various resistance states, inset picture shows the equivalent RC circuit used for fitting. © 2016 IEEE. Reprinted with permission from Ref. [57]

4 Device performance

4.1 Technology comparison

Research on novel non-volatile memory devices is mainly driven by the slow programming and high voltage of state-of-the-art Flash memories. The aim is to achieve ultra-fast programming times, preferably below 20 ns. Furthermore, reduction of the power consumption is important for mobile applications and logic-in-memory.

NAND Flash is currently dominating the memory market and has replaced NOR Flash in many applications. The difference between NOR and NAND Flash is different circuitry between individual memory cells, making NAND Flash dense and NOR Flash relatively quick to access. To achieve a low programming energy consumption NAND Flash exploits Fowler Nordheim tunneling of electrons into the floating gate [126]. However, to maintain a high retention time of the logic states (in the order of 10 years), programming by Fowler Nordheim tunneling is significantly slower than hot electron injection used for NOR Flash. Nevertheless, NAND and NOR Flash are clearly outperformed by CBRAM and VCM devices in terms of the programming speed (Table 3). Other drawbacks of NAND Flash are high programming voltages (17–19 V [122]) and the inferior endurance of only a few ten thousand cycles [127]. These drawbacks preclude the use of Flash as components emulating binary logic [128] (logic-in-memory) or the use in neuromorphic applications.

Table 3 Comparison of critical performance parameters of NAND and NOR Flash, and CBRAM and VCM cells, respectively. For Flash switching speed and energy are usually termed as programming speed and energy, respectively

Figure 11 gives an overview of the switching times (i.e., programming times) of a variety CBRAM devices. CBRAMs, including SiO₂ based CBRAM, have in common a non-linear relationship between the applied pulse amplitude required to switch the device and the measured switching time (i.e., the transition time between two logic resistance levels). Menzel et al. pointed out that the non-linear voltage-time relationship originates from the exponential term in the equations of electrochemical processes for filament formation, including nucleation, charge transfer and mixed charge/ion drift [124, 129, 130]. This non-linear switching kinetics is expressed by slow switching times for voltages typically below 0.5 to 1 V and fast switching times for voltages typically between 1 V and 5 V. This behaviour is beneficial for practical applications as it avoids unintended switching when small voltages (e.g., read voltage) are applied over an extended time and is the prerequisite for the non-volatile nature of CBRAMs. Figure 11 also indicates that SiO₂ based CBRAM can achieve very fast programming speed with slightly elevated voltage supply.

Fig. 11

Switching time versus pulse amplitude of several CBRAM devices. The data is extracted for (a) from Ref. [139, 140], (b) from Ref. [141], (c) from Ref. [142], (d) from Ref. [143], (e) from Ref. [144], (f) from Ref. [145], (g) from Ref. [124, 146], (h) from Ref. [147], (i) from Ref. [148] and (j) from Ref. [149]

Apparently, it is difficult to compete against the programming energy of NAND Flash. Generally speaking, experimental values for CBRAM switching energies is around 100 fJ/bit to 700 fJ/bit, which are usually well below those measured for VCM-type RRAMs [122] (with the exception of e.g. Ref. [125]). Such a small switching energy is notably still about 100 times larger than the energy to operate a two-input logic NAND gate [131] However, Flash is slow which restricts its application as a universal memory that would combine the advantages of static RAM (SRAM), dynamic RAM (DRAM) and non-volatile solid state memories [132]. The energy consumption of 4G DDR4 DRAM (accounting for refresh cycles, background power, etc.) is about 1 to 5 pJ/bit [133] with an access time of 2 to 10 ns [134], compared to ≈ 100 fJ/bit [135, 136] for high-speed SRAMs (with access times below 1 ns). Some of recent works show promisingly low energy consumption of resistive memory in single cell level. Ielmini et al. extrapolated a switching energy of 10 fJ/bit for HfO₂ VCM devices and a switching time of t _SET = 5 ns [137]. It is reasonable to assume this to be similar for SiO₂ based CBRAMs (assuming V _SET = 3.5 V, I _CC = 1 μA and t _SET = 10 ns for SiO₂, see Fig. 12). The SiO₂ based CBRAM also has been proved to have better performance in low current regime than its counterparts [138]. Nevertheless, above energy extrapolation is overly simplified without including overhead circuits, more works on benchmarking the energy consumption of SiO₂ based CBRAMs and other CBRAMs/OxRAM technology at circuit and/or product level is necessary for systematic understanding of their power consumption attribute.

Fig. 12

On-state resistance of three 10 × 10 μm² Cu-SiO₂ CBRAM devices cycled for 10 times at each compliance current and the resistance values read at 100 mV. © 2015 IEEE. Reprinted with permission from Ref. [87]

Compared to competing non-volatile memory technologies such as Spin-Transfer Torque Magnetoresistance RAM (STT-MRAM) CBRAMs including SiO₂ based CBRAM offer a high scalability [134]. Quantized conductance levels measured in SiO₂-based CBRAMs [130, 150] suggest an ultimate scalability reaching the atomic level. The most important advantage of SiO₂ based CBRAM over other CBRAM variants is that the SiO₂ is a well-known material which has been adopted by semiconductor foundries long time ago. Another important advantages of this technology its large resistance window, i.e., the difference between the resistances of the logic states R _OFF/R _ON, of usually 100 to 10⁵. This allows multilevel programming, that is, the storage of multiple bit in one device by a number of distinguishable resistance levels for identification of the logic states. While for many VCM systems R _OFF/R _ON < 100 and for STT-MRAM the resistance window is even given in percent. As memory cells are integrated in a memory array, it is not sufficient to look at the performance of a single memory cell but also to consider the overall performance when integrated memory cells are interacting. For STT-MRAM and VCM devices, the small resistance window [135] and the variability [134] are problematic. In fact, Calderoni et al. recently reported that the small resistance window of VCM cells may hinder their use in dense memory arrays and therefore SiO₂ based CBRAM becomes more attractive in such applications [151].

4.2 Multi-level cell (MLC) operation

A generic property of resistive switching memory is multi-level operation capability. In multi-level switching, the on-state resistance, R_ON, can be modulated by the compliance current during the set operation. This property is also observable in SiO₂ based CBRAM. As shown in Fig. 12, the R_ON of CBRAM composed of Cu anode and SiO₂ electrolyte decreases monotonically with the increase of compliance current following the power law,

$$ {R}_{ON}= A/{I}_{prog}^n, $$

(4)

where A is a constant with a unit of voltage and n is a dimensionless number close to 1. Multilevel programming capability is a critical feature for SiO₂ based CBRAM (as well as all other resistive switching memories) as it enables multibit data storage in single cells, thereby dramatically increasing data storage density.

In recent years, several mechanisms have been proposed to explain the multilevel switching phenomenon. In general, two regimes can be separated at a resistance of approximately 13 kΩ. This is because 13 kΩ is the maximum resistance before the break of a metal-metal contact, i.e., the resistance of a single atom point contact [152]. With a resistance state lower than 13 kΩ, the change of resistance can be explained by lateral filament growth [45]. Once the metallic filament is formed, further reduction causes a growth in filament radius. For higher programming current, more cations are produced and electrodeposited, resulting in a thicker filament. Another possible mechanism for resistance in this regime is based on multiple filaments and the reduction of resistance is attributed to an increase in number of filaments [153]. Of course, it is possible that both mechanisms can be presented and contribute to the low resistance value at the same time. On the other hand, there would be no complete bridging of the electrodes by a filament when the resistance is greater than 13 kΩ. The resistance change in this regime could be due to the modulation of tunneling gap between the filament tip and the electrode [129] and/or the adjustment of width of quantum-point-contact (QPC) like constriction region [154]. Since SiO₂ based CBRAM possess no macroscopic difference from its resistive switching variants, it is believed that the above mechanism also applies. Interestingly, the quantized atomic point contact phenomenon has been found in SiO₂ based CBRAM with a Ag anode [155], in which integer multiples of fundamental conductance (G₀ = 2e²h⁻¹ which is approximately 1/12.9 kΩ) were observed. This resistance discretization serves as another viewpoint to support the metallic filament model for the multilevel resistance states.

4.3 Retention

Retention defines how long the stored information is maintained in a memory cell before a readout error occurs. In Flash memory, retention failure is usually due to the loss of electrons from the floating gate [156]. However, since the information stored in CBRAM is a form of physical filament, the retention of CBRAM is associated with the filament stability and movement of metal atoms away from the filament in the insulating layer. In general, the retention of low resistance state (LRS) is more of an issue than that of high resistance state (HRS) [35, 42]. This is because for a metallic filament formed in the LRS, the large concentration gradient between the filament (Cu or Ag) and its surrounding matrix (SiO₂) may create a significant driving force which assists the dissolution of the filament [157, 158]. Absorbed moisture in the SiO₂ may also play a role in filament stability. Recent cyclic voltammetry (CV) studies show that an electromotive force (emf) exists in the presence of moisture in the SiO₂ switching layer of CBRAM [86], and such emf generates an additional voltage which oxidizes the metallic filament and thereby deteriorates LRS retention [159]. An obvious way to improve the LRS retention is to reduce the diffusion of the metal filament either by doping SiO₂ switching layer with metal ions or by increasing the density of the SiO₂. However, optimized conditions exist for both methods. On one hand, excessive doping tends to lower the off-state resistance to unacceptable levels and under doping can result in poor LRS retention [160]. On the other hand, CBRAM’s switching speed slows down and it tends to stuck in LRS if the SiO₂ layer is too dense. The HRS is generally more stable than LRS, even at elevated temperature, since no filamentary structure exists. However, a recent report demonstrated that the HRS resistance tends to decrease at high temperature if the reset operation is incomplete [161]. For incomplete reset, some filament residues left in the insulating layer, at elevated temperature, these filament residues gradually dissolve into the surrounding oxide matrix which increases the oxide conductivity in a similar way to metal doping. In recent years, excellent retention has been illustrated for CBRAMs with different oxide switching layer [161–163]. CBRAM with a SiO₂ switching layer has been proved to possess good retention performance at high temperature. In a recent study of Cu-SiO₂ (PECVD) CBRAM [138], both HRS and LRS can maintain its programmed value for more than 10⁴ s at 150°C without showing obvious degradation.

It should be noted that in certain circumstances bad LRS retention is even more favorable. CBRAMs with poor LRS retention exhibit volatile resistive switching [107, 164–167], in which the filament automatically breaks apart in a short amount of time if the holding voltage is small enough. Volatile switching is a desirable property for many applications such as low refresh dynamic memory, inherent selectors for non-destructive readout of complementary resistive switches [168], short-term-memory (STM) in neuromorphic application [169, 170], or threshold switches operating as selector devices in crosspoint arrays. Recent work on SiO₂ based CBRAM also shows that excellent volatile switching characteristics is achievable if the SiO₂ layer is properly engineered [171], details will be discussed in a later section.

4.4 Endurance

Endurance is determined by how many write-erase cycles a memory cell can perform before failure (stuck bits) occurs. Endurance is associated to programming energy and better endurance is generally achieved from smaller programming energy, i.e. lower programing currents and shorter voltage pulses. Endurance is also influenced by the control of damage during set process, the transient current spike, which usually arises from circuit parasitics, during programming can potentially damage a memory cell in a significant way [172–174]. An integrated 1 T-1R (1 transistor 1 resistive element) configuration effectively prevents this damaging current spike and leads to better endurance performance [175, 176]. The endurance of Cu-SiO₂ CBRAM with 1 T-1R configuration was investigated and reported in [138], where 10⁴ cycles of programming/erase was achieved without obvious sign of degradation for both HRS and LRS. This result indicates that SiO₂ based CBRAM has no obvious shortage in terms of endurance performance when compared to its CBRAM counterparts [29, 36, 69, 75, 163, 177–179]. The excellent endurance performance suggests that SiO₂ based CBRAM has good potential to replace Flash memory, DRAM, or become a new type of memory solution in between. The endurance of Cu-SiO₂ CBRAM can be also improved through a better control of anodic metal (Cu or Ag) incorporation during set process. A copper alloy electrode instead of pure copper is reported to be able to limited the rate of Cu/oxide inter-diffusion which effectively eliminates the problem of over incorporation of copper during programming [180].

5 Circuits and applications

5.1 Memory arrays

In order to bring any memory technology to reality, the individual memory cells have to be connected to form arrays. At the array level, it is impossible to correctly store and retrieve information without good cell-to-cell isolation. “Sneak paths” between cells are one of the fundamental causes of reading and writing failures [123]. In order to overcome this challenge, an access device (AD) is typically integrated in series with each memory element. Access devices can be active elements, such as a transistor, or passive elements, such as a diode or other non-linear selector. Thereby, a one transistor and one resistive element (e.g. 1 T-1R) configuration forms the building block of active arrays, whereas a one selector and one resistive element (e.g. 1S-1R) configuration is the key for passive arrays.

5.2 Active arrays

1 T-1R active arrays have been demonstrated by various groups [29, 37, 68, 181–184]. A schematic of such an array is shown in Fig. 13. In this case, the active electrode of the storage cell is connected to the bit-line, the transistor gate is connected to the word-line, the cell’s inert electrode and the transistor drain are tied together and the transistor source is connected to a reference voltage (V_s). With this configuration, the cell can be randomly accessed by applying voltages on the addressed word-line and bit-line simultaneously. In order to program the cell, the bit-line voltage is set higher than the reference voltage (V_s in Fig. 13), while the cell can be erased by reversing the voltage polarity between bit-line and reference node.

Fig. 13

Configuration of 1 T-1R active array. Each node consists of a resistive switching memory cell and a transistor

Belmonte et al. studied 1 T-1R integrated Cu-SiO₂ CBRAM and compared its performance to Cu-Al₂O₃ CBRAM [138]. They found that CBRAM with a SiO₂ switching layer works better than its counterparts when programming current is small (< 10 μA). For the reason, the authors claimed that less current induced Joule heating is required to activate Cu movement in thin film SiO₂ because it has a higher ion mobility than Al₂O₃. This low power attribute of SiO₂ based CBRAM is desirable for low power applications. The paper also demonstrates other superior performance characteristics of Cu-SiO₂ CRBAM, for example, it can be repeatedly switched with pulses as short as 10 ns and both of its LRS and HRS were well maintained after baking at 150°C for hours. The above results show that CBRAM is promising data storage technology. However, considering that the area of an individual storage unit 1 T-1R is governed not by resistive switching element but by the selecting transistor, which is typically 20F² to 6F², CBRAM with 1 T-1R configuration loses its advantage when competing with NAND Flash (4F²) for massive data storage, especially with the continuous maturation of 3D NAND technology. Nevertheless, due to the low power and fast programming/reading characteristics of 1 T-1R SiO₂ CBRAM, it is still an ideal alternative to NOR Flash for low power embedded system.

5.3 Passive arrays

A passive array differs from active array in that it employs a two terminal passive device instead of transistor to prevent the current sneak path. This passive device is also known as a selector which typically has a non-linear voltage-current relationship. Every selector has a non-zero characteristic voltage which is also known as threshold voltage, below this voltage, the selector is effectively off and the current is small, while above threshold voltage, the selector turns on and the current increases dramatically. Different from memory device, the LRS of selector devices is volatile, which means that it will switch back to HRS automatically once the applied voltage drops below the non-negative threshold value. The building block of passive array contains one resistive element and one selector with a 1S-1R configuration, shown in Fig. 14. Memory cell are connected in series with selector and it can be randomly accessed by applying voltages on corresponding word-line and bit-line. To program an individual cell, the programming voltage is applied to the bit-line while the word-line is grounded. Half the programming voltage is applied to all non-selected lines. The selector’s threshold voltage should be higher than half programming voltage but lower than the programming voltage. In this way, only the selected device with full programming voltage can be accessed while the rest of the cells are blocked by their selectors. The main advantage of the 1S-1R approach is that it eliminates the need for 3-terminal transistor, thus the most compact circuit layout (4F²) is achievable. Moreover, a passive array can be stacked to create an ultra-dense 3D crosspoint memory array which may best 3D NAND Flash for massive data storage.

Fig. 14

Configuration of 1S-1R passive array. Each node consists of a resistive switching memory cell and a selector

Several types of selectors have been proposed including the chalcogenide based Ovonic switch [185], transition oxide (VO₂ and NbO₂) based metal-insulator transition (MIT) based devices [186, 187], as well as a mixed-ionic-electronic-conduction (MIEC) selector technology [188, 189]. Except for the MIEC selector, the other two selectors (Ovonic, MIT) suffer a high-off state leakage current problem. Since CBRAM is a filamentary technology, the concentration gradient between the metal filament and the surrounding oxide matrix can be gigantic which may allow for fast filament dissolution. A CBRAM can therefore be engineered to be a selector by greatly enhancing the filament dissolution rate. Based on this, a SiO₂ based CBRAM has been fabricated with volatile switching property [55]. Figure 15 shows the typical volatile switching I-V curve of a 5 × 5 um² Cu/SiO₂/Pt CBRAM device. The device was swept with a range of compliance currents from 10 nA to 500 μA with a threshold voltage (V_th) between 0.5 V and 0.8 V. The LRS is maintained when the voltage is sufficiently large while it turns back to HRS spontaneously when removing the applied voltage. A rectifying ratio as big as 5 × 10⁷ is obtained at ±0.8 V with a compliance current of 500 μA. Such a high rectifying ratio suggests the usage of this device as a sneak path blocking selector. Considering that this device is strongly rectifying only for positive voltage, it would only be suitable for unipolar memories in which programing and erasing occurs at the same voltage polarity. Figure 15 also demonstrate that volatility of this specifically engineered Cu-SiO₂ CBRAM is independent of compliance current up to 500 μA, such high current is more than enough for the programming of phase change memory.

Fig. 15

Typical threshold switching I-V characteristics of Cu/SiO₂/Pt CBRAM. © 2016 IEEE. Reprinted with permission from Ref. [171]

SiO₂ based CBRAM can be also engineered to have an inherent diode in conjunction with memory cell [190]. The contact made between Cu filament and a heavily doped silicon electrode forms a Schottky diode. This unique method provides a simple approach for cell isolation which requires no additional layer. The authors reported that the virgin-state resistance for this device is above 10GΩ, which is sufficient to prevent ‘sneak’ current flow in a sub-array. Upon switching, the reverse bias blocking resistance is approximately 300MΩ at half read voltage magnitude (−0.25 V) which is large enough to ensure correct reading operations. It should be mentioned that the diode’s reverse leakage current was proportional to the LRS resistance as both are related to metal filament diameter. It is important that the device can be reset by negative voltage (about −4.6 V), which is a fundamental property required for it to be used in bipolar memory cells.

5.4 Neuromorphic systems

Bio-inspired neuromorphic computation has been gaining popularity as an alternative to the von Neumann based computing architecture for power efficient artificial intelligence applications. In human brain, there are about 20 billion neurons [191] connected together forming a gigantic neural network for learning and task operations. For every connection, there is a synapse which transmits signals between adjacent neurons. Biological learning occurs through gradually and continuously changing the strength (conductivity) of these synapses [192]. In order to emulate biological synapse, the electronic synapse must possess a similar plasticity, i.e., a gradual change of resistance. A CMOS based electronic synapse has been developed which contains tens of transistors and capacitors [193]. Given the number of synapses in a typical neuromorphic system, the chip’s area cost would be unaffordable. In this respect, a two terminal RRAM based electronic synapse is highly desirable due to their structural simplicity and excellent scalability. Several OxRAM and CBRAM technologies have been demonstrated to be capable of changing resistance incrementally [74, 194–196]. CBRAM with a thermally doped SiO₂ layer also show promising synaptic behavior [55] and its inherent CMOS compatibility eases the adoption by current semiconductor foundries.

The resistance plasticity of Cu/Cu: SiO₂ CBRAM was characterized by quasi-static DC and transient pulses in [55]. As shown in Fig. 16(a), the resistance of the device decreases with an increase in positive bias, this represents the potentiation (P) in the synapse. Conversely, the resistance of a low resistance (programmed) device increases with an increase in negative bias, which corresponds to the depression (D) in a biological synapse (Fig. 16(b)). The ability to produce both potentiation and depression in Cu/Cu: SiO₂ CBRAM favors both online and offline training. Interestingly, all of the discrete incremental curves are generally contained within the dotted curve obtained from a full range voltage sweep, this property indicates that a complete sweep is equivalent to a combination of discrete sweeps. This combinational property is especially useful for learning speed adjustment. In addition to DC, the device resistance is also tunable with electric pulses, which is a more realistic evaluation of the synaptic performance. In pulse testing, groups of potentiating or depressing pulses were applied with 20 mV difference between two consecutive groups. In every pulse group, a pulse-train of 10 identical 10 μs pulses are applied. Figure 17(a) and (b) show the experimental waveforms for a sequence of potentiation and depression pulses, respectively. The amplitudes of applied pulse (V1) are differentiated by colored curves, while the black curves (V2) are the response pulses which represents the voltages across a serially connected resistor. Therefore, the resistance change of the CBRAM can be extrapolated from this voltage divider. It is observable that the magnitude of response pulses is continuously increased (or decreased) with the number of programming pulses, which implies that the device resistance is gradually changing. The calculated resistance ranges from 3 kΩ and 20 kΩ. This wide resistance window and dense distribution indicate that Cu/Cu: SiO₂ CBRAM is suitable for neuromorphic application. Furthermore, the tuning voltage is around 1 V for both potentiation and depression. This voltage is compatible with the supply voltage of most current CMOS chips, thereby eliminating the need for charge pumps.

Fig. 16

DC characteristic of thermally doped Cu/Cu: SiO₂ CBRAM device showing gradual resistance change. (a) Potentiation, graduate resistance decrease, (b) Depression, gradual resistance increase [55]. © IOP Publishing. Reproduced with permission. All rights reserved

Fig. 17

Electrical pulse characterization of thermally doped Cu/Cu: SiO₂ CBRAM. (a) Potentiation, (b) Depression [55]. © IOP Publishing. Reproduced with permission. All rights reserved

5.5 Radiation tolerant memory

Energetic particles, such as photons, electrons and protons, generate electron-hole pairs (ehps) when striking at solid-state materials. This effect causes total ionizing dose (TID) damage [197] which may degrade the performance of electronic devices over time. Since TID generally leads to excess charged defect buildup in solid state materials, conventional charge-storage based NVMs, such as Flash and EEPROM, are not desirable for medical electronics and space systems which are usually exposed to high doses of ionizing radiation [198]. Therefore finding aradiation tolerant NVM is critical for reliable operation of those kinds of applications. Owing to the fact that the operation of resistive switching memory is based on physical filament instead of charge, it has better radiation immunity than charge-storage based NVMs. Extensive studies have been performed to assess the TID response of resistive switching devices including cation based CBRAM [4, 199–202] and anion based OxRAM [203–206].

Chen et al. produced a comprehensive study of TID response of Cu-SiO₂ based CBRAM [87]. The devices were step exposed to ⁶⁰Co gamma-rays with a maximum TID of 7.1 Mrad(SiO₂). This TID dosage is well above the common dosage used for device sterilization in hospitals. Figure 18 illustrates the I-V curves of as-fabricated Cu-SiO₂ CBRAM before and after TID exposure. Three 10 × 10 μm² and three 100 × 100 μm² devices were tested. The voltage sweeps stopped at 100 mV to avoid any oxidization of Cu electrode, which eliminates the resistance change of SiO₂ caused by Cu incorporation. In addition, the TID effects on switched devices were also assessed. A set of ten 10 × 10 μm² devices were cycled 10 times at different dosage. Figure 19 plots the cumulative probability distribution of HRS and LRS respectively. Based on the results shown in Figs. 18 and 19, the gamma-ray irradiation has negligible impacts on the resistances of as-fabricated device, its HRS as well as LRS.

Fig. 18

I-V characteristics of virgin Cu-SiO₂ CBRAM with a size of 10 μm and 100 μm at different TID levels. © 2015 IEEE. Reprinted with permission from Ref. [87]

Fig. 19

TID impacts on ON- and OFF-state of Cu-SiO₂ CBRAM. (a) Cumulative probability of ON-state resistance at different TID, (b) cumulative probability of OFF-state resistance at different TID. © 2015 IEEE. Reprinted with permission from Ref. [87]

The TID impacts on multilevel switching were also investigated since the reliability of intermediate resistance states is vital for multilevel cell (MLC) NVMs used for neuromorphic computing. In [87], three 10 × 10 μm² devices were switched over a range of compliance currents before and after gamma-ray exposure. The results are shown in Fig. 20. Again, no significant variation can be observed between irradiated and non-irradiated devices as both of them show similar the power-law dependence and the multilevel resistance curves are well overlapped with each other.

Fig. 20

TID impacts on multilevel programmability of Cu-SiO₂ CBRAM, comparison of R_on vs. I_prog before and after 7.1 Mrad(SiO₂) TID. © 2015 IEEE. Reprinted with permission from Ref. [87]

The authors believe that the ionizing radiation immunity of the HRS in SiO₂ based CBRAM devices may be attributed to the absence of photo-doping effects in e-beam evaporated SiO₂. The photo-doping phenomenon in chalcogenide glasses has been widely observed and is believed to be triggered by the interaction between active electrode (Ag or Cu) and the photo-generated electron-hole pairs (ehps). Since the bandgap of SiO₂ (~ 9 eV) is much larger than Ge_xSe_1-x (< 2 eV), considerably fewer ehps will be created in SiO₂ which reduces the rate of this interaction process. Moreover, different carrier traps present in SiO₂ as compared to the chalcogenide glasses may be another reason. DFT calculations predics that the majority trap in chalcogenide glasses is electron trap [207] while positively charged hole traps generally exist in SiO₂. The positively charged hole traps would repel rather than attract Cu ions which prevents its diffusion into SiO₂.

Besides the aforementioned applications, recent studies indicate that SiO₂ based CBRAM also holds great potentials for applications in another novel computing paradigm known as logic-in-memory [208, 209]. Logic-in-memory is a concept where a single device arranged in a dense array is capable to perform both logic and memory operations. A major benefit of this concept is that the energy wasted by interconnects during data transfer can be saved.

6 Challenges and perspectives

Even though significant progress has been achieved in SiO₂ based CBRAM, the omission of potential problems may greatly slow down its commercialization speed. For example, are those observed characteristics and obtained conclusions still valid for nanoscale devices? In such small scale, the filament size may be comparable to the size of device or even the entire device is a filament. The impact of Joule heating may be amplified and cannot be neglected in tightly enclosed nano-structure. Also, a slight difference in filament morphology (contact angle, number connecting atoms and branches) could lead to huge resistance variation at nanoscale, this problem is extremely fatal to MLC or neuromorphic applications in which a tight distribution of multilevel states is particularly required.

Apart from device variation, the process integration of SiO₂ based CBRAM is also a great challenge. Although Cu interconnect has been widely adopted in current back-end-of-line (BEOL) process and Cu diffusion can be well controlled by diffusion barriers, the migration of Cu can still happen between the CBRAM’s side-wall and isolation layer where the diffusion barrier doesn’t exist. This migration process may be even accelerated by the high surface energy of grain boundaries which potentially threats the device performance. In addition, compatible selector for this CBRAM type is still unavailable. An ideal selector should have low HRS current leakage, high endurance, large ON/OFF ratio, bipolar switchability and process compatibility. Furthermore, metal doping of SiO₂ is required in certain circumstances, thus, the thermal budget for the periphery circuits fabrication should reconsidered to avoid undesired transistor characteristics.

7 Conclusions

In this review we have examined Conductive Bridging Random Access Memory based on silicon dioxide films. CBRAM in general has shown considerable promise as non-volatile memory for devices powered by small batteries, such as wearable electronics and elements in the Internet of Things, because of its low voltage and low current operation. To date, most CBRAM development has involved higher chalcogenide materials, due to the attainable high metal ion mobility and consequent fast switching, but the process compatibility and ubiquity of silicon dioxide in CMOS integrated circuits increases the acceptability of the technology in production facilities, including semiconductor foundries.

Despite the operational similarities of oxide-based CBRAM with other variants of the technology, there are some fundamental differences. SiO₂ is not a “classical” electrolyte and metal ion mobility in bulk material is low compared to higher chalcogenide glasses. However, very thin films (in the order of a few nm to a few tens of nm thickness between electrodes) exhibit unusually high Cu ion mobility and this allows devices to switch in timescales that are acceptable for many NVM applications. The role of OH⁻ ions as countercharge in the electrochemical reaction process is also interesting and is not generally considered in devices based on higher chalcogenide electrolytes. In addition, the shape of the filament and apparent growth direction, as shown by in-situ SEM analysis, can be different than chalcogenide-based devices due to the way that the metal ions supply the filament growth but electrical characterization, particularly impedance spectroscopy, has confirmed the general filamentary model for these structures.

Oxide based CBRAM devices exhibit sub-1 V switching and compare favorably with Flash memory in terms of speed and switching energy. The low energy and non-volatility of the technology allows it to be used for compact computation/logic functions as well as storage. They are capable of being programmed over a wide range of currents which in turn provide a considerable series of on-state resistance values. This allows SiO₂-based CBRAM to not only be used in multi-level cell storage but also in neuromorphic applications in which the controlled gradual decrease and increase in resistance can be used to represent potentiation and depression respectively. Resistance control is possible in both active and passive arrays, the latter being possible via an inherent diode selector device. Finally, the impressive radiation tolerance of the technology allows it to be used not only in aerospace and deep space missions but also in medical device applications where gamma ray sterilization or therapeutic radiation would otherwise adversely affect Flash memory devices.