Abstract
Indium-gallium-zinc oxide (IGZO) thin films have attracted significant attention for application in thin-film transistors (TFTs) due to their specific characteristics, such as high mobility and transparency. The performance of a-IGZO TFTs with four different insulators (SiO2 Si3N4, Al2O3 and HfO2) is examined using a numerical simulator (Silvaco Atlas). It is found that the output performance is significantly enhanced with high relative permittivity of the insulator. HfO2 gives the best performance: lower threshold voltage 0.23 V and subthreshold 0.09 V dec−1, higher field-effect mobility 13.73 cm2 s−1 V−1 and on current (Ion) and Ion/Ioff ratio \(2.81 \times 10^{ - 6}\) A, \(5.06 \times 10^{12}\), respectively. Therefore, HfO2 gate showed high stability compared with other gate insulator materials.
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1 Introduction
Transparent amorphous oxide semiconductors (TAOS) have attracted more attention compared to conventional transparent oxide semiconductor (TOS) such as zinc oxide (ZnO), indium oxide (In2O3) and indium-doped zinc oxide (IZO). Amorphous indium-gallium-zinc oxide (a-IGZO) is the most promising TAOS due to several good properties such as higher mobility, larger band gap, better transparency and room temperature deposition. a-IGZO has a wide application, especially in thin-film transistors (TFT). TFT based on a-IGZO replaced the conventional TFTs based on amorphous silicon (a-Si), zinc oxide (ZnO) or organic semiconductors (OSC) [1, 2]. Enhancing the performance of a-IGZO was the objective of several groups [3,4,5]. The instability of a-IGZO TFTs following a stress by bias, light, temperature or mechanical is a serious drawback and a sensitive issue in application and industry. Also, a considerable work is ongoing to understand the reasons for this instability following a negative bias illumination stress [6, 7] or a positive bias stress [8, 9]. Several ways are implemented in order to reduce the impact of this instability such as finding an optimal structure [10], using a passivation layer [11], physical and chemical treatments after deposition [3] and finding an optimal insulator of the gate from the channel of the a-IGZO TFT [12]. Various gate insulators, such as silicon dioxide (SiO2) [13], silicon nitride (Si3N4) [14, 15], aluminum oxide (Al2O3) [16, 17] and hafnium oxide (HfO2) [12, 18], have been investigated for use in TFTs.
In this paper, numerical simulation is used to understand the effect of the insulator type on the operation of a-IGZO TFT and the threshold (Vth) instability. The insulators compared are SiO2, Si3N4, Al2O3 and HfO2. The other parameters evaluated are: on-current (Ion), field-effect mobility (\(\mu_{\text{FE}}\)), threshold voltage (Vth), subthreshold swing (SS), on-to-off current ratio (Ion/Ioff) and threshold shift (\(\Delta V_{\text{th}}\)). The numerical simulation is carried out using TCAD of SILVACO-ATLAS software which is a very powerful tool to simulate and study electronic devices. TCAD permits to vary many parameters which model the experimentally observed phenomenon. The numerical study explains the effect of insulators separately from the contribution of other parameters such as interface states between the semiconductor and the insulator or the fixed charge in insulator material. This separation is not achievable in experimental work. Furthermore, numerical simulation decreases the cost and time required by measurement and it is obvious that a rigorous study of insulators and instability effects is very difficult to be achieved experimentally .
2 TFT structure
We have designed four structures with the same parameters. The difference in the four structures is the insulator layer. SiO2, Si3N4, Al2O3 and HfO2 are the four different insulators. The schematic a-IGZO TFT structure studied in this work is shown in Fig. 1. It consists of an a-IGZO active channel; 20 nm thick, an insulator layer whose thickness is 100 nm and a poly crystalline silicon wafer substrate (n++) as a gate. The length (L) and the width (W) of the channel are 30 and 180 µm, respectively. The source and the drain are 5 nm thick and are made of titanium (Ti).
3 Physical model
Numerical simulation is a powerful tool to understand the physics of electronic devices and materials. It is also a cheap and effective tool to optimize the semiconductor device conception and operating mode. The Poisson and the continuity equations describe the electronic phenomena inside the semiconductor and the electrical transport mechanism involved. Numerical resolution is the best way to solve the nonlinear Poisson and continuity equation system and get information about the effect of various parameters (physical and technological) included in the device operation.
It is well known that a-IGZO density of gap states is formed by donor tail state \(g_{\text{vt}}^{\text{D}} (E)\) with exponential decay from \(E_{\text{V}}\), and a donor Gaussian distribution \(g_{\text{G}}^{\text{D}} (E)\) with a maximum located at 2.9 eV (from \(E_{\text{V}}\)) with width 0.1 eV and another narrow acceptor tail state \(g_{\text{ct}}^{\text{A}} (E)\) near \(E_{\text{C}}\). These distributions are expressed as follows [19,20,21,22]:
Figure 2 shows a plot of the different components usually used to describe the density of states in a-IGZO. Poisson’s equation relates the electrostatic potential to the space charge density and is given by [23]:
where \(\psi\) is the electrostatic potential,\(\varepsilon\) is the local permittivity,\(\rho\) is the local space charge density, \(n\) and \(p\) are the free carrier’s densities, \(N_{\text{d}}\) is the n-channel doping concentration and \(n_{\text{tail}} ,\;p_{\text{tail}}\) and \(n_{\text{gd}}\) are charge states in the band gap.
The continuity equations for both electrons and holes are expressed in the dynamic mode as [23].
In steady state, \(\frac{\partial n}{\partial t} = \frac{\partial p}{\partial t} = 0\).
\(\overrightarrow {{J_{n} }}\) and \(\overrightarrow {{J_{p} }}\) are the electron and hole current densities, \(G_{n}\) and \(G_{p}\) are the generation rates for electrons and holes which are neglected in this study. \(R_{n}\) and \(R_{p}\) are the total recombination rates for electrons and holes in Gaussian and tail states, and \(q\) is the electron charge. In the drift–diffusion model, the current densities are expressed in terms of the quasi-Fermi levels \(\phi_{n}\) and \(\phi_{p}\) as
where \(\mu_{n}\) and \(\mu_{p}\) are electron and hole mobilities, respectively. The quasi-Fermi levels are linked to the carrier’s concentration and the potential through \(n = n_{i} \exp \left( {\frac{{\psi - \phi_{n} }}{{K_{B} T}}} \right)\) and \(p = n_{i} \exp \left( {\frac{{\psi - \phi_{p} }}{{K_{B} T}}} \right)\) where \(n_{i}\) is the effective intrinsic concentration and T is the absolute temperature.
The physical parameters are presented in Table 1 and applied to the continuity equation. The latter is solved for different applied gate voltages ranging from − 15 to 20 V. The drain voltage was fixed 0.1 V, and the transfer characteristics (\(I_{\text{DS}} - V_{\text{GS}}\)) are plotted on a semi-logarithmic scale.
4 Results and discussion
To understand the effect of the insulator on operation a-IGZO TFTs, the Poisson and continuity equations are solved by TCAD using the material properties presented in Table 1. The defects in the band gap have values of \(1.55 \times 10^{20} \;{\text{cm}}^{ - 3} \;{\text{eV}}^{ - 1}\) for tail band acceptors, and donors and Gaussian donor states have a density/per energy of \(5 \times 10^{17} \;{\text{cm}}^{ - 3} \;{\text{eV}}^{ - 1}\) for an applied gate voltage ranging from − 10 to 20 V for 0.1 V drain voltage. The transfer characteristics (IDS–VGS) are shown on a linear and semi-logarithmic scale in Fig. 3.
The threshold voltage (Vth) and the field-effect mobility µeff were extracted from the linear plot based on the standard equation of metal-oxide-semiconductor field-effect transistor [24] given by:
where Id is the drain current, Vgs is the gate bias voltage, Vds is the drain bias voltage, Cox is the gate insulator capacitance per unit area and W and L are the TFT channel width and length, respectively.
The extrapolated threshold voltages values were − 1.07; − 0.68; − 0.43 and 0.23 V for SiO2, Si3N4, Al2O3 and HfO2, respectively. All insulators in this work show low Vth value. A relatively low gate voltage is, therefore, required. The negative value of Vth is due to high donor concentration near the conduction band which is around \(5 \times 10^{17} \;{\text{cm}}^{ - 3} \;{\text{eV}}^{ - 1}\). The most important parameter describing the TFT performance is the channel mobility. Effective channel mobilities, µeff, are calculated from the linear region of the transfer characteristics using (9). The field-effect mobility for SiO2, Si3N4, Al2O3 and HfO2 is found to be 7.87, 8.21, 9.50 and \(13.73\;{\text{cm}}^{2} \;{\text{s}}^{ - 1} \;{\text{V}}^{ - 1}\), respectively. It is obvious that high value of the field-effect mobility means fast and better performance of the TFT. Low threshold voltage and high field-effect mobility are required and attractive for high-speed TFT application.
The subthreshold swing (SS) was calculated by using the following relation [24]:
Subthreshold swings of a-IGZO TFTs with SiO2, Si3N4, Al2O3 and HfO2 are estimated as 0.13, 0.11, 0.10 and 0.09 V dec−1, respectively. SS shows a small variation with the type of the insulator. SS is related to interface and bulk defects. This variation can be explained by dielectric constants for each layer. \(I_{\text{on}}\) and \(I_{\text{on}} /I_{\text{off}}\) values are: for IGZO/SiO2 TFT; \(I_{\text{on}} = 4.44 \times 10^{ - 6}\) A and \(I_{\text{on}} /I_{\text{off}} = 5.87 \times 10^{11}\), for a-IGZO/Si3N4 TFT; \(I_{\text{on}} = 9.10 \times 10^{ - 6}\) A and \(I_{\text{on}} /I_{\text{off}} = 1.43 \times 10^{12}\), for a-IGZO/Al2O3 TFT; \(I_{\text{on}} = 1.5 \times 10^{ - 5}\) A and \(I_{\text{on}} /I_{\text{off}} = 2.07 \times 10^{12}\), for a-IGZO/HfO2; \(I_{\text{on}} = 2.81 \times 10^{ - 6}\) A and \(I_{\text{on}} /I_{\text{off}} = 5.06 \times 10^{12}\). Both a-IGZO/Al2O3 and a-IGZO/HfO2 TFTs show high values of \(I_{\text{on}}\) and \(I_{\text{on}} /I_{\text{off}}\) which make Al2O3 and HfO2 better choices than SiO2 and Si3N4. The high Ion for high k insulators is expected due to high \(\mu_{\text{eff}}\) as given by (9). The TFT with the HfO2 dielectric shows superior electrical characteristics compared to the other insulators TFTs, such as field-effect mobility, \(I_{\text{on}} /I_{\text{off}}\)-current ratio, and subthreshold swing, which are seen in Table 2.
It is observed that the insulator-type influence on the TFT performance depends on the relative permittivity. When the relative permittivity is higher, the TFT performance is better. To understand this influence, internal parameters such the electron concentration and the electric field are extracted. The electron concentration is extracted, for different VGS and VDS = 0.1 V, for the different insulators. The electric field is extracted, for different VGS and VDS = 0.1 V at the gate–insulator interface, for the different insulators. The extracted electron concentration and field electric are shown in Figs. 4 and 5, respectively.
Figure 4 represents the electron concentration in the transistor channel for the four insulators, for several gate voltages and a drain voltage of VDS = 0.1 V. The effect of the insulator type on electron accumulation at the interface between the semiconductor (a-IGZO) and the insulators (all types) is very apparent. Hence, it is expected that it will, evidently, have an effect on the threshold (Vth) and the on current (Ion). When the electron concentration surpasses 1 × 1014 cm−3, the TFT passes to an on regime. For SiO2 insulator, − 3 V was enough to make electrons accumulate at the interface between the a-IGZO channel and the insulator due to a low electric field as shown in Fig. 5. This may force the a-IGZO/SiO2 TFT to work in the negative bias region. At 3 V, a low electron concentration at the interface is obtained which gives a smaller Ion compared with the other TFTs. The a-IGZO/Si3N4 TFT is in the on regime at − 2 V gate voltage when the electron concentration surpasses \(1 \times 10^{14}\) cm−3. It is noticed that the electric field shows a higher value than the a-IGZO/SiO2. At 3 V, the a-IGZO/Si3N4 has a higher concentration than the a-IGZO/SiO2 TFT and less than both a-IGZO/Al2O3 and a-IGZO/HfO2 TFTs. For the a-IGZO/Al2O3, TFT works at − 1 V which makes it performing better than the a-IGZO/SiO2 and the a-IGZO/Si3N4. The a-IGZO/HfO2 TFT showed the optimal performance with higher electron concentration at the interface for a positive gate voltage. The low concentration for negative gate voltage may be due to the high electric field. These different values of the electron concentration are related to the effect of the electric flied. The high electric field causes a high electron concentration and makes Ion higher, while a low electric filed causes electrons to accumulate near the interface between the semiconductor and the insulator. This makes the TFT work in the negative gate bias region and this in turn means the TFT is useless for electronic devices.
The calculation of conduction band offsets is illustrated in Fig. 6. The conduction band offset for a-IGZO/SiO2 and a-IGZO/Si3N4 is 3.26 and 1.56 eV, respectively. Si3N4 has a smaller band gap compared with SiO2, but Si3N4 shows better performance due to high relative permittivity. Al2O3 has a wide band gap (8 eV) which approaches that of SiO2 but with a higher relative permittivity (9.3) than SiO2. a-IGZO/Al2O3 shows a better performance than SiO2 and Si3N4. The conduction band offset a-IGZO/HfO2 is 4.19 eV. a-IGZO/HfO2 TFT shows good performance compared with other insulators in this work. The offset band calculation shows that insulators were used in this paper suitable for TFT application. We concern the band offsets of semiconductors/insulators. The major problem with the choosing insulators is that some have quite small band gaps. The barrier at each band must be over 1 eV to inhibit conduction by Schottky emission of electrons or holes into their bands [25]. Al2O3 and HfO2 have large band gaps and high k which make them ideal for TFT application. It must be taken into account when a dielectric material is used into a TFT structure; the structure-related requirement includes low defect density, few interfacial trap sites, low fringing capacitive effect and band engineering possibility.
4.1 Impact of insulators on TFTs V th degradation
Vth instability is a serious problem in a-IGZO application. The negative bias illumination stress (NBIS) is an important case to the degradation a-IGZO TFT. It is believed that this stress generates defects in a-IGZO or at the interface with the insulator. To clarify the origin of Vth instability, we test the assumption of bulk defect generation. The NBIS is modulated by the donor Gaussian states near the conduction band when its increase leads to a negative threshold voltage shift [7, 26,27,28]. The variation in the transfer characteristics is simulated under increasing donor defects to evaluate the device stability. The density of the Gaussian donor is varied from 6.5 × 1015 to 6.5 × 1017 cm−3 eV−1, and Vth is extracted for different insulator layers. Figure 7 represents the threshold shift (\(\Delta V_{\text{th}}\)) versus the Gaussian donor density per unit energy for different insulator layers. The a-IGZO/SiO2 TFT shows a sensitive behavior to the increasing in the donor Gaussian density per unit energy where it is degraded by a shift from 0 to − 3.22 V. The a-IGZO/Si3N4 TFT was less sensitive compared to the a-IGZO/SiO2 TFT. IGZO/Si3N4 TFT is degraded by a shift from 0 to -1.85 V. The a-IGZO/Al2O3-TFT is more stable than the a-IGZO/Si3N4 and the a-IGZO/SiO2 TFTs where it shows a shift from 0 to − 0.93 V. The a-IGZO/HfO2 TFT presents a superior performance compared to other gate insulators materials for which the shift in Vth was 0 to − 0.43 V. Vth instability was significantly different for the different gate dielectric materials, even though all devices have an identical structure including a same physical parameter of the a-IGZO layer. This means that using high k dielectrics layers makes a-IGZO TFT more stable. It is obvious that that all insulators show same behavior which demonstrate that NBIS is independent on the type of the insulator where all TFTs show a negative shift. On the other hand, it can be said that the generation of defects occurs in the semiconductor channel and not at the semiconductor/insulators interface as suggested in some works [29, 30]. But the dominant reason of Vth instability in a-IGZO is the generation of free carriers in the channel region [26, 31]. It may be due to the fact that the strong electric filed in high k dielectric controls the electron diffusion in the a-IGZO layer. For a high electron concentration, low k dielectric cannot control the electron diffusion which creates the channel between the source and the drain. This later makes the current flow even without applied gate voltage. In case of the high k dielectric, the strong filed electric control electron diffusion makes it more stable. Figure 8 shows the total current density in a-IGZO channel for two insulator layers: SiO2 and HfO2. This indicates that a channel is formed between the source and the drain for SiO2 and HfO2. In case of SiO2, the formed channel is larger, while in the case of HfO2 it is thinner. This means that the low k dielectric leads to an easier degradation of Vth (toward a more negative value).
4.2 Effect of fixed charge in HfO2 insulator
During HfO2 fabrication, there might be the possibility of defect creation. Generally, these defects are a fixed charge. It is well known that an MOS (metal–oxide–semiconductor) structure is very sensitive to the fixed charge in the gate insulator. To understand the effect of the fixed charge in HfO2/a-IGZO TFT, the negative and positive fixed charges are studied. The fixed charge practically is related to oxygen loss and contamination during fabrication. The fixed charge is varied from \(- 3 \times 10^{12}\) to \(3 \times 10^{12} \;{\text{cm}}^{ - 2}\). Figure 9 shows the TFT transfer characteristics with increasing charge density. The transfer characteristics curve moves toward positive for negative fixed charge, while the opposite trend is observed for a positive fixed charge. The output parameters do not show any variation with fixed charge except Ion and Vth. The Ion variation is due to the curve shift. Vth changes from 0.2 to 3.2 V for a fixed charge changing from 0 to \(- 3 \times 10^{12}\). The positive charge leads to a negative Vth shift. When the density of the fixed charge is positive and changes from \(1 \times 10^{12}\) to \(3 \times 10^{12}\), Vth changes from − 0.1 to − 1.7 V. The negative charge in the oxide reduces the electron density that accumulates at the interface between a-IGZO and HfO2. This makes the TFT requiring a more positive voltage to turn on, while the positive charge in the oxide produces an electron accumulation at the interface even for a negative gate voltage. This requires a more negative voltage to switch OFF the transistor.
4.3 Effect of HfO2 thickness
In this part, the effect of HfO2 thickness on the a-IGZO TFT performance is investigated. The thickness was varied from 60 to 110 nm. Figure 10 shows the TFT transfer characteristics for different thicknesses. Vth decreases slightly from 0.26 to 0.22 V, which is a negative shift. The field-effect mobility decreases from 26.32 to 11.98 \({\text{cm}}^{2} \;{\text{s}}^{ - 1} \;{\text{V}}^{ - 1}\). It is clear that the field-effect mobility increases when the thickness is reduced. SS on the other hand does not show any variation with thickness. \(I_{\text{on}}\) increases with decreasing insulator thickness. This is obvious because the field-effect mobility is higher for a thinner insulator. As a result, with thinner gate insulator, the channel area at the same applied gate voltage will induce more carriers. So, even at lower applied gate voltage the conduction channel could be formed in the TFT device and a low driving voltage TFT device would be the result. Devices with thick oxide layer have less gate control on the channel carriers.
5 Conclusion
The performance and stability of a-IGZO TFTs with SiO2, Si3N4, Al2O3 and HfO2 as the gate dielectrics have been investigated and compared using numerical simulation. The simulation results have shown a superior performance that has been achieved for a-IGZO TFTs with the HfO2 dielectric, such as small threshold voltage, improved subthreshold swing, increased mobility and Ion current. The HfO2 insulator achieved a high stability compared with SiO2, Si3N4 and Al2O3, while the instability of a-IGZO is found to be independent of the gate insulator material. SiO2, Si3N4, Al2O3 and HfO2 as the gate insulators show degradation with increasing donor Gaussian density of states. The proper choice of the gate dielectric can provide better device reliability in oxide TFTs. Therefore, the optimization of gate dielectrics materials will be helpful in reducing the instability.
References
Nomura, K., Ohta, H., Takagi, A., Kamiya, T., Hirano, M., Hosono, H.: Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature 432, 488–492 (2004). https://doi.org/10.1038/nature03090
Nomura, K., Takagi, A., Kamiya, T., Ohta, H., Hirano, M., Hosono, H.: Amorphous oxide semiconductors for high-performance flexible thin-film transistors. Jpn. J. Appl. Phys. 45, 4303–4308 (2006). https://doi.org/10.1143/jjap.45.4303
Park, J.S., Jeong, J.K., Mo, Y.G., Kim, H.D., Kim, S.: Il: improvements in the device characteristics of amorphous indium gallium zinc oxide thin-film transistors by Ar plasma treatment. Appl. Phys. Lett. 90, 2012–2015 (2007). https://doi.org/10.1063/1.2753107
Woo, C.H., Kim, Y.Y., Kong, B.H., Cho, H.K.: Effects of the thickness of the channel layer on the device performance of InGaZnO thin-film-transistors. Surf. Coatings Technol. 205, S168–S171 (2010). https://doi.org/10.1016/j.surfcoat.2010.07.036
Olziersky, A., Barquinha, P., Vila, A., Magana, C., Fortunato, E., Morante, J.R., Martins, R.: Role of Ga2O3–In2O3–ZnO channel composition on the electrical performance of thin-film transistors. Mater. Chem. Phys. 131, 512–518 (2011). https://doi.org/10.1016/j.matchemphys.2011.10.013
Kim, K.A., Park, M.J., Lee, W.H., Yoon, S.M.: Characterization of negative bias-illumination-stress stability for transparent top-gate In–Ga–Zn–O thin-film transistors with variations in the incorporated oxygen content. J. Appl. Phys. (2015). https://doi.org/10.1063/1.4938013
Lee, E., Chowdhury, M.D.H., Park, M.S., Jang, J.: Effect of top gate bias on photocurrent and negative bias illumination stress instability in dual gate amorphous indium-gallium-zinc oxide thin-film transistor. Appl. Phys. Lett. (2015). https://doi.org/10.1063/1.4937441
Heo, S., Lee, D., Koo, Y., Kwon, Y., Kim, K., Chung, J., Cheol, J., Su, G., Soo, J., Tahir, D., Jae, H., Young, H.: Origin of positive V th shift and mobility effects in amorphous GaInZnO thin films. Thin Solid Films 616, 456–460 (2016). https://doi.org/10.1016/j.tsf.2016.09.005
Domen, K., Miyase, T., Abe, K., Hosono, H., Kamiya, T.: Positive-bias stress test on amorphous In–Ga–Zn–O thin film transistor: annealing-temperature dependence. J. Disp. Technol. 10, 975–978 (2014). https://doi.org/10.1109/JDT.2014.2350518
Cho, E.N., Kang, J.H., Yun, I.: Effects of channel thickness variation on bias stress instability of InGaZnO thin-film transistors. Microelectron. Reliab. 51, 1792–1795 (2011). https://doi.org/10.1016/j.microrel.2011.07.018
Yamada, K., Nomura, K., Abe, K., Takeda, S., Hosono, H.: Examination of the ambient effects on the stability of amorphous indium-gallium-zinc oxide thin film transistors using a laser-glass-sealing technology. Appl. Phys. Lett. 105, 2012–2016 (2014). https://doi.org/10.1063/1.4896948
Chun, Y.S., Chang, S., Lee, S.Y.: Effects of gate insulators on the performance of a-IGZO TFT fabricated at room-temperature. Microelectron. Eng. 88, 1590–1593 (2011). https://doi.org/10.1016/j.mee.2011.01.076
Park, J.C., Lee, H.-N., Chul, J.: Dry etch damage and recovery of gallium indium zinc oxide thin-film transistors with etch-back structures. Displays 33, 133–135 (2012). https://doi.org/10.1016/j.displa.2012.05.001
Walther, S., Polster, S., Meyer, B., Jank, M.P.M., Ryssel, H., Frey, L.: Properties of SiO2 and Si3N4 as gate dielectrics for printed ZnO transistors. J. Vac. Sci. Technol. B Microelectron. Nanom. Struct 29, 01A601 (2011). https://doi.org/10.1116/1.3524291
Jejurikar, S.M., De Souza, M.M., Adhi, K.P.: Understanding the role of the insulator in the performance of ZnO TFTs. Thin Solid Films 518, 1177–1179 (2009). https://doi.org/10.1016/j.tsf.2009.05.066
Kim, E., Kim, C.K., Lee, M.K., Bang, T., Choi, Y.K., Park, S.H.K., Choi, K.C.: Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors. Appl. Phys. Lett. 108, 1–6 (2016). https://doi.org/10.1063/1.4948765
Sisman, Z., Bolat, S., Okyay, A.K.: Atomic layer deposition for vertically integrated ZnO thin film transistors: toward 3D high packing density thin film electronics. Phys. Status Solidi C 14, 1700128 (2017). https://doi.org/10.1002/pssc.201700128
Yuan, L., Zou, X., Fang, G., Wan, J., Zhou, H., Zhao, X.: High-Performance amorphous indium gallium zinc oxide thin-film transistors with HfO × N y/HfO 2/HfO × N y tristack gate dielectrics. IEEE Electron. Device Lett. 32, 42–44 (2011). https://doi.org/10.1109/LED.2010.2089426
Oh, H., Yoon, S.M., Ryu, M.K., Hwang, C.S., Yang, S., Park, S.H.K.: Photon-accelerated negative bias instability involving subgap states creation in amorphous In-Ga-Zn-O thin film transistor. Appl. Phys. Lett. (2010). https://doi.org/10.1063/1.3510471
Adaika, M., Meftah, A., Sengouga, N., Henini, M.: Numerical simulation of bias and photo stress on indium-gallium-zinc-oxide thin film transistors. Vacuum 120, 59–67 (2015). https://doi.org/10.1016/j.vacuum.2015.04.021
Kim, Y., Kim, S., Kim, W., Bae, M., Jeong, H.K., Kong, D., Choi, S., Kim, D.M., Kim, D.H.: Amorphous InGaZnO thin-film transistors—part II: modeling and simulation of negative bias illumination stress-induced instability. IEEE Trans. Electron Devices 59, 2699–2706 (2012). https://doi.org/10.1109/TED.2012.2208971
Ueoka, Y., Ishikawa, Y., Bermundo, J.P., Yamazaki, H., Urakawa, S., Fujii, M., Horita, M., Uraoka, Y.: Density of states in amorphous In-Ga-Zn-O thin-film transistor under negative bias illumination stress. ECS J. Solid State Sci. Technol. 3, Q3001–Q3004 (2014). https://doi.org/10.1149/2.001409jss
Fichtner, W., Rose, D.J.D.J., Bank, R.E.R.E.: Semiconductor device simulation. IEEE Trans. Electron Devices 30, 1018–1030 (1983). https://doi.org/10.1109/T-ED.1983.21256
Kamiya, T., Nomura, K., Hosono, H.: Present status of amorphous In–Ga–Zn–O thin-film transistors. Sci. Technol. Adv. Mater. 11, 044305 (2010). https://doi.org/10.1088/1468-6996/11/4/044305
Park, S., Kim, C.-H., Lee, W., Sung, S., Yoon, M.: Sol-gel metal oxide dielectrics for all-solution-processed electronics. Mater. Sci. Eng. R Reports. 114, 1–22 (2017). https://doi.org/10.1016/j.mser.2017.01.003
Lee, K.H., Jung, J.S., Son, K.S., Park, J.S., Kim, T.S., Choi, R., Jeong, J.K., Kwon, J.Y., Koo, B., Lee, S.: The effect of moisture on the photon-enhanced negative bias thermal instability in Ga–In–Zn–O thin film transistors. Appl. Phys. Lett. 95, 2012–2015 (2009). https://doi.org/10.1063/1.3272015
Dongsik, K., Hyunkwnag, J., Yongsik, K., Minkyung, B., Jaeman, J., Jeahyeong, K., Woojoon, K., Inseok, H., Dong, M.K., Dae, H.K.: Effect of the active layer thickness on the negative bias illumination stress-induced instability in amorphous InGaZnO thin-film transistors. J. Korean Phys. Soc. 59, 505 (2011). https://doi.org/10.3938/jkps.59.505
Kim, C.E., Cho, E.N., Moon, P., Kim, G.H., Kim, D.L., Kim, H.J., Yun, I.: Density-of-states modeling of solution-processed InGaZnO thin-film transistors. IEEE Electron Device Lett. 31, 1131–1133 (2010). https://doi.org/10.1109/LED.2010.2061832
Jeong, J.H.J.K., Won Yang, H., Jeong, J.H.J.K., Mo, Y.G., Kim, H.D.: Origin of threshold voltage instability in indium-gallium-zinc oxide thin film transistors. Appl. Phys. Lett. 93, 10–13 (2008). https://doi.org/10.1063/1.2990657
Lee, J., Park, J.S., Pyo, Y.S., Lee, D.B., Kim, E.H., Stryakhilev, D., Kim, T.W., Jin, D.U., Mo, Y.G.: The influence of the gate dielectrics on threshold voltage instability in amorphous indium-gallium-zinc oxide thin film transistors. Appl. Phys. Lett. 95, 1–4 (2009). https://doi.org/10.1063/1.3232179
Wager, J.F., Yeh, B., Hoffman, R.L., Keszler, D.A.: An amorphous oxide semiconductor thin-film transistor route to oxide electronics. Curr. Opin. Solid State Mater. Sci. 18, 53–61 (2014). https://doi.org/10.1016/j.cossms.2013.07.002
Fung, T.C., Chuang, C.S., Chen, C., Abe, K., Cottle, R., Townsend, M., Kumomi, H., Kanicki, J.: Two-dimensional numerical simulation of radio frequency sputter amorphous In–Ga–Zn–O thin-film transistors. J. Appl. Phys. 106, 1–10 (2009). https://doi.org/10.1063/1.3234400
Silvaco, I.: Atlas user’s manual device simulation software (2013)
Robertson, J.: Band offsets of high dielectric constant gate oxides on silicon. J. Non Cryst. Solids 303, 94–100 (2002). https://doi.org/10.1016/S0022-3093(02)00972-9
Gervais, F.: Aluminum oxide (Al2O3). In: Palik, E.D. (ed.) Handbook of Optical Constants of Solids, pp. 761–775. Academic Press, Boston (1998)
Rignanese, G.-M., Gonze, X., Jun, G., Cho, K., Pasquarello, A.: First-principles investigation of high-k dielectrics: comparison between the silicates and oxides of hafnium and zirconium. Phys. Rev. B. 69, 184301 (2004). https://doi.org/10.1103/PhysRevB.69.184301
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Mohamed Labed et al. would like to thank the University of Biskra for its support.
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Labed, M., Sengouga, N. Simulation of the influence of the gate dielectric on amorphous indium-gallium-zinc oxide thin-film transistor reliability. J Comput Electron 18, 509–518 (2019). https://doi.org/10.1007/s10825-019-01316-4
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DOI: https://doi.org/10.1007/s10825-019-01316-4