Abstract
The performance effect of splitting and abrupt doping in the drain region, use of a Ge strip at source-channel junction in group IV material based (Ge1 − xSnx/ Si1 − y − zGeySnz) Tunnel Field Effect Transistor (TFET) is investigated in the present manuscript. The variation of certain device parameters, such as mole fraction, different gate dielectrics, gate dielectric thickness and drain doping concentrations are applied to analyze the performance of proposed group IV material based TFET in terms of current-voltage (I-V) characteristics, potential profile and ION/IOFF ratio using device simulator SILVACO TCAD. The simulation results obtained for the proposed TFET structure are compared with the other TFET structures available in the literature, which shows better results as ION/IOFF ratio was received of the order of 1012 in comparison to conventional group IV material based TFET and subthreshold swing of 25.03 mV/decade, which makes the proposed structure promising for high speed switching action with low power CMOS compatibility.
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Acknowledgments
The Authors would like to extend special thanks to Director, NIT Delhi and DST-Science and Engineering Research Board (DST-SERB) project, Govt. of India, (under Early Career Research Award Scheme 2017 (FILE NO. ECR/2017/000794) awarded to Rikmantra Basu) for supporting this research work.
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Kumar, S., Mehra, R., Yadav, H. et al. Performance Analysis of Group IV Material Based Tunnel Field Effect Transistor: Effect of Drain Splitting and Introducing Ge-Strip at Source- Channel Junction. Silicon 14, 521–529 (2022). https://doi.org/10.1007/s12633-020-00824-4
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DOI: https://doi.org/10.1007/s12633-020-00824-4