Abstract
High staggered, Moderate staggered and homo junction III–V semiconductor-based heterojunction TFETs are of interest as they allow a high on–off current ratio and high on current through reduction in the tunneling barrier height. GaAsSb/InGaAs based heterojunction p-n-i-n TFET has shown an increase in the drive current when compared to homojunction due to band engineering. Further engineering can be performed by varying tunneling barrier height (Ebeff) from 0.5 to 0.25 eV using differently staggered heterojunction. Thus, the concept of halo doped heterojunction pocket TFET is presented by analytical and simulation study with varying staggered junctions.
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1 Introduction
In recent years, prolific research has accounted in incrementing the drain current of TFET and consequently designing a device providing sub threshold slope below the limits with similar performance as that of CMOS technology [1]. Introducing pocket layer in TFET or using hetero materials have shown a considerate improvement in performance than the conventional design. This paper aims at combining some of those techniques.
A p-n junction can be classified on the basis of bandgap, as High staggered hetero, Moderate staggered hetero and Homo junction. The use of these junctions in a TFET as source and channel materials exponents in reducing the tunneling barrier and subsequently increasing drain current [2, 3]. The halo doped pocket hetero junction TFET is the acme of possibility to include in band gap engineering without being utilitarian with materials. Introducing a pocket at the source end and to be able to further reduce the bandgap at the junction using barrier height variation would increment the drain current meteorically. The bandgap engineering performed using tunneling barrier height (Ebeff) variation from 0.5 to 0.25 eV is realized by varying the mole fraction of the materials in GaAsSb and InGaAs as source and drain respectively.
An analytical model that would be applicable to all the three structures as mentioned earlier, with halo doped pocket layer is developed and evaluated. The general approach developed objectively is utilized to generate potential, electric field and energy band profile respectively. The results are then compared with simulation [4,5,6] output and analyzed. The material parameters are given in Table 181.1.
2 Analytical Model of 2D Halo Doped TFET
The two dimensional Poisson’s Equation for the device shown in Fig. 181.1a, can be expressed as [7]
where 0 ≤ x ≤ tSi and 0 ≤ y ≤ Lg. The 2D potential, \( \varphi \left( {x,y} \right) \) can be denoted as φH and φCH in RH and RCH regions. N is the effective doping which is equal to −NH and ±NCH respectively. With a parabolic distribution of potential along the x direction, [8]
To ensure the continuity of potential and electric field, boundary conditions [12] are
In the above equations \( \varphi_{\text{SH}} \) and \( \varphi_{\text{SCH}} \) are the surface potentials in pocket region RH and channel region RCH respectively [8]. Vfb denotes the flat band voltage and η is the ratio of gate oxide capacitance and thin film capacitance. Solving for the parameters using the above boundary conditions yields
By substituting \( \varphi_{\text{H}} \) in the 2D Poisson’s equation,
where, \( \alpha = \sqrt {\frac{2\eta }{{t_{\text{Si}}^{2} }}} \), \( \beta_{\text{CH}} = - \frac{{2\eta \left( {V_{\text{g}} - V_{\text{fb}} } \right)}}{{t_{\text{Si}}^{2} }} + \frac{{qN_{\text{CH}} }}{{\varepsilon_{\text{Si}} }} \) Solving the above equations gives,
Boundary conditions for surface potential at source end, \( \varphi_{\text{SH}} \left( 0 \right) \) and drain end, \( \varphi_{\text{SCH}} \left( {L_{\text{g}} } \right) \) are
\( N_{\text{source}} \), \( N_{\text{dr}} \) and \( N_{\text{i}} \) are the doping concentrations of source, drain and the intrinsic concentration of the channel respectively.
Solving the above equations with given boundary conditions, parameters \( C_{\text{H1}} ,C_{\text{H2}} ,C_{\text{CH1}} ,C_{\text{CH2}} \) are evaluated. Further
would be the electric field expressions in the pocket and channel region respectively.
The effective bandgap for tunnelling can be decreased even further by using heterostructures [2]. Consider (semiconductor 1) p-n (semiconductor 2) junction with two different bandgap materials. Depending upon the difference between their electron affinities, the junction can be classified as in Fig. 181.2.
The drive current enhances on replacing an InGaAs homojunction TFET by a heterojunction InGaAs/GaAsSb. Further enhancement can be attained by engineering the effective tunneling barrier height Ebeff from 0.58 to 0.25 eV. Moderate-stagger GaAs0.4Sb0.6/In0.65Ga0.35As and high stagger GaAs0.35Sb0.65/In0.7Ga0.3As hetero junction TFETs are considered, and their electrical results are compared with the In0.7Ga0.3As homojunction TFET (Ebeff = 0.58 eV).
Also, boundary conditions for surface potential at source end, \( \varphi_{\text{SH}} \left( 0 \right) \) and drain end, \( \varphi_{\text{SCH}} \left( {L_{\text{g}} } \right) \) can be evaluated from the band diagram across the hetero junction at the source end as shown in Fig. 181.1b.
Thus,
where \( \chi_{2} , \chi_{1} \) are the electron affinity values of the source and the pocket, \( N_{\text{a}} \), \( N_{\text{d}} \), \( N_{\text{c2}} \), \( N_{\text{v1}} \) are the doping concentration in source, pocket and intrinsic concentration in source, pocket respectively.\( N_{\text{dr}} \) is the doping concentration of the drain, \( E_{\text{g1}} \) the band energy of source and \( \Delta E_{\text{c}} \) is the conduction band offset. Thus, the parameters are
where, \( k1 = \frac{{{\text{e}}^{{\alpha L_{\text{H}} }} + {\text{e}}^{{ - \alpha L_{\text{H}} }} }}{2} \)
3 Results
A keen assay over the potential plots in Fig. 181.2 at three different VGS in the pocket region of 0–6 nm the potential increase is essentially identical. The major point of concern is the tunnel region. Pocket purpose was to reduce the tunneling barrier [10], [13]. Further engineering of it is facilitated by hetero junction. However, it is desired that the engineering doesn’t affect other parameters.
As it could be seen, irrespective of the band energies, the electric potential variation is similar. Also is the case for electric field for a value of Vgs and Vds (Fig. 181.3). This proves to be advantageous for its application as supplant in conventional field.
Similarly, supporting are the band energy plots in Fig. 181.4. The band bending in pocket region is higher in highly staggered and in homo junction has least. Band bending is observed at the pocket region. The transition from source to pocket and to the intrinsic channel region has a dip in band energy as in the figures above, near to the 0 nm.
More the band bending, narrower the junction and higher is the possibility of tunneling. High and moderate staggered hetero junction possesses greater steeper transition than that of homo junction. Thus, hetero junction would produce a better on-off current ratio. At commensurate potential hence, a hetero modeled device has promising performance characteristics.
4 Conclusion
Due to the reduction in tunnel barrier height, Ebeff, the GaAs0.35Sb0.65/In0.7Ga0.3As HTFET achieves enhancement in on current over the In0.7Ga0.3As homojunction TFET at VDS = 1 V. Mixed lattice-matched heterojunctions (GaAs1−xSbx/InyGa1−yAs) provide a wide range of compositionally tunable Ebeff. With increasing Sb and In compositions, Ebeff can be reduced from 0.5 eV (x = 0.5, y = 0.53) to 0 eV (x = 0.1, y = 1), and hence, the TFET on current can approach the MOSFET level without compromising the steep switching and high on/off current property desirable in a low power logic switch.
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Acknowledgements
Authors would like to thank Council of Scientific & Industrial Research (CSIR), India (File No. 22(0724)/17/EMR-II).
M. L. Varshika (ENGS3150) would like to thank the Indian Academy of Sciences for providing the opportunity to be a part of SRFP-2017.
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Varshika, M.L., Narang, R., Gupta, M., Saxena, M. (2019). Analytical Modeling and Simulation Study of Homo and Hetero III-V Semiconductor Based Tunnel Field Effect Transistor (TFET). In: Sharma, R., Rawal, D. (eds) The Physics of Semiconductor Devices. IWPSD 2017. Springer Proceedings in Physics, vol 215. Springer, Cham. https://doi.org/10.1007/978-3-319-97604-4_181
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