A novel 2-D analytical model for the electrical characteristics of a gate-all-around heterojunction tunnel field-effect transistor including depletion regions

Abstract

A new two-dimensional analytical model is proposed for the electrical attributes of a gate-all-around heterojunction tunnel field-effect transistor, including the potential distribution, lateral and vertical electric fields, drain current, subthreshold swing, and threshold voltage. The potential distribution in the device is obtained by using the two-dimensional (2-D) Poisson equation, including the depletion regions across the source–channel, channel, and drain–channel regions. The drain current of the proposed device is derived by combining parameters such as the band-to-band generation rate, lateral electric field, and channel thickness as well as the shortest tunneling path in Kane’s model. The threshold voltage is obtained from the second derivative of the drain current. The effects of the depletion regions are also included in the model to obtain accurate results. The results are validated against ATLAS technology computer-aided design (TCAD) simulations with the SILVACO tool, revealing excellent agreement.

1 Introduction

In complementary metal–oxide–semiconductor (CMOS) technology, the tunneling field-effect transistor has attracted enormous attention from researchers due to its excellent electrical characteristics such as low subthreshold swing (i.e., less than 60 mV/dec) and high ON/OFF current ratio with low OFF leakage current [1,2,3,4,5,6,7]. Due to their low OFF leakage current, tunnel FETs are excellent devices for use in low-power very large-scale integration (VLSI) applications [8]. However, two-dimensional tunnel FETs provide a low ON current due to the poor efficiency of the band-to-band tunneling (BTBT) mechanism, because of the wide bandgap in the device. In current semiconductor technology, gate-all-around nanowire (GAANW) tunnel FETs are considered as alternate devices to improve the ON current and reduce the subthreshold swing (SS). The greatest advantage of nanowire tunnel FETs is their excellent gate control over the channel, due to which short-channel effects are greatly reduced. Recently, many studies related to fabrication methods and process technology for nanowire tunnel FETs have been published [9,10,11,12,13,14].

An analytical model to obtain the drain current of a gate-all-around nanowire tunnel FET was proposed by Lu and Seabaugh [14]. However, that model did not include the differences caused in the drain current when the drain-to-source voltage applied to the device is varied. Various analytical models for homojunction tunnel FETs with different structures have also been proposed by researchers with the aim of enhancing the drain current characteristics. Vishnoi and Kumar proposed an analytical model for a gate-all-around nanowire tunnel FET by segregating two regions across the source and channel. However, the variations of the drain region are not account for in their model [15]. Reza et al. suggested an analytical model for a homojunction cylindrical gate-all-around tunnel FET using the superposition principle, but their work did not include the threshold voltage of the device [16]. Bagga and Dasgupta introduced an analytical model to study the surface potential and drain current of a gate-all-around (GAA) triple-metal tunnel FET by solving the Poisson equation using a parabolic approximation and applying Kane’s model for the drain current. Again in this model, only the surface potential, electric field, and drain current are obtained, whereas other important factors that determine the performance of a tunnel FET such as the subthreshold swing and threshold voltage are not explored [17, 18].

Very few studies discussing the schematic cross section of and simulation methods for heterojunction tunnel FETs are available in literature. Kumar et al. proposed a model for schematic double-gate heterojunction TFETs with germanium in the source and silicon in the drain in both the accumulation/inversion and depletion modes [19]. The forward gain is high while the reverse gain is low for heterojunction devices in comparison with homojunction transistors, which enables them to offer high-frequency performance. Moreover, the bandgap in a heterojunction device can be adjusted depending on the application, indicating that SiGe junctions enable more bandgap tuning than silicon-only technology.

A heterojunction (HJ) is formed in a GAA-HJTFET when two semiconductors (germanium and silicon) with dissimilar bandgaps are placed in conjunction or layered together. The conduction-band energy and valence-band energy change abruptly at the heterojunction. The magnitude of these changes determines the band alignment and the effective bandgap in the semiconductor heterojunction. Due to this, the ON-state current performance improves, short-channel effects are reduced, and a subthreshold swing below 45 mV/dec can be obtained.

In the Si–Ge heterojunction, the energy band of the device moves downwards to the intrinsic region, which improves the I_ON current and also suppresses the ambipolar behavior, thereby reducing the subthreshold swing. Researchers have demonstrated that increasing the Ge concentration in such devices from 7% to 25% can increase the drain current by 15-fold at a constant subthreshold slope and also decrease the I_OFF current.

An analytical model for a heterojunction gate-all-around tunnel FET is presented herein. The surface potential is modeled across the three regions of the proposed device, viz. the source–channel depletion region, channel depletion region and channel–drain depletion region. Differentiation of the surface potential results in the electric field. The drain current is modeled using Kane’s model. The results of the model are validated against ATLAS-based TCAD simulations.

2 Device structure

Figure 1a shows a three-dimensional (3-D) structural view of the GAA-HJTFET. The assumptions of the model include a source length of 20 nm with germanium material having a doping concentration of $N_{1} = 1 \times 10^{20} \,{\text{cm}}^{ - 3}$, a channel length of 50 nm with a doping concentration of $N_{2} = 1 \times 10^{16} \,{\text{cm}}^{ - 3}$, and a drain length of 20 nm with silicon material having a doping concentration of $N_{3} = 5 \times 10^{18} \,{\text{cm}}^{ - 3}$. Figure 1b shows a cross-sectional schematic view of the GAA-HJTFET device. The potential distribution along the radius is similar to that in the y-direction for a double-gate (DG)-TFET. Thus, this cross-sectional schematic view is considered in the analytical model, considering the source–channel (R₁), channel (R₂), and drain–channel (R₃) depletion regions with lengths of $L_{1}$, $L_{2}$, and $L_{3}$, respectively.

Fig. 1

a The 3-D structure of the GAA-HJTFET. b A cross-sectional schematic diagram of the GAA-HJTFET

3 Model formulation

The cross-sectional schematic view of the GAA-HJTFET shown in Fig. 1b is considered for the analytical modeling. The z- and r-axes represent the coordinates of the device, with the following parameters: silicon thickness (t_Si) and channel oxide thickness (t_ox). $\psi_{0}$, $\psi_{1}$, $\psi_{2}$, and $\psi_{3}$ are the junction potentials at $z = 0\,,\,$$z_{1} = L_{1} ,\,$$z_{2} = L_{1} + L_{2}$, and $z_{3} = L_{1} + L_{2} + L_{3}$, respectively.

3.1 The analytical modeling of the surface potential

Let $\psi_{i} (r,z)$ be the surface potential distribution function along channel region R_i, where i = 1, 2, or 3. The two-dimensional (2-D) Poisson’s equation is given as

$$\frac{1}{r}\frac{\partial }{\partial r}\left( {r\frac{{\partial \psi_{i} (r,z)}}{\partial r}} \right) + \frac{{\partial^{2} \psi_{i} (r,z)}}{{\partial z^{2} }} = - \frac{q N_i }{\varepsilon_{\text{Si}} }\quad i = 1, \, 2, \, 3,$$

(1)

where q is the electron charge and $N_{i}$ is the doping concentration of each region. The doping concentration of the source region is assumed to be $N_{1} = 1 \times 10^{20} \,{\text{cm}}^{ - 3}$, that of the channel region to be $N_{2} = 1 \times 10^{16} \,{\text{cm}}^{ - 3}$, and that of the drain region to be $N_{3} = 5 \times 10^{18} \,{\text{cm}}^{ - 3}$. Using a parabolic approximation, the 2-D channel potential $\psi_{i} (r,z)$ in region R_i can be expressed as

$$\begin{aligned} & \psi_{i} (r,z) = a_{0i} (z) + a_{1i} (z)r + a_{2i} (z)r^{2} \\ & {\text{where}}\;\;i = 1,2,3, \\ \end{aligned}$$

(2)

where $a_{0i} (z),\,\,a_{1i} (z)$ and $a_{3i} (z)$ are arbitrary functions of z, defined by the boundary conditions [15]

$$(1) \; \left. {\psi_{i} (r,z)} \right|_{r = R} = \psi_{\rm s} (z).$$

(3)

The potential for regions R₁, R₂, and R₃ at r = R equals the surface potential. The electric field at the center of the channel region is zero:

$$(2)\;\left. {\frac{{\partial \psi_{i} (r,z)}}{\partial r}} \right|_{r = 0} = 0.$$

(4)

The electric field distribution at r = R is equal across the boundary between the silicon substrate and SiO₂ oxide, being given by

$$(3)\;\left. {\frac{{\partial \psi_{i} (r,z)}}{\partial r}} \right|_{r = R} = \frac{{C^{'}_{\text{ox}} }}{{\varepsilon_{\text{Si}} R}}\left[ {\frac{{\psi_{\rm G} - \psi_{\rm s} (z)}}{{\ln (1 + \frac{{t_{\text{ox}} }}{R})}}} \right],$$

(5)

where $\psi_{\rm G} = V_{\text{GS}} - \varphi_{\rm m} + \chi + \frac{{E_{\rm g} }}{2}$ and i = 1, 2, 3 for the three different depletion regions, the gate work function $\varphi_{\rm m}$ is 4 eV, the electron affinity of silicon is given by $\chi$ = 4.05 eV, the oxide capacitance is $C_{\text{ox}}^{'} = \varepsilon_{\text{ox}} /t$, $V_{\text{GS}}$ is the gate-to-source voltage, $t = t_{\text{ox}}$ is for region R₂, and $t = \left( {{\raise0.7ex\hbox{$\pi $} \!\mathord{\left/ {\vphantom {\pi 2}}\right.\kern-0pt} \!\lower0.7ex\hbox{$2$}}} \right)t_{\text{ox}}$ for regions R₁ and R₃. The radius of the channel is R = $t_{\text{Si}}$.

Using Eqs. (3)–(5) to solve Eq. (2) yields

$$a_{0i} = \psi_{\rm s} (z) - \frac{{C_{\text{ox}}^{'} }}{{2\varepsilon_{\text{Si}} }}\left[ {\frac{{\psi_{\rm G} - \psi_{\rm s} (z)}}{{\ln (1 + \frac{{t_{\text{ox}} }}{R})}}} \right],$$

(6)

$$a_{1i} = 0,$$

(7)

$$a_{2i} = \frac{{\varepsilon_{\text{ox}} }}{{2\varepsilon_{\text{Si}} R^{2} }}\left[ {\frac{{\psi_{\rm G} - \psi_{\rm s} (z)}}{{\ln (1 + \frac{{t_{\text{ox}} }}{R})}}} \right].$$

(8)

The relationship between the surface potential and channel potential $\psi_{i} (r,z)$ is defined by $\psi_{{\rm s},i} (z) = \psi_{i} \left( {{{ \pm t_{\text{Si}} } \mathord{\left/ {\vphantom {{ \pm t_{\text{Si}} } 2}} \right. \kern-0pt} 2},z} \right).$

From Eqs. (6)–(8), it can be deduced that

$$\psi_{i} (r,z) = \psi_{0i} (z) + \left( {\frac{{r^{2} }}{{\lambda^{2} R^{2} }} - \frac{1}{{\lambda^{2} }}} \right)\left( {\psi_{\rm G} - \psi_{0i} (z)} \right),$$

(9)

$$\psi_{{\rm s},i} (z) = \psi_{0i} (z) + \left( {\frac{{t_{\text{Si}}^{2} }}{{4\lambda^{2} R^{2} }} - \frac{1}{{\lambda^{2} }}} \right)\left( {\psi_{\rm G} - \psi_{0i} (z)} \right),$$

(10)

where

$$\begin{aligned} & \psi_{0i} (z) = \,\psi_{i} (0,z)\,\,\,\,{\text{i}} . {\text{e}}\,\,\,{\text{when}}\,\,{\text{radius}}\,\,\,r = 0 \\ & \lambda^{2} = \frac{{2\varepsilon_{\text{Si}} }}{{\varepsilon_{\text{ox}} }}\left( {\ln \left( {1 + \frac{{t_{\text{ox}} }}{R}} \right)} \right). \\ \end{aligned}$$

At $r = 0$, the 2-D Poisson Eq. (1) can be written as

$$\begin{aligned} & \left. {\frac{1}{r}\frac{\partial }{\partial r}\left( {r\frac{{\partial \psi_{i} (r,z)}}{\partial r}} \right)} \right|_{r = 0} + \left. {\frac{{\partial^{2} \psi_{i} (r,z)}}{{\partial z^{2} }}} \right|_{r = 0} \\ & \quad = \left. { - \frac{q N_i}{{\varepsilon_{\text{Si}} }}} \right|_{r = 0}. \\ \end{aligned}$$

(11)

Substituting Eq. (2) into Eq. (11) yields the following differential equation in terms of the center potential:

$$\frac{{\partial^{2} \psi_{0i} (z)}}{{\partial^{2} z}} - \eta_{i}^{2} \psi_{0i} (z) = - \eta_{i}^{2} P_{i},$$

(12)

where $P_{i} = \frac{{qN_{i} }}{{\eta_{i}^{2} \varepsilon_{\rm Si} }} + \psi_{\rm G}$ and $\eta_{i}^{2} = \frac{4}{{\lambda^{2} R^{2} }}.$.

The general solution of Eq. (12) is

$$\begin{aligned} \psi_{0i} (z) & = A_{i} \exp (\eta_{i} (z - z_{i - 1} )) + B_{i} \exp ( - \eta_{i} (z - z_{i - 1} )) \\ & \quad + {\kern 1pt} P_{i}, \\ \end{aligned}$$

(13)

where

$$\begin{aligned} A_{i} & = \frac{ - 1}{{2\sinh \eta_{i} L_{i} }}[\psi_{i - 1} (z)\exp ( - \eta_{i} L_{i} ) - \psi_{i} (z) \\ & \quad - {\kern 1pt} P_{i} (\exp ( - \eta_{i} L_{i} ) + 1)], \\ \end{aligned}$$

(14)

$$\begin{aligned} B_{i} & = \frac{1}{{2\sinh \eta_{i} L_{i} }}[\psi_{i - 1} (z)\exp (\eta_{i} L_{i} ) - \psi_{i} (z) \\ & \quad - {\kern 1pt} P_{i} (\exp (\eta_{i} L_{i} ) + 1)]. \\ \end{aligned}$$

(15)

The length of region $R_{i}$ is $L_{i} = z_{i} - z_{i - 1}$ (i = 1, 2, 3) and the surface potential at $z_{{}} = z_{i}$ is $\psi_{i} = \psi_{{\rm s},i} (z_{i} )$ as shown in Fig. 1b. The surface potential across the regions can be obtained by using the following boundary conditions [18, 20]:

$$\psi_{0} = \psi_{1} (r,0) = V_{\text{bis}},$$

(16)

$$\psi_{1} = \psi_{2} (r,L_{1} ),$$

(17)

$$\psi_{2} = \psi_{2} (r,L_{1} + L_{2} ),$$

(18)

$$\psi_{3} = \psi_{3} (r,L_{1} + L_{2} + L_{3} ) = V_{\text{bis}} + V_{\text{DS}},$$

(19)

where

$$\begin{aligned} V_{\text{bis}} & = - \frac{1}{q}\left[ {\left( {\chi_{1} - \chi_{2} } \right) + 0.5\left( {E_{\rm g1} - E_{\rm g2} } \right)} \right. \\ & \quad \left. { + {\kern 1pt} qV_{\rm T} (\ln ({{N_{1} } \mathord{\left/ {\vphantom {{N_{1} } {n_{i} )}}} \right. \kern-0pt} {n_{i} )}}} \right] \\ \end{aligned}$$

is the built-in potential. The electron charge is q, $V_{\rm T}$ is the thermal voltage, and $n_{i}$ is the electron concentration.

$\psi_{1}$ and $\psi_{2}$ are intermediate surface potentials obtained by using the continuity property of the lateral electric field thus [18]:

$$\left. {\psi_{{\rm s},i} \left( z \right)} \right|_{{z = z_{i} }} = \left. {\psi_{{\rm s},i + 1} \left( z \right)} \right|_{{z = z_{i} }},$$

(20)

$$\varepsilon \left. {\frac{{\partial \psi_{{\rm s},i} \left( z \right)}}{\partial z}} \right|_{{z = z_{i} }} = \left. {\varepsilon \frac{{\partial \psi_{{\rm s},i + 1} \left( z \right)}}{\partial z}} \right|_{{z = z_{i} }}.$$

(21)

Using Eqs. (20)–(21) in (10) along with Eqs. (13)–(15) yields the intermediate potentials as

$$\begin{aligned} \psi_{1} & = \frac{1}{{y_{1} }}\left[ {\frac{{\left( {x - 1} \right)}}{{\sinh \eta_{1} L_{1} }}\left\{ {\eta_{1} \psi_{0} + \eta_{1} P_{1} \left( {1 + \cosh \eta_{1} L_{1} } \right)} \right.} \right. \\ & \quad \left. { - {\kern 1pt} P_{2} \sinh \eta_{1} L_{1} } \right\}\left. { + x\psi_{\rm G} } \right], \\ \end{aligned}$$

(22)

$$\begin{aligned} \psi_{2} & = \frac{1}{{y_{2} }}\left[ {\frac{{\left( {x - 1} \right)}}{{\sinh \eta_{2} L_{2} }}\left\{ {\eta_{2} \psi_{1} + \eta_{2} P_{2} \left( {1 + \cosh \eta_{2} L_{2} } \right)} \right.} \right. \\ & \quad \left. { - P_{3} \sinh \eta_{2} L_{2} } \right\}\left. { + x\psi_{\rm G} } \right], \\ \end{aligned}$$

(23)

where

$$\begin{aligned} & x = \left( {\frac{{t_{\text{Si}}^{2} }}{{4\lambda^{2} R^{2} }} - \frac{1}{{\lambda^{2} }}} \right) \\ & y_{i} = \left[ {1 - \eta_{i} (x - 1)\coth \eta_{i} L_{i} } \right]\;\;\;i = 1,2, \\ \end{aligned}$$

3.2 The modeling of the electric field

The vertical and lateral electric fields $E_{ri} (r,z)$ and $E_{zi} (r,z)$ are obtained by differentiation of the potential in Eqs. (2) and (13) thus:

$$E_{{ri}} (r,z) = 2r\frac{{C_{\text{ox}}^{'} }}{{2\varepsilon_{\text{Ge}} R^{2} }}\left[ {\frac{{\psi_{\rm G} - \psi_{\rm s} (z)}}{{\ln (1 + \frac{{t_{\text{ox}} }}{R})}}} \right],$$

(24)

$$\begin{aligned} E_{zi} (r,z) & = - \frac{{\partial \psi_{i} (r,z)}}{\partial z} = \eta_{i} [ - A_{i} \exp (\eta_{i} (z - z_{i - 1} )) \\ & \quad + B_{i} \exp ( - \eta_{i} (z - z_{i - 1} )]. \\ \end{aligned}$$

(25)

3.3 The lengths of the depletion regions

$L_{1}$ and $L_{3}$ are determined as the lengths of the regions R₁ and R₃ that occur due to the source and drain charge depletion regions. A TFET can be considered to be a gate diode whose potential can be regulated by its gate voltage [4]. To consider the impact of the two terminals on each other, $L_{1}$ and $L_{3}$ should be calculated by applying $E_{r} = 0$ at $r = r_{0}$ and $r = r_{2}$ before deriving the potentials $\psi_{2}$ and $\psi_{3}$. To avoid the complexity of this calculation, a simple approximation is made by considering the source–channel and drain–channel regions separately using Refs. [18, 21] as follows:

$$L_{1} = \sqrt {2\varepsilon_{\text{Si}} (P_{2} - \psi_{0} )/(qN_{1} )},$$

(26)

$$L_{3} = \sqrt {2\varepsilon_{\text{Si}} (\psi_{3} - P_{2} )/(qN_{3} )}.$$

(27)

Since $P_{2}$ is dependent on $V_{\rm GS}$, the $L_{1}$ and $L_{3}$ values are smaller than for the DG-TFET. Because of these smaller depletion lengths, the conduction of the device improves while the drain current is simultaneously increased.

3.4 The modeling of the drain current

Based on Kane’s model [21], the drain current of the device is determined from the band-to-band generation rate in the device volume [18] as

$$\begin{aligned} I_{\rm d} & = q\int\limits_{\text{Volume}} {A_{\text{Kane}} E_{z2} (r,z)} \\ & \quad \times {\kern 1pt} E_{\text{avg}}^{\alpha - 1} \exp \left( { - \frac{{B_{\text{Kane}} }}{{E_{\text{avg}} }}} \right){\text{d}}V), \\ \end{aligned}$$

(28)

where $A_{\text{Kane}} = 4 \times 10^{14} \,{\text{cm}}^{1/2} \,{\text{V}}^{ - 5/2} \,{\text{s}}^{ - 1}$ and $B_{\text{Kane}} = 1.9 \times 10^{7} \,{\text{V/cm}}$ are Kane’s constant parameters. $E_{\text{avg}} = {{E_{\rm g} } \mathord{\left/ {\vphantom {{E_{\rm g} } {ql_{\text{path}} }}} \right. \kern-0pt} {ql_{\text{path}} }}$ is the average electric field [18]. $l_{\text{path}}$ is the tunneling path distance, from the shortest tunneling path distance $L_{\hbox{min} }$ to the largest tunneling path distance $L_{\hbox{max} }$, $E_{z2} (r,z)$ is the lateral electric field in channel region R₂. For indirect-bandgap materials, the material constant $\alpha$ is 2.5, while for direct-bandgap materials the value tends to be 2. The surface potential changes by ${{E_{\rm g} } \mathord{\left/ {\vphantom {{E_{\rm g} } q}} \right. \kern-0pt} q}$ (unit bandgap potential) [22] when the charges tunnel over the tunneling distance from z = 0 to z = $L_{\hbox{min} }$ in the channel region, which is denoted as the shortest tunneling path distance $L_{\hbox{min} }$. This equation can thus [18] be written as

$$\psi_{\rm s,2} (L_{\hbox{min} } ) - \psi_{0} = \frac{{E_{\rm g} }}{q}.$$

(29)

Equation (10) then yields

$$A_{2} \exp (\eta_{2} L_{\hbox{min} } ) + B_{2} \exp ( - \eta_{2} L_{\hbox{min} } ) = X,$$

(30)

where

$$\begin{aligned} X & = \frac{1}{1 - k}\left[ {\psi_{0} + \frac{{E_{\rm g} }}{q} - k\psi_{\rm G} - \left( {1 - k} \right)P_{2} } \right] \\ k & = \frac{1}{{\lambda^{2} }}\left( {\frac{{t_{\text{Si}}^{2} }}{{4R^{2} }} - 1} \right), \\ \end{aligned}$$

$$\begin{aligned} I_{\rm d} & = q\int\limits_{{ - {\raise0.7ex\hbox{${t_{\text{Si}} }$} \!\mathord{\left/ {\vphantom {{t_{\text{Si}} } 2}}\right.\kern-0pt} \!\lower0.7ex\hbox{$2$}}}}^{{{\raise0.7ex\hbox{${t_{\text{Si}} }$} \!\mathord{\left/ {\vphantom {{t_{\text{Si}} } 2}}\right.\kern-0pt} \!\lower0.7ex\hbox{$2$}}}} {\left( {\int\limits_{{L_{\hbox{min} } }}^{{L_{\hbox{max} } }} {A_{\text{Kane}} E_{z2} (r,z)E_{\text{avg}}^{\alpha - 1} } } \right.} \\ & \quad \left. { \times \exp \left( { - \frac{{B_{\text{Kane}} }}{{E_{\text{avg}} }}} \right){\text{d}}z} \right){\text{d}}r. \\ \end{aligned}$$

(31)

Substituting Eq. (23) with i = 2 into Eq. (30), the drain current after integration is given by

$$\begin{aligned} I_{\rm d} & = I_{0} \left[ {\int\limits_{{L_{\hbox{min} } }}^{{L_{\hbox{max} } }} {\left( {\frac{{A_{2} \exp ( - \mu_{{_{1} }} z)}}{{z^{\alpha - 1} }}} \right.} } \right.\, \\ & \quad \left. {\left. { - \frac{{B_{2} \exp ( - \mu_{2} z)}}{{z^{\alpha - 1} }}} \right){\text{d}}z} \right], \\ \end{aligned}$$

(32)

where

$$I_{0} = A_{\text{Kane}} E_{\rm g}^{\alpha - 1} q^{2 - \alpha } \eta_{2} t_{\text{Si}}$$

(33)

is the direct-current (DC) component

$$\begin{aligned} \mu_{1} & = \left( {\left( {qB_{\text{Kane}} /E_{\rm g} } \right) - \eta_{2} } \right), \\ \mu_{2} & = \left( {\left( {qB_{\text{Kane}} /E_{\rm g} } \right) + \eta_{2} } \right). \\ \end{aligned}$$

(34)

The variation of ${1 \mathord{\left/ {\vphantom {1 {z^{\alpha - 1} }}} \right. \kern-0pt} {z^{\alpha - 1} }}$ within the interval $L_{\hbox{min} } \le z \le L_{\hbox{max} }$ is negligible compared with the exponential term [22]. Since the drain current cannot be expressed in closed form, Eq. (32) can be approximated as [18, 22]

$$\begin{aligned} I_{\rm d} \approx I_{0} \left[ { - \frac{{A_{2} }}{{\mu_{1} }}\left( {M_{{L_{\hbox{max} } }} - M_{{L_{\hbox{min} } }} } \right)} \right. \hfill \\ \left. { + {\kern 1pt} \frac{{B_{2} }}{{\mu_{2} }}\left( {N_{{L_{\hbox{max} } }} - N_{{L_{\hbox{min} } }} } \right)} \right], \hfill \\ \end{aligned}$$

(35)

where $M_{z}$ and $N_{z}$ are expressed as

$$M_{z} = \frac{{\exp ( - \mu_{1} z)}}{{z^{\alpha - 1} }},\;\;\;\;N_{z} = \frac{{\exp ( - \mu_{2} z)}}{{z^{\alpha - 1} }}.$$

(36)

Note that $M_{{L_{\hbox{max} } }}$ ≪ $M_{{L_{\hbox{min} } }}$ and $N_{{L_{\hbox{max} } }}$ ≪ $N_{{L_{\hbox{min} } }}$, since $L_{\hbox{max} }$ > $L_{\hbox{min} }$. Thus, the drain current can be further approximated as [18]

$$I_{\rm d} \approx I_{0} \left[ {\frac{{A_{2} M_{{L_{\hbox{min} } }} }}{{\mu_{1} }} - \frac{{B_{2} N_{{L_{\hbox{max} } }} }}{{\mu_{2} }}} \right].$$

(37)

3.5 The threshold voltage using the SD method

Among the various methods available for extracting the threshold voltage, the transconductance extrapolation method (GMLE) and second-derivative (SD) method have been proved to provide accurate and more practical results [23]. The gate voltage applied to the device at which its transconductance $g_{\rm m}^{'}$ reaches the maximum value is defined as the threshold voltage (V_th) [22, 23]:

$$g_{\rm m}^{'} = \frac{{\partial g_{\rm m} }}{{\partial V_{\text{GS}} }},$$

(38)

where $g_{\rm m}$ is the transconductance, obtained as

$$g_{\rm m} = \frac{{\partial I_{\rm d} }}{{\partial V_{\text{GS}} }}.$$

(39)

3.6 The threshold voltage using the minimum channel potential method

The minimum surface potential distribution along the channel region can be obtained as

$$\psi_{{\rm s},\hbox{min} } = 2\sqrt {A_{2} B_{2} } + \frac{{qN_{\rm s} }}{{\eta_{2} \varepsilon_{\text{Si}} }} + \psi_{\rm G}.$$

(40)

For the threshold condition [24], this gives

$$\psi_{{\rm s},\hbox{min} } = 2\varphi_{\rm F}$$

(41)

and

$$V_{\text{GS}} = V_{\text{th}}.$$

(42)

Using Eqs. (40) and (41), a quadratic approximation for the threshold voltage can be obtained as [21]

$${{AV}}_{\text{th}}^{2} + {{BV}}_{\text{th}} + C = 0.$$

(43)

4 Results and discussion

In this section, the results obtained using the proposed analytical model for the GAA-HJTFET are validated against ATLAS TCAD-based simulation data. Germanium (Ge) is employed at the source. Aluminum with a work function of $\varphi_{\rm m}$ = 4.05 eV is used as the gate metal, and the results are compared with a homojunction GAA TFET. The variation of the surface potential across the three regions, viz. the source–channel, channel, and drain–channel regions, for different ramping gate voltages is shown in Fig. 2. The sharp changes at the source–channel are due to the high band-tuning property of the heterojunction Si–Ge material, which remains constant across the entire channel region. As the gate-to-source voltage is increased, the potential across the entire channel region (including the source and drain junctions) also shoots up. For a considerable increase in the gate-to-source voltage, the source depletion region R₁ extends out towards the source, whereas the drain depletion region R₃ is shortened due to the variations on the higher and lower sides of the reverse-bias voltages at the source–channel and drain–channel junctions.

Fig. 2

The surface potential distribution along the channel for different V_GS values of 0, 0.5, 1, and 1.5 V with L₂ = 50 nm, t_Si = 12 nm, and V_DS = 1 V

Figure 3 shows the variation of the surface potential for diverse drain-to-source voltages V_DS, in which the channel potential is the same and the device is found to vary little, barring the drain depletion region R₃. This variation across the drain implies a reduced drain-induced barrier lowering (DIBL) effect, as it is nearly independent of V_DS. The variation of the lateral (E_z) and vertical (E_r) electric field in the channel region compared with that of the homojunction GAA TFET is shown in Fig. 4.

Fig. 3

The surface potential along the channel for different V_DS values of 1, 1.2, and 1.4 V with L₂ = 50 nm, t_Si = 12 nm, and V_GS = 1 V

Fig. 4

The variation of the lateral and vertical electric fields along the channel for the homojunction GAA TFET and GAA-HJTFET

Due to the smaller values of $L_{1}$ and $L_{3}$, a higher lateral electric field is obtained in the tunneling region. It is observed that the homojunction GAA TFET shows a peak magnitude variation at both the source–channel and drain–channel junctions, while the GAA-HJTFET shows a magnitude variation at only the source–channel junction and is nearly zero in the entire channel region. The variation of the drain current compared with the homojunction GAA TFET is shown in Fig. 5, clearly indicating that the threshold voltage is lower while the ON current increases along with the OFF current in the GAA-HJTFET. Figure 6 shows the resulting drain current variation as a function of the gate voltage for different t_Si values, revealing an increase in the drain current I_d with a decrease in t_Si due to the significant band-to-band tunneling of electrons from the valance to conduction band of the channel; the decrease in the drain current with an increase in t_Si reduces the shortest tunneling path length L_min.

Fig. 5

The variation of the drain current with the gate-to-source voltage (V_GS)

Fig. 6

The I_d–V_GS characteristics for different channel thicknesses t_Si of 10 nm, 15 nm, and 20 nm

The variation of the drain current I_d as a function of the drain-to-source voltage V_DS is shown in Fig. 7 for different V_GS values, clearly indicating that an increase in the gate voltage will increase the drain current I_d as a result of the decreasing barrier height, which further increases the movement of added electrons from the source to channel.

Fig. 7

The I_d–V_DS characteristics for different gate-to-source voltages V_GS of 0.8 V, 1 V, and 1.2 V with t_Si = 15 nm

Figure 8 shows the resulting variation of the drain current as a function of the drain-to-source voltage V_DS for different channel thicknesses. An increase in t_Si decreases the drain current I_d due to the reduced tunneling volume. Figure 9 shows the transconductance plot for different channel thicknesses with V_GS = 1 V and L = 50 nm. The peak value at the drain junction can be attributed to the increase in the shortest tunneling path L_min. Figure 10 shows a comparison of the drain current, the transconductance, and the first derivative of the transconductance with L = 50 nm, V_DS = 1 V, and t_Si = 15 nm. The dependence of the current on the gate bias changes from quasiexponential to linear with an increase in the gate bias. It is observed that the peak is high for the first derivative of the transconductance due to the decrease in the tunneling volume, which indicates the threshold voltage. Figure 11 demonstrates the extraction of the threshold voltage, where the peak transition at the drain–channel junction is due to the quasiexponential and linear dependence of the drain current I_d with the gate voltage V_GS. When using the second derivative method for extraction of the threshold voltage, the device in the linear region is sensitive to measurement error and noise. Figure 12 shows the threshold voltage plot along the channel length using the minimum channel potential method, revealing that the threshold voltage increases linearly from the source to channel region until it saturates due to the maximum electric field at the junction. The threshold voltage remains constant along the channel region due to the independence from the gate length for positive voltage. The threshold voltage shift is high for high doping concentration. Figures 11 and 12 show that the threshold voltage obtained by the second derivative method is low compared with that extracted using the minimum channel potential method.

Fig. 8

The I_d–V_DS characteristics for different silicon thicknesses of t_Si = 15 nm and 20 nm with V_GS = 1 V

Fig. 9

The g_m–V_GS plots for different channel thicknesses t_Si of 10 nm, 15 nm, and 20 nm

Fig. 10

A comparison of the plots of I_d, $g_{\rm m}$, and $g_{\rm m}^{'}$ with L = 50 nm

Fig. 11

The extraction of the threshold voltage V_th

Fig. 12

The threshold voltage along the channel for V_DS = 0.5 V and V_GS = 0.8 V

Figure 13 shows the subthreshold swing for different oxide thicknesses; for the proposed device, it is limited to 48 mV/dec, which is less than for a MOSFET device. This plot reveals that the subthreshold swing is constant across the channel length, thus decreasing the DIBT in this device.

Fig. 13

The subthreshold swing across the channel length for different oxide thicknesses

5 Conclusions

A 2-D analytical model for the surface potential, electric field, drain current, transconductance, and threshold voltage of a GAA-HJTFET is developed, including the source–channel, channel, and drain–channel depletion regions. The lateral electric field corresponding to the channel depletion is used to calculate the BTBT generation rate analytically and thus extract the drain current. Based on the drain current, the transconductance and threshold voltage are derived, then the threshold voltage is obtained using the quasiexponential and linear dependence of the drain current I_d on the gate voltage V_GS. The proposed model predicts the characteristics of the GAA-HJTFET for different parameter values to provide insight into the device physics. Validation of the results against simulations reveals good agreement.