1 Introduction

Heterodyne and low IF receivers suffer from the image problem, in which an image signal superimposes the desired signal, degrading the overall system performance. Low-IF transceivers suffer from the presence of image signals, caused by the down-conversion operation realized by a complex mixing. Unfortunately, the conventional real filters have not the capability for removing these undesired signals due to their symmetrical response around dc. The complex filters have been introduced to overcome this problem [1]. This kind of filters are constructed from two-path networks, where a pair of signals with equal amplitudes and quadrature phases (I and Q channels) are applied at their inputs. Complex signal processing is formally described in the literature (see [1,2,3] and the references cited therein).

RC Polyphase filter which can be considered as a complex filter is used in the low-IF wireless receiver to filter out the image signal [2, 3]. However, from IC realization point of view, RC Polyphase filters has some important drawbacks. The time constants of these filters can not be set accurately due to tolerances of the passive components in integrated circuit environment. On the other hand, these filters are designed to suppress image signals at low frequencies, thus requires large capacitors which occupy large chip area [4,5,6,7,8,9,10,11,12,13].

From the other side, MOS-only active filters which do not employ the on-chip bulky capacitors has attracted some interest recently [14,15,16,17,18]. This kind of filters offer some important advantages from IC realization point of view such as [19,20,21]:

  1. 1.

    MOS transistor provides higher capacitance density compared to conventional metal-plate capacitors.

  2. 2.

    MOS-only filters operate well at high-frequency region, owing to the fact that gate capacitances, the largest intrinsic device capacitor are considered during the design of the filters.

  3. 3.

    electronic tuning property of the important filter parameters, since the time constants are function of device transconductances which are controlled by biasing currents.

On the other hand, MOS-only active filters suffer from an inherent low frequency limitation. For achieving low frequency of operation, a design technique is applied to the MOS-only polyphase filter. Thus the obtained modified filter achieves the operating towards lower frequency region.

In this paper, the design of a MOS-only polyphase filter using cross-coupled MOS transistor pairs is presented  [22, 23]. In this way, the operating frequency of the modified filter is decreased without using any bulky on chip capacitors. In order to reveal the advantages of the proposed circuit in terms of the chip area occupied, layouts of the classical passive polyphase filter and the proposed MOS-only polyphase filters are obtained [24]. It is found that, the proposed filter achive an area saving of 72%. Finally, in order to demonstrate the usefullness of the theoretical approach, simulation results are obtained using Spectre simulator in Cadence design environment.

2 Image problem and the use of polyphase filters for image rejection

The superheterodyne radio receiver is an important type of architecture widely used in various communications applications. One important issue associated with the superheterodyne radio is the image problem.

The image problem is illustrated in Fig. 1. This issue arises from the fact that two different signals can be translated to the same intermediate frequency region of the receiver. To achieve this issue, the receiver should provide some amount of image rejection. The image rejection of a receiver is specified as the ratio between the wanted and image signals expressed in decibels (dB) at the intermediate frequency.

Fig. 1
figure 1

Image problem in conventional RF receivers

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The image interference problem becomes very challenging for low-IF receivers.

A possible solution is to use a complex polyphase filter. The conventional polyphase filter realized using passive elements is given in Fig. 2.

Fig. 2
figure 2

First-order RC polyphase filter

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Assuming that the complex transfer function is defined as,

$$H(\omega ) = \frac{{I_{out} + jQ_{out} }}{{I_{in} + jQ_{in} }}$$

the analysis of the circuit in Fig. 2 yields

$$H(\omega ) = \frac{1 + \omega RC}{{1 + j\omega RC_{{}} }}$$
(1)

Note that the filter provides unsymmetrical characteristics, i.e. \(H\left( \omega \right) \ne H\left( { - \omega } \right).\)

Thus, the filter magnitude can be expressed as follows:

$$|H(\omega )|^{2} = 1 + \frac{2\omega RC}{{1 + (\omega RC)^{2} }}$$
(2)

which shows that for positive frequencies, its magnitude remains between 0 and 3 dB, while for negative frequencies, the magnitude function has a zero at ω = − 1/RC. Therefore, the circuit in Fig. 2 can be used as an image reject filter.

3 Realization of MOS-only polyphase filter

3.1 Synthesis procedure

The basic topology used as the basic block of the polyphase filter is shown in Fig. 3. The passive polyphase circuit mentioned above consists of two parts, the phase and the quadrature phase. The active-only equivalent of the passive polyphase filter can be obtained by using the subcircuits shown in Fig. 3.

Fig. 3
figure 3

Basic RC subcircuit

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The transfer function of the passive subcircuit is determined as follows:

$$V_{0} = \frac{1}{1 + sRC}\left( {V_{1}^{ + } - V_{1}^{ - } } \right) + \frac{sRC}{1 + sRC}\left( {V_{2}^{ + } - V_{2}^{ - } } \right)$$
(3)

Note that in case of \(V_{1}^{ + } - V_{1}^{ - } = V_{in}\) and \(V_{2}^{ + } - V_{2}^{ - } = - jV_{in} ,\) i.e. quadrature signals are applied to the filter, we obtain the function in (1). This also shows that: The desired signal with positive frequency falls in the filter’s passband while the image signal at negative frequency is suppressed.

The proposed general allpass topology is given in Fig. 4(b). The circuit (small-signal) transfer function is given by:

$$\frac{{V_{out} }}{{V_{in} }} = 1 - \frac{{g_{m1} }}{Y}$$
(4)
Fig. 4
figure 4

a Simplified small-signal device model used in the filter synthesis. b General polyphase filter topology [25]

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In order to realize the MOS-only polyphase filter, the circuit simulating parallel RC impedance is to be obtained. The MOS-only simulator of parallel RC circuit is shown in Fig. 5.

Fig. 5
figure 5

Simulator of a parallel RC circuit [25]

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As it can be seen from the circuits, the equivalent MOS-only circuit of the parallel RC impedance is to be obtained. It is easy to verify that these active-only circuit realizes the desired function with: R = 1/gm2, C = Cgs2.

In order to realize MOS-only equivalent of the passive RC subcircuit, it is proposed a MOS-only polyphase filter which realizes highpass and lowpass type characteristics simultaneously. These circuits are shown in Fig. 6.

Fig. 6
figure 6

MOS-only simulator of high-pass and low-pass characteristic

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As it can be seen from the circuit, the low pass and high pass filter functions are also achieved. Hence the passive subcircuit in Fig. 3 is implemented as MOS-only circuit. This circuit realize the transfer function as follows:

$$V_{out} = \left( {1 - \frac{{{{g_{m1} } \mathord{\left/ {\vphantom {{g_{m1} } {C_{gs} }}} \right. \kern-0pt} {C_{gs} }}}}{{s + {{g_{m2} } \mathord{\left/ {\vphantom {{g_{m2} } {C_{gs} }}} \right. \kern-0pt} {C_{gs} }}}}} \right)V_{2}^{ + } - \frac{{{{g_{m3} } \mathord{\left/ {\vphantom {{g_{m3} } {C_{gs} }}} \right. \kern-0pt} {C_{gs} }}}}{{s + {{g_{m2} } \mathord{\left/ {\vphantom {{g_{m2} } {C_{gs} }}} \right. \kern-0pt} {C_{gs} }}}}V_{1}^{ - }$$
(5)

Note that, proposed MOS-only circuit realizing the RC subcircuit is given in differential mode; hence the circuit also enjoys all the advantages of differential-mode of operation.

The MOS small-signal model and the subcircuits shown in Fig. 6 are used in the synthesis prosedure of the proposed active-only polyphase filter. The small-signal transfer function is obtained by:

$$V_{0} = \frac{{g_{m3} /g_{m2} }}{{1 + sC_{gs} /g_{m2} }}\left( {V_{1}^{ + } - V_{1}^{ - } } \right) + \left( {1 - \frac{{g_{m1} /g_{m2} }}{{1 + sC_{gs} /g_{m2} }}} \right)\left( {V_{2}^{ + } - V_{2}^{ - } } \right)$$
(6)

where Cgs is the intrinsic gate capacitance and gm2 is the small-signal transconductance of the transistors. Provided that all transistors’ transconductances are equal, the expressions in (3) and (6) are identical and the MOS-only circuit in Fig. 7 simulates the RC subcircuit in Fig. 3.

Fig. 7
figure 7

Proposed MOS-only circuit realizing the RC subcircuit in Fig. 3

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3.2 Effects of parasitics

So far, in order to simplify the design of the filters, we have considered the simplified MOSFET model in Fig. 4(a), while the effects of the other parasitics are not taken into account.

When the parasitic capacitances of the MOS transistor are considered, the transfer function of the circuit is reobtained. The overlap (Cgd) capacitances are negligible since they are very small compared to other parasitic capacitances, and the effect of the bulk capacitors (Cdb and Csb) is taken into account during the systhesis procedure.

Hence the transfer function is obtained as follows:

$$\begin{aligned} & V_{out} = \left( {1 - \frac{{{{g_{m1} } \mathord{\left/ {\vphantom {{g_{m1} } {(C_{gs} + C_{p} )}}} \right. \kern-0pt} {(C_{gs} + C_{p} )}}}}{{s + ({{g_{m2} + g_{o} )} \mathord{\left/ {\vphantom {{g_{m2} + g_{o} )} {(C_{gs} + C_{p} )}}} \right. \kern-0pt} {(C_{gs} + C_{p} )}}}}} \right)V_{2}^{ + } - \frac{{{{g_{m3} } \mathord{\left/ {\vphantom {{g_{m3} } {(C_{gs} + C_{p} )}}} \right. \kern-0pt} {(C_{gs} + C_{p} )}}}}{{s + {{(g_{m2} + g_{o} )} \mathord{\left/ {\vphantom {{(g_{m2} + g_{o} )} {(C_{gs} + C_{p} )}}} \right. \kern-0pt} {(C_{gs} + C_{p} )}}}}V_{1}^{ - } \\ & C_{p} = (C_{db1} + C_{sb1} + C_{db3} + C_{sb3} )\,\,{\text{and }}\,\,g_{o} = g_{ds1} + g_{ds3} . \\ \end{aligned}$$
(7)

Note that by predistorting the values of the capacitor Cgs and transconductance gm2, the effects of the parasitics can be reduced.

3.3 Implementation of image-reject polyphase filter

In order to compose the active only equivalent circuit of the RC subcircuit shown in Fig. 3, the possible procedure is described in Fig. 8. As it can be seen clearly from this figure, the active-only polyphase filter can be obtained accordingly by interconnecting two of the subcircuits in Fig. 7.

Fig. 8
figure 8

a Implementation of the MOS-only polyphase filter realizing the RC subcircuit in Fig. 3. b Realization of NMOS current mirrors. c Realization of PMOS current mirrors

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It is clear that, the center frequency of the complex bandpass filter is obtained such as: ω0 = gm2/Cgs. It can be seen that, a filter with all key parameters are electronically adjustable. It should be note that, the lack of passive capacity and resistance elements in the circuit design has significantly reduced the area covered by the filter.

In the circuit, all biasing currents are 7.5 µA except for the tail currents which are 5 µA and using these parameter values, the center frequency is measured as 12.8 MHz. The dimensions of MOS transistors in the circuit are shown in Table 1. 

Table 1 Dimensions of MOS transistors
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With these biasing conditions, the value of parasitic gate- source capacitances and transconductances of the transistors were calculated as Cgs2 = 600 fF and gm2 = 50 µA/V. Using these values in the expression in Eq. (6), the center frequency is calculated as fo = 13.2 MHz. On the other hand, from the characteristics given in Fig. 9, the filter center frequency is calculated as 12.8 MHz, which agrees well with the value derived from theoretical expressions.

Fig. 9
figure 9

Simulation result of first order MOS-only polyphase filter

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In addition to that, in application where necessary image rejection ratio is required, the designed first-order polyphase filter can be used in cascade configuration to realize second order polyphase filter.

As it can be seen from the Fig. 10, in accordance with theoretical value the image reject ratio is found to be approximately 60 dB. On the other hand, the magnitude is about 6 dB at positive frequencies.

Fig. 10
figure 10

Magnitude characteristics of first order (dashed line) and second order (solid line) MOS-only polyphase filters

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4 Proposed technique based on adding cross-coupled transistor pairs for low frequency MOS-only filter

In low IF circuits, the low frequency RC circuit occupies too much space on the chip. Since capacitance and resistance are not used in MOS-only circuits, this kind of filters provides substantial area advantage in contrast to the passive RC circuits.

On the other hand, for achieving low natural frequencies, either the value of gm, i.e. MOS biasing current should be decreased or the value of Cgs should be increased. However, MOS biasing current can not be decreased below a specific value at which the transistor enters the subthreshold regions where filter suffers from large distortion due to the governing transistor’s exponential nonlinearity. On the other hand, to increase the value of Cgs implies the use of large devices that increase the chip area occupied by the circuits.

In order to overcome this problem, it is used a technique which is based on adding a cross coupled MOS transistor pairs, Mjp and Mjn. Provided that (W/L)jp = K(W/L)ip and (W/L)jn = K(W/L)in, or equivalently gmip = gmin = Kgmjp = Kgmjn,  the filter’s new pole is obtained as \(\hat{f}_{p} = f_{p} (1 - K)\) where the value of K is nonnegative and less than unity. As it can be seen from Fig. 11, this shows that by applying this technique, the filter’s pole frequency is reduced by a factor of 1 − K.

Fig. 11
figure 11

The cross coupled MOS transistor technique for realizing low frequency filters [23]

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It is considered the filter shown in Fig. 8 to indicate the usefulness of the idea. Assuming that all MOS transistors operate in saturation region, transconductances from the body effect, gate drain overlap capacitances, Cgd and parasitic junction capacitances Csb and Cdb of the devices are neglected. The modified circuit is obtained as shown in Fig. 12 according to the technique described above.

Fig. 12
figure 12

MOS-only polyphase filter obtained according to the proposed technique

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Routine analysis of the circuit yields the following transfer function:

$$V_{0} = \frac{{g_{m3} (1 - K)}}{{g_{m2} (1 - K) + sC_{gs} (1 + K)}}\left( {V_{1}^{ + } - V_{1}^{ - } } \right) + \left(1 - \frac{{g_{m1} (1 - K)}}{{g_{m2} (1 - K) + sC_{gs} (1 + K)}}\right)\left( {V_{2}^{ + } - V_{2}^{ - } } \right)$$
(8)

where K  =  gm6/gm2 = gm4/gm1 = gm5/gm3. In the new case, the filter pole frequency is now given by:

$$\omega_{0} = \frac{{g_{m2} (1 - K)}}{{C_{gs2} (1 + K)}}$$
(9)

It should be noted that the filter frequency is actually modified by a factor of (1–K)/(1 + K). This is due to fact that gate capacitances of the cross-coupled transistors appear in parallel with the existing gate capacitors and increase the total capacitance in the circuit. In order to test the feasibility of the  proposed technique, it is obtained simulation result of the modified filter in Fig. 13 by choosing K = 0.75.

Fig. 13
figure 13

Magnitude characteristics of the modified filters showing that the natural frequency is 1.8 MHz without using any bulky on-chip capacitors (K = 0.75)

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5 Post-layout simulation results

In order to show the feasibility of the modified filter, the layouts of the circuits were drawn and their areas occupied on the chip were calculated. The filters were simulated using Spectre simulation tool in Cadence design environment using the parameters of AMS 0.35 µm CMOS process. The initial and modified filters shown in Figs. 8 and 12 were biased with ± 1.65 V DC power supply and all the current sources were realized using simple CMOS current mirrors.

In the modified circuit, the factor K is set to be 0.75 by adjusting the transistor dimension ratios and the center frequency is measured as 1.8 MHz. The circuit area is measured as 9184 µm2. In order to show the advantages of the active filter compared to the filter realized using any bulky on-chip capacitors, the circuit is redesigned using on-chip capacitors with the same center frequency of 1.8 MHz. The chip area occupied by the integrated circuit is determined as 32,490 µm2 at this time. It is much larger than the above active only filters. This comparison shows the benefits of the active only filters and the proposed method. From the filters’ layouts, it is found that an area saving of 72% is achieved using the proposed technique. The layouts of the circuits are shown in Fig. 14(a, b).

Fig. 14
figure 14

a The layout of modified circuit based on adding cross-coupled transistor pairs (f0 = 1.8 MHz), b the layout of the circuit redesigned using on-chip capacitors (f0 = 1.8 MHz)

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Note that a number of MOS-only filters have been presented in the literature. Among these, the one in the [18] is appealing due its very simple topology. In order compare the proposed complex filter with this circuit, we have used a figure of merit. Note that the proposed complex filter processes two channels, i.e. in-phase and quadrature phase channels, while the filter in the reference is meant to process a single channel. In a possible complex filtering application, two of the filters given in the reference should be used. Therefore, it is more appropriate to compare the proposed circuit based on a figure of merit normalized to the number of channel.

Therefore, the figure of merit is proposed here as

$$FOM = \frac{{chip - area\,\,{ \times } \,\,power - dissipation}}{{channel \,\,{ \times } \,\,filter - order^{2} }}$$

Note that with this chip area and power dissipation are both evaluated as per pole and per channel. According to the above equation, FoM values are obtained respectively for the proposed complex filter and the filter in [18] as 91 [(µm)2 mW] and 301 [(µm)2 mW].

As can be seen from these results, the proposed complex filter circuit is much more advantageous in terms of area.

6 Conclusions

In this paper, a MOS-only polyphase filter having a simple topology with electronically adjustable filter parameters is presented. In order to verify the usefulness and feasibilities of the circuit, Cadence Spectre simulation results are provided. The proposed MOS-only polyphase circuit suffer from an inherent low frequency limitation. In order to address this issue, the modification techniqe allowing the derivation of MOS-only filter which allows extension of the operating frequency towards lower frequency region is used. This technique based on using cross-coupled MOS transistor pairs. Detailed simulations results of the filters modified according to the this technique are also provided in order to verify the usefulness of the theoretical approach.

Finally, in order to demonstrate the usefullness of the approaches, first order polyphase filter pole frequency as low as 1.8 MHz is obtained by using the cross coupled MOS-transistor technique. The layouts of the filters were drawn and their areas occupied on the chip were calculated. The filters were simulated using Spectre simulation tool in Cadence design environment using the parameters of AMS 0.35 µm CMOS process.