1 Introduction

In 1971 memristor and a 2-port mutator, with a very complex circuit structure, for transforming nonlinear circuit elements to memristor was introduced in [1]. Recently different circuit structures for 2-port mutators have been introduced for obtaining Memstors (a generic name covering memristors, meminductors, memcapacitors) from nonlinear resistors or, converting one type of memstor to another [1,2,3,4,5,6,7].

The idea of a new class of multifunctional 4-ports was first introduced in [8] and then named metamutator, because of its ability of transforming many kinds of circuit elements to each other among other applications. These 4-port metamutators can be used for realizing mutators, quadrature oscillators, inverters, trans-admittance, trans-impedance amplifiers and gyrators by properly terminating some of its ports. Different kinds of circuit structures for metamutators have been introduced in [8,9,10,11,12]. Because of the port description matrix (1) and the negative sign in the voltage relation of two of its ports, it was named as Voltage Inverting Metamutator (VIM).

Recently, different kinds of filters and multifunctional filters with diverse realizations have been introduced by several researchers and manufacturers [13,14,15,16]. Universal filters are able to realize different types of filters low-pass (LP), high-pass (HP), band-pass (BP), band-stop (BS) and all-pass (AP) simultaneously. They are widely used in electronic measurements, communications and neural networks. The voltage-mode active filters with high input impedance are useful because by cascading several filters of this type, higher order filters can be realized [24, 25].

According to the number of input and output ports, filters can be classified into three categories: (1) single-input, multiple-output (SIMO) [26, 27], (2) multiple-input, single-output (MISO) [28] and (3) multiple-input, multiple-output (MIMO) type [29]. Similarly different realizations of a variety of impedance simulators, gyrators, frequency dependent negative resistors (FDNR) simulators are being considered by several companies and authors [17,18,19,20,21]. In [19] a FDNR simulator with two DO-CCIIs, three resistors and one capacitor, in [20, 23] a FDNR using two current backward transconductance amplifiers (CBTAs) and several passive components is presented. A FDNR simulator with two voltage differencing current conveyors (VDCCs), a single grounded resistor and two grounded capacitors is proposed in [22]. With two or more active devices in their structure, most of these circuits necessitate component matching. Also, because of many active devices present, existing parasitic elements and non-ideal gain effects create severe problems; less number of active devices causes less amount of disparity.

With the first part of the paper the newly introduced metamutator, named as current inverting metamutator (CIM) due to its port description matrix (2) and the negative sign in the current relation of two of its ports, is being presented in Sect. 2. Three CIM circuit realizations will be offered in Sect. 3. Application of CIM as universal filter is proposed in Sect. 4 with its simulation results in Sect. 5.

In the second part of the paper a new metamutator circuit with only one new active device, additive and differential-integrated circuit (AD-IC) realized only with twelve transistors, will be proposed; its port description matrix and circuit structure with twelve transistors using TSMC 0.25 µm CMOS process parameters will be given in Sect. 6. Theoretical analysis of the inductor simulator, capacitance multiplier, and FDNR will be presented in Sect. 7. The layout, the post-layout simulation results obtained using TSMC 0.25 µm process parameters with ± 1.25 V supplies confirming the claimed applications, including memristor’s signature, will be exhibited in Sect. 8. In the circuits introduced here, as only one active device and few passive components are being used, there is no need of matching components and functionality. Finally, Sect. 9 will conclude the paper.

2 VIM and CIM

The 4-port block diagrams of VIM and CIM are shown in Figs. 1 and 2 and their port descriptions are defined via the equalities (1) and (2) respectively. Although identity matrix shows in both expressions in VIM a port voltage is being inverted whereas, in CIM a port current is inverted. As care must be exercised in the implementation phase as to which variable follows the other in (1) and (2), variables have been indexed with letters k, l, m, n taking different values from the set {1, 2, 3, 4} as required by the application.

$$\left[ {\begin{array}{*{20}c} {i_{k} } \\ {i_{l} } \\ {v_{m} } \\ {v_{n} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } & {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } \\ {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } & {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} { \begin{array}{*{20}c} {i_{m} } \\ {i_{n} } \\ \end{array} } \\ {\begin{array}{*{20}c} { v_{l} } \\ { - \,v_{k} } \\ \end{array} } \\ \end{array} } \right]$$
(1)
$$\left[ {\begin{array}{*{20}c} {i_{k} } \\ {i_{l} } \\ {v_{m} } \\ {v_{n} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } & {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } \\ {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } & {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} { \begin{array}{*{20}c} {i_{m} } \\ { - \,i_{n} } \\ \end{array} } \\ {\begin{array}{*{20}c} { v_{l} } \\ {v_{k} } \\ \end{array} } \\ \end{array} } \right]$$
(2)
Fig. 1
figure 1

Block diagram of VIM [8, 9]

Full size image
Fig. 2
figure 2

Block diagram of CIM

Full size image

3 Proposed realizations of CIM

3.1 Realization with one CFOA and one CCII+

In this section, three new CIM structures using two off the shelf active devices are being proposed. The circuit structure of the first one for l = 1, n = 2, k = 3, m = 4 is shown in Fig. 3, using one current feedback operational amplifier (CFOA) and one second-generation plus type current conveyor (CCII+) are being employed, which are defined respectively by (3) and (4).

$$\left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} {i_{z} } \\ {v_{x} } \\ \end{array} } \\ {\begin{array}{*{20}c} {v_{w} } \\ {i_{y} } \\ \end{array} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } & {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } \\ {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } & {\begin{array}{*{20}c} 1 & 0 \\ 0 & 0 \\ \end{array} } \\ \end{array} } \right] \cdot \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} {i_{x} } \\ {v_{y} } \\ \end{array} } \\ {\begin{array}{*{20}c} {v_{z} } \\ {i_{w} } \\ \end{array} } \\ \end{array} } \right]$$
(3)
$$\left[ {\begin{array}{*{20}c} {i_{y} } \\ {v_{x} } \\ {i_{z} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} 0 & 0 & 0 \\ 1 & 0 & 0 \\ 0 & 1 & 0 \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {v_{y} } \\ {i_{x} } \\ {v_{z} } \\ \end{array} } \right]$$
(4)
Fig. 3
figure 3

Metamutator using CFOA and CCII+

Full size image

After some algebraic manipulations using KCL and KVL the port relation matrix describing the circuit in Fig. 3 becomes as given with expression (2).

3.2 Realization with two DOCCIIs

As shown in Fig. 4, the second CIM is designed by using two dual output second generation current conveyors (DOCCII) with port definition matrix shown in (5). The structure of this metamutator is extracted from [4].

$$\left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} {i_{z + } } \\ {i_{z - } } \\ \end{array} } \\ {\begin{array}{*{20}c} {v_{x} } \\ {i_{y} } \\ \end{array} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}l} 1 \hfill & 0 \hfill & 0 \hfill \\ { - \,1} \hfill & 0 \hfill & 0 \hfill \\ 0 \hfill & 1 \hfill & 0 \hfill \\ 0 \hfill & 0 \hfill & 0 \hfill \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {i_{x} } \\ {v_{y} } \\ {v_{z} } \\ \end{array} } \right]$$
(5)
Fig. 4
figure 4

Metamutator with two DOCCIIs

Full size image

After some algebraic manipulations the port relation matrix between currents and voltages of the circuit in Fig. 4 becomes as given with expression (2) thus identifying a CIM.

3.3 Realization with two CFOAs

The third CIM is designed using two CFOA defined by (3), as shown in Fig. 5. It can easily be verified that the 4-port satisfies the CIM port description as given by (2).

Fig. 5
figure 5

Metamutator realized with two CFOAs

Full size image

4 Application of CIM as universal filter

In [30,31,32,33,34,35,36,37,38] several multi input VM universal biquadratic filters were introduced and different kinds of filters can be realized by properly selections of input voltage terminals in these circuits. However, these circuits suffer from one or more of the following problems:

  1. 1.

    In [33, 34, 36,37,38] the necessity of passive component matching conditions,

  2. 2.

    In [30,31,32, 35] lack of orthogonal controllability of the resonance angular frequency (ω0) and quality factor (Q),

  3. 3.

    In [34, 36, 37] use of many passive components.

Application of CIM as a voltage mode (VM) universal filter is presented in this section. As an example, the CIM circuit with one CFOA and one CCII+ is selected. Using Table 1 to connect properly elements to ports of CIM in Fig. 3, different realizations of a multifunctional filter will be obtained. For example, applying realization #1 the circuit will become as shown in Fig. 6.

Table 1 Multıfunctional filter realizations
Full size table
Fig. 6
figure 6

Universal filter realization #1 with CCII+ and CFOA

Full size image

From (2) v2 = v3 and selecting the output as \(v_{3} = v_{\text{out}}\), KCL at port 2 of the circuit in Fig. 6 gives:

$$I_{2} = sC_{1} \left( {V_{S1} - V_{\text{out}} } \right) + \frac{{\left( {V_{S2} - V_{\text{out}} } \right)}}{{R_{1} }}$$
(6)

Using i1 = i2, v4 = v1 from (2), \(i_{1} = - \,\frac{{v_{1} }}{{R_{3} }}\), and \(V_{4} = - \,\frac{1}{{sC_{2} }}I_{4}\) in (6), gives:

$$I_{4} = s^{2} C_{1} C_{2} R_{3} \left( {V_{S1} - V_{\text{out}} } \right) + \frac{{sC_{2} R_{3} }}{{R_{1} }}\left( {V_{S2} - V_{\text{out}} } \right)$$
(7)

then using i3 = − i4 and \(I_{3} = \left( {V_{S3} - V_{\text{out}} } \right)/R_{2}\) in (7) gives

$$\frac{{\left( {V_{S3} - V_{\text{out}} } \right)}}{{R_{2} }} = s^{2} C_{1} C_{2} R_{3} \left( {V_{\text{out}} - V_{S1} } \right) + \frac{{sC_{2} R_{3} }}{{R_{1} }}\left( {V_{\text{out}} - V_{S2} } \right)$$
(8)

Solving for \(V_{\text{out}}\) in terms of VS1, VS2 and VS3 from (8) the output of the multifunctional filter is found as shown by (9), with the selection of different voltage sources resulting in different filter functions as shown in Table 2:

$$V_{\text{out}} \left( s \right) = \frac{{s^{2} C_{1} C_{2} R_{1} R_{2} R_{3} V_{S1} + sC_{2} R_{3} R_{2} V_{S2} + R_{1} V_{S3} }}{{s^{2} C_{1} C_{2} R_{1} R_{2} R_{3} + sC_{2} R_{3} R_{2} + R_{1} }}$$
(9)
Table 2 Different filters of realization #1
Full size table

So, the proposed CIM circuit can realize all filter functions with no requirements for matching conditions. The angular resonance frequency (ω0) and the quality factor (Q) of all filter responses, given in Table 2, are:

$$\omega_{0} = \frac{1}{{\sqrt {C_{1} C_{2} R_{2} R_{3} } }}$$
(10)
$$Q = R_{1} \sqrt {\frac{{C_{1} }}{{C_{2} R_{2} R_{3} }}}$$
(11)

As shown by (10) and (11), the angular frequency can be controlled by R2 and/or R3 and the quality factor can be independently controlled by R1. So the angular frequency and quality factor are orthogonally controllable. In the case of C1 = C2 = C and R1 = R2 = R3 = R the angular frequency becomes \(\omega_{0} = \frac{1}{RC}\) and the quality factor is Q = 1. All of the filters have non-inverting unity gain and these results are also valid for other CIM circuits introduced in Sect. 3.

Taking into consideration of CIM non-idealities the port description matrix of CIM becomes,

$$\left[ {\begin{array}{*{20}c} {i_{1} } \\ {i_{3} } \\ {v_{2} } \\ {v_{4} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} {\alpha_{1} } & 0 \\ 0 & { - \,\alpha_{2} } \\ \end{array} } & {\begin{array}{*{20}c} 0 & { 0} \\ 0 & { 0} \\ \end{array} } \\ {\begin{array}{*{20}c} 0 & { 0} \\ 0 & { 0} \\ \end{array} } & {\begin{array}{*{20}c} {\beta_{1} } & 0 \\ 0 & {\beta_{2} } \\ \end{array} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} { \begin{array}{*{20}c} {i_{2} } \\ {i_{4} } \\ \end{array} } \\ {\begin{array}{*{20}c} { v_{3} } \\ {v_{1} } \\ \end{array} } \\ \end{array} } \right]$$
(12)

where αj and βj are current and voltage frequency dependent non-ideal gains respectively and are equal to unity ideally. Furthermore,

$$\left\{ {\begin{array}{*{20}c} {\alpha_{j} = 1 - \varepsilon_{ij} } \\ {\beta_{j} = 1 - \varepsilon_{vj} } \\ \end{array} } \right.\quad j = 1,2\;{\text{and}}\;\left( {\left| {\varepsilon_{ij} } \right|,\left| {\varepsilon_{vj} } \right|} \right) \ll 1$$

in which ɛij and ɛvj are current and voltage tracking error coefficients with values close to zero. The non-ideal angular frequency ω0, quality factor Q and bandwidth for all types of filters are obtained as,

$$\omega_{0} = \sqrt {\frac{{G_{2} G_{3} }}{{\alpha_{1} \alpha_{2} \beta_{1} \beta_{2} C_{1} C_{2} }}}$$
(13)
$$Q = \frac{1}{{G_{1} }}\sqrt {\frac{{C_{1} G_{2} G_{3} }}{{\alpha_{1} \alpha_{2} \beta_{1} \beta_{2} C_{2} }}}$$
(14)
$${\text{BW}} = \frac{{\omega_{0} }}{Q} = \frac{{G_{1} }}{{C_{1} }}$$
(15)

Sensitivities of this filter, derived from (13) to (15), are:

$$S_{{G_{2} ,G_{3} }}^{{\omega_{0} }} = - S_{{\alpha_{1} ,\alpha_{2,} \beta_{1} ,\beta_{2} ,C_{1} ,C_{2} }}^{{\omega_{0} }} = \frac{1}{2}$$
(16)
$$S_{{G_{1} }}^{Q} = - 1,\quad S_{{G_{2} ,G_{3} ,C_{1} }}^{Q} = - S_{{\alpha_{1} ,\alpha_{2,} \beta_{1} ,\beta_{2} ,C_{2} }}^{Q} = \frac{1}{2}$$
(17)
$$S_{{G_{1} }}^{\text{BW}} = - S_{{C_{1} }}^{\text{BW}} = 1$$
(18)

The absolute values of all passive and active element sensitivities are low and not larger than unity.

5 Simulation results of the universal filter

The simulation results of different types of filters shown in Fig. 6 are shown in Figs. 9 and 10. An AC voltage source with amplitude of 1 V is chosen for all of the voltage sources. For the characteristic frequency \(f_{0} = \omega_{0} /2\pi \cong 6.36\;{\text{MHz}}\) and the quality factor of filters Q = 1, the passive component values have been chosen as \(C_{1} = C_{2} = 25\;{\text{pF}},R_{1} = R_{2} = R_{3} = 1\;{\text{k}}\Omega\). For CFOA and CCII, 0.13 µm CMOS technology parameters have been used. The transistor level circuits are shown in Figs. 7 and 8, parameters being given in Tables 3 and 4 respectively; supply voltages are selected as ± 0.75 V, VB = 0.24 V.

Fig. 7
figure 7

Transistor level circuit of CFOA [22]

Full size image
Fig. 8
figure 8

Transistor level circuit of CCII [22]

Full size image
Table 3 Transistor dimensions in CFOA
Full size table
Table 4 Transistor dimensions in CCII
Full size table

The transfer functions and simulation results of different types of filters are collected in Table 5 and Fig. 9, those of all-pass being in Fig. 10.

Table 5 Transfer functions of different filters
Full size table
Fig. 9
figure 9

Simulation results for high-pass, low-pass, band-pass and band-stop filters in Fig. 6

Full size image
Fig. 10
figure 10

Phase and gain of all-pass filter in Fig. 6

Full size image

6 Metamutator with single active device AD-IC

The first metamutator was built using two separate adder and subtractor ICs in [8]. In this section a single 4-port IC named additive and differential IC (AD-IC) built only with twelve transistors will be proposed. The block diagram and port description matrix of AD-IC are shown in Figs. 11 and 19 respectively.

Fig. 11
figure 11

Block diagram of AD-IC

Full size image

The 4-port metamutator can be constructed by properly interconnecting terminals of AD-IC as shown in Fig. 12. The port description matrix of this metamutator is the same as in (1) making it a VIM type metamutator, and the Table 4 in [8] illustrating several applications stands also true for this configuration.

$$\left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} {v_{x1} } \\ {v_{x2} } \\ \end{array} } \\ {\begin{array}{*{20}c} {i_{y1} } \\ {i_{y2} } \\ \end{array} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} 1 \\ 1 \\ {\begin{array}{*{20}c} 0 \\ 0 \\ \end{array} } \\ \end{array} } & {\begin{array}{*{20}c} {\begin{array}{*{20}c} { - \,1} \\ { 1} \\ {\begin{array}{*{20}c} { 0} \\ { 0} \\ \end{array} } \\ \end{array} } & {\begin{array}{*{20}c} {\begin{array}{*{20}c} 0 \\ 0 \\ {\begin{array}{*{20}c} 0 \\ 0 \\ \end{array} } \\ \end{array} } & {\begin{array}{*{20}c} 0 \\ 0 \\ {\begin{array}{*{20}c} 0 \\ 0 \\ \end{array} } \\ \end{array} } \\ \end{array} } \\ \end{array} } \\ \end{array} } \right] \cdot \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} {v_{y1} } \\ {v_{y2} } \\ \end{array} } \\ {\begin{array}{*{20}c} {i_{x1} } \\ {i_{x2} } \\ \end{array} } \\ \end{array} } \right]$$
(19)
Fig. 12
figure 12

Block diagram of metamutator with AD-IC

Full size image

In the realization of AD-IC, TSMC 0.25 µm CMOS process parameters were used, with transistor dimensions as shown in Table 6 and its circuit in Fig. 13. The developed CMOS layout of AD-IC is given in Fig. 16.

Table 6 Transistor dimensions in AD-IC
Full size table
Fig. 13
figure 13

Implementation of AD-IC with 12 MOS transistors

Full size image

7 Applications of metamutator with AD-IC

Many applications of metamutator were given in [8,9,10,11,12]. In this section three new applications: inductor simulator, capacitance multiplier and FDNR Simulator are being proposed using the metamutator built with AD-IC. The general structure of the configuration using the AD-IC metamutator with port impedances is shown in Fig. 14.

Fig. 14
figure 14

Metamutator terminated with port impedances

Full size image

By connecting impedances to three of the ports, the impedance seen from the remaining 4th port is depicted in Table 7. When reading column i of Table 7 it should be understood that no element is connected to port i whereas impedances Zj are connected to port j for j ≠ i and i = 1, 2, 3, 4.

Table 7 Equivalent impedance at the ports
Full size table

Figure 14 illustrates the case i = 1. An interesting conclusion that can be deduced from Table 7 is that the metamutator allows the realization of grounded elements as well as floating ones. The simulation results of all applications will be given in the next section.

7.1 Application as inductor simulator

As coil realization of inductors on an integrated chip is highly undesirable many inductor simulator circuits have been proposed in the literature [39, 40]. In this section an application of metamutator as inductance simulator with minimum number of elements, AD-IC with 12 transistors, two resistors and single capacitor, is presented. According to Table 7 by connecting one capacitor and two resistors to three of the ports properly, an inductor will be achieved at the fourth port and the value of the inductance is equal to the product of the values of capacitor and resistors. The different realizations are shown in Table 8.

Table 8 Different realizations of Inductor
Full size table

7.2 Application as capacitance multiplier

According to Table 7 by replacing one capacitor and two resistors (or three capacitors) in three of the ports, a capacitor will be achieved at the fourth port for which the value of the so obtained capacitance is the value of the capacitor multiplied by the ratio of resistance (capacitance) values. Possible realizations are shown in Table 9.

Table 9 Capacitance multiplier realizations
Full size table

7.3 Application as FDNR simulator

Low-pass filters have wide usage in radio frequency (RF) transceivers; in this process the much-used low-pass filter is called an anti-aliasing filter. By reducing the size and refining the performance of these filters, new improvements in communication are achieved. Figure 15 shows the position of the anti-aliasing filter in fully digital receivers.

Fig. 15
figure 15

Schematic of fully digital receiver [24]

Full size image

As in general anti-aliasing filters (AAF) are third or higher order passive LC ladder filters using an inductor in these circuits requires a lot of space and reduces the performance. In order to reduce the size and improve the performance one can use the complex impedance scaling technique for designing a prototype of the LC ladder circuits. This technique, treated extensively by Bruton [41], is based on the fact that the filter transfer function will remain unchanged if the impedance of each element is divided by s. So the Inductor will be transformed into a resistor, the resistor will be transformed into a capacitor and the capacitor will be transformed into a FDNR.

By connecting two capacitors and one resistor to three of the ports, as detailed in Table 7, a grounded or floating FDNR will be achieved at the fourth port. The value of the FDNR and different realizations are shown in Table 10. It should be observed again that only twelve transistors and three passive elements are being used with no component matching requirements.

Table 10 Different realizations of FDNR
Full size table

8 Simulation results

The layout of the AD-IC circuit is shown in Fig. 16. The area of the AD-IC is approximately 60 × 22 µm2. Post-layout simulations are performed using the netlist extracted from the layout with TSMC 0.25 µm process parameters. The supply voltage is taken as ± 1.25 V and VB as 0.8 V. For increasing the dynamic range of the AD-IC circuits all NMOS transistors’ substrates are connected to VSS terminal. The dimensions of the transistors used for the circuit are given in Table 6. The equivalent parasitic capacitances CL at the output ports are approximately 73 fF. For the purpose of providing a smaller output resistance the W/L ratios of the output node transistors M3, M4, M11 and M12 in Table 6 are chosen much bigger than the ratio of other transistors.

Fig. 16
figure 16

Layout of the AD-IC circuit

Full size image

8.1 Memristor realization

The port description matrix of metamutator with single active device AD-IC is the same as the port description matrix of metamutators with two active devices. In this case all applications obtained so far, can also be achieved by the AD-IC metamutator, as all the results are based on the port relationship given either by the expressions (1) or (2). For example, in case of terminating the ports 1, 2 and 3 by a capacitor, a nonlinear resistor and an inductor respectively, a grounded memristor will be achieved at the 4th port [8].

By applying a sinusoidal voltage source with amplitude of 2.5 V and frequency of 22 Hz at port 4 of the metamutator in Fig. 17, the current versus voltage and voltage versus current characteristics are obtained as shown in Fig. 18. For the nonlinear resistor the model introduced in [10] is being used. The supply voltages are chosen as ± 1.25 V and \(V_{\text{B}}\) as 0.5 V. The capacitor and inductor values were selected as 1 nF and 1 mH, respectively. The Lissajous curves show the signature of memristor at port 4.

Fig. 17
figure 17

Mutation of nonlinear resistor to memristor

Full size image
Fig. 18
figure 18

v − i Characteristics of memristor

Full size image

8.2 Capacitance multiplier realization

According to Table 9 and applying realization #3 to the metamutator with AD-IC and connecting \(C_{3}\), R1 and R4 to three of the ports of the metamutator, a capacitor with the value of KC3 will be obtained at the second port with K = R4/R1. Moreover, the functionality and frequency response plots of the multiplied capacitor and that of an ideal capacitor are given in Fig. 19 for case #3 with R1 = 1 kΩ, R4 = 20 kΩ and C4 = 5 pF, which yields the multiplied capacitance value of 100 pF.

Fig. 19
figure 19

|Impedance| and phase of the capacitor vs. frequency

Full size image

In this case the metamutator was simulated using an AC voltage source with amplitude 0.3 V; for AD-IC, TSMC, 0.25 µm CMOS process parameters were used with transistor dimensions as shown in Table 6 and the circuit in Fig. 13. The supply voltages were chosen as ± 1.25 V and \(V_{\text{B}}\) as 0.8 V.

8.3 Inductor simulator realization

According to Table 8 and applying realization #2 to the metamutator with AD-IC and replacing C4, R1 and R3 in three of the ports of the metamutator, an inductor will be obtained in the second port; Furthermore, the performance of the proposed inductance, the frequency response plots of the newly designed and ideal inductor are both given in Fig. 20 for R1 = R3 = 1 kΩ and C4 = 25 pF, which corresponds to an inductance of 25 µH.

Fig. 20
figure 20

Phase and |impedance| of the inductor vs. frequency

Full size image

In this case the metamutator was simulated using an AC current source with amplitude of 1 mA. For AD-IC TSMC, 0.25 µm CMOS process parameters were used with transistor dimensions as shown in Table 6 and its circuit in Fig. 13. Supply voltages are chosen as ± 1.25 V, \(V_{\text{B}}\) = 0.8 V.

8.4 FDNR simulator realization

Applying realization #4 to the metamutator with AD-IC as given in Table 10 and connecting C1, R2 and C3 to ports 1, 2 and 3 of the metamutator respectively, a FDNR will be observed from port 4. The simulation results are demonstrated in Fig. 21.

Fig. 21
figure 21

Characteristics of FDNR in frequency domain

Full size image

The metamutator with AD-IC was simulated using an AC voltage source with amplitude of 1 V. For AD-IC, TSMC 0.25 µm CMOS process parameters were used, with transistor dimensions as shown in Table 10 and its circuit in Fig. 13. The supply voltages are chosen as ± 1.25 V, \(V_{\text{B}}\) as 0.8 V. The values of C1, C3 and R2 were selected as 0.1 nF, 0.2 nF and 100 kΩ, respectively.

9 Conclusion

It has been shown that metamutators, recently introduced 4-ports in [8, 12], can be classified into two categories as: voltage inverting VIM and current inverting CIM (presented in this paper). CIM is also capable to implement a variety of elements/systems like VIM and it has been given three IC realizations using two different IC devices. One of these new realizations has been applied to the simulation of a memristor by properly terminating three of the ports and verifying the memristor’s signature.

Several new configurations, with properly terminated CIM ports, have been shown to be able to generate Universal Filters, a new application among many others presented in [8, 12]. All five filter types, band-, low-, high-, all-pass and band notch have been simulated with TSMC 0.13 µm parameters for one configuration and they have exhibited excellent frequency response.

Using AD-IC, introduced in this paper, as the only single active device and no passive elements, the metamutator has been given a new realization which was applied to capacitance scaling, memristor/inductor simulations and FDNR realization. Depending on the choice of the input port, these realizations can be made grounded or floating. All four applications have been simulated with TSMC 0.25 µm CMOS process parameters and shown to be in very good agreement with theoretical results.

Future work will concentrate on the comparison of VIM versus CIM, novel types of metamutators, their different realizations, tuning external elements to improve the behavior of these applications and further applications like linear oscillators, operational amplifiers etc. Filter building with FDNRs realized here and comparing the effect of using different kind of metamutators in the design of these filters will deserve special consideration. In another direction use of metamutators in nonlinear applications such as rectifiers, modulators will be looked upon.