Correction to: Analog Integrated Circuits and Signal Processing (2018) 97:15–25 https://doi.org/10.1007/s10470-018-1239-9

Voltage Inverting Metamutator (VIM) and Current Inverting Metamutator (CIM) recently introduced in [1] were defined, respectively, with polarities shown in Fig. 1 and relations (1) and (2). However, a careful examination reveals that there is no difference between VIM and CIM of Fig. 1b as changing the reference directions of vn and in in VIM gives CIM as shown in Figs. 1b and 2. So the 4-ports in Fig. 1a, b are the same.

Fig. 1
figure 1

a Block diagram of VIM, b wrong block diagram of CIM in [1]

Fig. 2
figure 2

Correct block diagram of CIM

The CIM as given by Fig. 2, with the same reference directions as those of VIM, and defining relation (2) is an entirely different 4-port. In fact, their circuit level realizations are respectively given in Fig. 3a, b.

Fig. 3
figure 3

Circuit level realization of a VIM, b CIM

$$\left[ {\begin{array}{*{20}c} {i_{k} } \\ {i_{l} } \\ {v_{m} } \\ {v_{n} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } & {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } \\ {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } & {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} { \begin{array}{*{20}c} {i_{m} } \\ {i_{n} } \\ \end{array} } \\ {\begin{array}{*{20}c} { v_{l} } \\ { - v_{k} } \\ \end{array} } \\ \end{array} } \right]$$
(1)
$$\left[ {\begin{array}{*{20}c} {i_{k} } \\ {i_{l} } \\ {v_{m} } \\ {v_{n} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } & {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } \\ {\begin{array}{*{20}c} 0 & 0 \\ 0 & 0 \\ \end{array} } & {\begin{array}{*{20}c} 1 & 0 \\ 0 & 1 \\ \end{array} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {\begin{array}{*{20}c} { i_{m} } \\ { - i_{n} } \\ \end{array} } \\ { \begin{array}{*{20}c} { v_{l} } \\ {v_{k} } \\ \end{array} } \\ \end{array} } \right]$$
(2)

Everything else in [1], including realizations of CIM with IC blocks, remains unaltered.