1 Introduction

Recently fabrication of patterns with high-accuracy etching profiles and different aspect ratios on silicon wafers has drawn extensive attention in a number of applications, such as MEMS (Mouro et al. 2013; Miwa et al. 2013), biomedical (Miles et al. 2013), solar cells (He et al. 2012; Jeong et al. 2012), silicon-on-insulator (SOI) rib waveguides (Qiu et al. 2014; Gao et al. 2005), polymer optical waveguides (Yoon et al. 2004; Choi et al. 2003; Choi 2004), polymer-based waveguide devices (Jang et al. 2012), etc. The Bosch process, which consists of alternating etching and passivation steps, has an irreplaceable role in dry etching of high aspect ratio (HAR) vertical structures on silicon. However, the continuous etching process may be an alternative approach, especially more suitable for dry etching of low aspect ratio (LAR) vertical structures with smooth sidewalls. It is known that the ridge and the trench are basic structures for these application fields, whereas ideal shallow silicon microstructures with ridge and trench profiles are always expected in photonic applications. Excellent sidewall quality is essential to guarantee device performance, particularly, the optical scattering loss, and thus process optimization and characterization for sidewall quality are of great importance.

Works for optimizing the sidewall quality of shallow silicon microstructures have been reported by several research groups. A continuous silicon etching process with parameter ramping in inductively coupled plasma reactive ion etching (ICPRIE) system was used by Solehmainen et al. (2005) to obtain smoother SOI rib waveguide sidewall profiles than that done by the conventional Bosch process adopted by Wang et al. (2005). A root mean square (RMS) sidewall roughness of 10.2 nm in 2 × 2 μm2 scanning area was reported by Gao et al. (2006) using a continuous etching process with constant parameters. In order to improve sidewall smoothness, Gao et al. (2014) further proposed a modified three-step Bosch process, which nearly eliminated the mouse-bite sidewall morphology and reduced the RMS sidewall roughness down to 8.02 nm in 4 × 8 μm2 area.

In this paper, we investigated the optimization of a simple single-step continuous etching process for efficient fabrication of shallow silicon microstructures, i.e. with etching depth less than ~10 μm, on target for improved RMS sidewall roughness and excellent sidewall verticality. With help of an easy measurement technique developed for characterizing the sidewall roughness of shallow microstructures, i.e. with depth <10 μm, the investigation of an orthogonal array experiment based on continuous etching process was conducted to optimize etching profiles. Owing to the difference of exposed silicon areas under mask patterns for making the ridge and trench structures, corresponding differences exist in their etching rates and the sidewall qualities. With analysis of variance (ANOVA) and comparison of their results, the effects of control factors on their etching profiles were understood. As a proof for optimal experiment, shallow silicon microstructures with excellent vertical and smooth sidewalls were successfully fabricated.

2 Experiment

The continuous silicon etching process based on ICPRIE system was chosen to optimize etching profiles, which is a process that the etching gas SF6/O2 and the passivation gas C4F8 are spontaneously provided to participate in anisotropic etching in the low vacuum chamber. Therefore, the sidewall profile is mainly determined by chemical equilibrium reaction between the etching and passivation process. When the rate of isotropic etching by SF6 is slightly greater than that of passivation by C4F8, an undercut profile in the bottom of a structure will tend to appear. Particularly, as the rate of isotropic etching by SF6 is predominant, this undercut profile will be evolved into overcut at the top of structure. Here in order to quantitatively characterize roughness of sidewall profile, a simple measurement technique was firstly proposed as following.

The roughness of a vertical sidewall with large depth, e.g. greater than 10 μm, can be easily measured by directly scanning the sidewall using a conventional scanning tip in atomic force microscope (AFM) on a sidecut sample. However, this can hardly be done for a shallow sidewall because it is difficult to position a conventional AFM tip on the tiny area. Therefore, a special bevel-cut technique was developed to allow the measurement done by a conventional AFM tip (Vecco D3100). The 250 μm-width line features, i.e. ridge and groove, were fabricated on 2 × 2 cm2 silicon substrates, and the substrates were beveled along plane A as illustrated in Fig. 1a, b using a dicing saw (Disco DAD340). After the location of tip landing was confirmed by observation under optical microscope as displayed in Fig. 1c, d, the AFM tip could be slowly moved into sidewall region. The preferred region was in the vicinity of the intersection between the sidewall and plane A. Here considering the intersection angle ψ ~ 1.43° and 5 μm dynamic range of the AFM tip, a scanning range of approximately 200 μm could be provided to avoid remnants from obstructing the scanning tip.

Fig. 1
figure 1

The schematics of sample preparation with bevel cut for a the ridge structure and b the trench structure; the optical microscopic images at c top view and d cross-sectional view for the ridge structure

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Shallow silicon profile etching is influenced by many factors including the inductively-coupled plasma (ICP) source power, the DC bias power, the etching gas (SF6) flow rate, the passivation gas (C4F8) flow rate, the pressure, the bottom electrode platen temperature, and the oxygen (O2) flow rate, etc. Based on precursory work, the ICP source power, the temperature of the bottom electrode platen, and the SF6 flow rate were set as 600 W, 0 °C, and 130 sccm [sccm denotes cubic centimeter per minute at STP (standard temperature and pressure)], respectively, and the other parameters were taken as control factors to optimize the continuous etching process for smooth and vertical sidewall profiles. Therefore, considering the excessive variable and experiment cost, an efficient orthogonal array experiment included 9 recipes with 4-factor and 3-level was designed, which was denoted as L9 (34). The arrangements of factor levels are shown in Tables 1 and 2.

Table 1 Level design for the factors
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Table 2 Orthogonal array (L9) and signal-to-noise ratios of experiments
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The quality characteristics of etching profiles were evaluated by the average etching rate V (μm/min), the sidewall verticality θ (°) and the average sidewall roughness R (nm). V was derived by measuring an etching profile of a 5 μm-width pattern on the SEM image. The distance of adjacent patterns was 1 mm. θ was defined as the angle between the sidewall and the etched bottom, which was also acquired from the SEM image. R was obtained by scanning a 2 × 2 μm2 area near the bottom of the etched sidewalls using the above mentioned measurement technique. A third-order fit function was adopted to calibrate the base plane for calculation of the roughness.

For etching of ridge microstructures, the positive AZ5214 resist was chosen as the mask material. Firstly, the 2-in. silicon wafers were spin-coated with a 1.4 μm-thick resist layer, soft baked for 90 s on a hot plate at 95 °C, exposed for 6.8 s on a standard mask aligner (Karl Suss MA6), and then developed for 45 s in an immersion process using developer (3038). After that, the patterns for ridge microstructures were successfully transferred onto the resist.

For etching of trench microstructures, the negative AZ5214 resist was taken as the etching mask. Prior to the pattern formation, the identical resist pretreatment processes were adopted to fabricate resist films on wafers. Then a pre-exposure process was taken for 3.5 s on the mask aligner with an energy intensity of 9.3 mJ/cm2, followed by a baking process for 90 s on a hot plate at 110 °C. The inversion of resist patterns was performed by blank exposure for 40 s under the Flood-E mode. The trench patterns were obtained after development for 45 s.

The two types of samples were adhered on 6-inch wafers using vacuum grease to ensure good heat conduction between samples and the bottom electrode platen for dry etching in ICPRIE system (STS Multiplex ASE-HRM).

3 Results and discussion

The statistical results from the orthogonal experiment shown in Fig. 2a, b indicated that the etching rates of trench structures were greater than those of ridge structures under the same process conditions, which is attributed to the loading effect due to the differences of exposed silicon areas and the average lifetime of active species (Mogab 1977; Tian et al. 2000). The experiment showed more significant loading effect under high pressure condition, which is in good consistence with Hedlund et al. (1994). For etching the ridge structures with large loading areas, increasing pressure led to depletion of active species, thus limiting the increase of etching rate. Therefore, the pressure was a contributing factor more influential on the etching rate of trench structures than that of ridge structures, whereas the situation of the C4F8 flow rate was just opposite as shown in Fig. 2c.

Fig. 2
figure 2

a The distributions of etching rate for different etching recipes, b the effects of factors levels on average etching rate, and c the contribution ratios of factors to etching rate

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The effects of factor levels on average sidewall verticality and the contribution ratio are shown in Fig. 3, indicating that the most influential factor was the C4F8 flow rate, which protected sidewalls from lateral etching by F-radicals. Figure 4 illustrated overcut and undercut profiles for low and high flow rates of C4F8, respectively, when the SF6 flow rate was fixed at 130 sccm. For a high flow rate ratio of SF6/C4F8, excess etching led to the overcut profile due to the nature of isotropic chemical reaction (Li et al. 2008). For a low flow rate ratio of SF6/C4F8, a passivation layer formed on the sidewall prevented the sidewall from lateral etching, which resulted in the formation of slight undercut profile. The etching anisotropy increased with increasing C4F8 flow rate (Shul and Pearton 2000). The influence of the C4F8 flow rate was greater on the sidewall verticality of the trench structure than that of the ridge structure due to the loading effect, but the angular difference between these two types of structures was less than 1° for cases in absence of excess etching.

Fig. 3
figure 3

a The effects of factor levels on average sidewall verticality, and b the contribution ratios of factors to sidewall verticality

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Fig. 4
figure 4

The SEM images of a a ridge structure with overcut profile from test no. 4 (SF6/C4F8 = 2.2), b a trench structure with overcut profile from test no. 4 (SF6/C4F8 = 2.2), c a ridge structure with undercut profile from test no. 8 (SF6/C4F8 = 1.4), and d a trench structure with undercut profile from test no. 9 (SF6/C4F8 = 1.1)

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As illustrated in Fig. 5b, the C4F8 flow rate was the most significant factor for the sidewall roughness of both types of structures. The sidewall roughness decreased with increasing C4F8 flow rate as shown in Fig. 5a, because a high ratio of SF6/C4F8 led to nonuniform passivation layer containing large-size cavities due to incomplete deposition of passivation layer in sidewall areas (Richter et al. 2001). A low ratio of SF6/C4F8 benefited complete deposition of passivation layer and smooth sidewall morphology. Since the local distribution of passivation layer was relatively flatter in the large opening of ridge structures than that in the small opening of trench structures, the sidewall roughness of ridge structures was smaller as well. As shown in Fig. 5a, such loading effect became more significant as the pressure was raised from 10 to 20 mTorr, when active species was getting depleted. Meanwhile, the addition of oxygen plasma from 13 to 26 sccm increased the density of passivation gas for the ridge structures due to the prominent effect of oxide deposition layer.

Fig. 5
figure 5

a The effects of factor levels on average sidewall roughness, and b the contribution ratios of factors to sidewall roughness

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The relatively strong sensitivity of the sidewall roughness of ridge structures to the pressure was also shown in Fig. 5b. However in contrast, the sidewall roughness of trench structures was relatively sensitive to the bias power. The sidewall morphology was more readily affected by ion sputtering in structures with small opening. In the trench etching with small opening, the intensive ion bombardment was induced by large bias power as the bias power increased from 40 to 60 W, and it was observed that the over-bombardment deteriorated the sidewall morphology.

In order to verify the results of the orthogonal array experiment, the shallow silicon microstructures were fabricated by optimized process settings. Considering the trade-off between the sidewall quality and the etching rate, the bias power 20 W and the pressure 30 mTorr were preferentially chosen as optimal parameters. At the C4F8 flow rate, 130 sccm, the ridge structure was etched down for 4.18 μm with an etching rate of 0.52 μm/min, a sidewall verticality of 90.6° and a RMS sidewall roughness of 3.61 nm obtained in 2 × 2 μm2 measurement area. At flow rates of C4F8, 140 sccm and O2, 13 sccm, the trench structure was etched down for 4.8 μm with an etching rate of 0.6 μm/min, a sidewall verticality of 89.4° and a RMS sidewall roughness of 4.7 nm. The SEM and AFM images of these samples were shown in Fig. 6.

Fig. 6
figure 6

The SEM images at cross-sectional view and the AFM images of sidewall morphology for the optimized ridge (a, b) and trench (c, d)

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4 Conclusion

The orthogonal array experiment was conducted to optimize the single-step continuous dry-etching process of shallow silicon microstructures for the etching rate, the sidewall verticality and the sidewall roughness. The bevel-cut sample technique was developed to enable sidewall roughness measurement by direct scanning using conventional AFM tips. The etching rate was faster for the trench than the ridge due to the loading effect which became more significant under higher pressure. Likewise, the sidewall roughness was larger for the trench than that for the ridge under the same process parameter settings. The sidewall verticality difference between them was less than 1° for the recipes without excess etching. The C4F8 flow rate was the most prominent control factor for all three quality factors. The pressure was more influential for trench etching than ridge etching on the etching rate but opposite on the sidewall roughness. The bias power was more influential for trench etching than ridge etching on the sidewall roughness. After optimization being done, the RMS sidewall roughnesses of 3.61 and 4.7 nm and the sidewall verticalities of 90.6° and 89.4° were obtained for the ridge and trench structures with depth greater than 4 μm, respectively. The optimized continuous etching process has great advantage for fabrication of fine silicon patterns with shallow profiles.