Keywords

1 Introduction

The liquid crystal display (LCD) has major advantages over its competitors. It is thinner, smaller and lighter than other displays and also has low power consumption, low-radiation, high-contrast and high-dpi. Hence, the LCD panel is widely applied in daily electronic products, and the demand for the LCD panel increases. LCD production process consists of the following three main processes: TFT Array process, Cell assembly process, and Module assembly process, and each process consists of some sub-processes (Chen et al. 2006). The most critical modules that include mask process numbers and LCD resolution quality are photolithography technology. Significantly reduction in manufacturing costs result if there are fewer a mask process number during photolithography process. In addition, the higher resolution of the photolithography process will improve the LCD quality. This study focuses on the LCD array process which requires 4–8 mask process numbers and each mask process needs handling after photolithography process. It hopes to find a suitable model for the LCD photolithography process improvement by actual machining experiments of one domestic optoelectronic manufacturer.

In recent years, Six Sigma DMAIC (Define-Measure-Analyze-Improve-Control) approach has been widely used in many research areas (Breyfogle et al. 2001). Through Six Sigma approach, Analysis of variance (ANOVA), and Taguchi method (TM), the study aims to construct a suitable LCD photolithography process improvement mode for the optoelectronics industry. Therefore, the study has the following objectives: (1) Six Sigma DMAIC approach is used to establish a project process, and combined with Taguchi method and ANOVA analysis to design a new process analysis and prediction mode. (2) Taguchi method is used to identify the various design parameters and key factors of the photolithography process to find out the optimal process conditions and to verify the results of the experiments.

2 Literature Review

2.1 Six Sigma

Dr. Mike J. Harry developed Six Sigma for management practices in 1980s. Six Sigma’s most common and well-known methodology is its problem-solving DMAIC approach. The 5-step DMAIC method is often called the process improvement methodology. Traditionally, this approach is to be applied to a problem with an existing, steady-state process or product and service offering. DMAIC resolves issues of defects or failures, deviation from a target, excess cost or time, and deterioration (Pete and Larry 2002). DMAIC identifies key requirements, deliverables, tasks, and standard tools for a project team to utilize when tackling a problem. The DMAIC process and key steps are shown as in Fig. 1.

Fig. 1
figure 1

DMAIC process and key steps

2.2 Taguchi Method

Taguchi technique provides a simple, efficient, and systematic approach to optimize design for performance, quality, and cost. Taguchi quality control is divided into three stages, system design, parameter design, and tolerance design (Su 2008). This methodology is valuable when design parameters are qualitative and discrete. Taguchi parameter design can optimize the performance characteristics through the setting of design parameters and reduce the sensitivity of the system performance to the source of variation (Chen and Chuang 2008).

This study focuses on the photolithography process of LCD Array and adopts nominal-the-best, NTB characteristic. The closer to the original mask design value, the better the quality characteristics after developing pattern pitch. It means that the quality characteristics measured value close to the target is better. The Signal-to-Noise ratio, S/N for each design parameter level is computed based on S/N analysis. The nominal S/N ratio corresponds to a better performance characteristic. Hence, the optimal design parameter level is the level with the nominal S/N ratio. The nominal S/N ratio can be written as given in Eq. (1). The confidence interval, CI then can be calculated as Eqs. (2) and (3) (Su 2008).

$$ \eta = - 10\log_{10} \left( {\frac{{u^{2} }}{{\sigma^{2} }}} \right) = - 10\log_{10} \left( {MSD} \right) = - 10\log_{10} \left[ {\left( {u - m} \right)^{2}\,+\,\sigma^{2} } \right] $$
(1)
$$ CI_{1} = \sqrt {F_{\alpha ;1,\,2} \times V_{e} \times \left[ {\frac{1}{{n_{eff} }}} \right]} $$
(2)
$$ CI_{2} = \sqrt {F_{\alpha ;1,2} \times V_{e} \times \left[ {\frac{1}{{n_{eff} }} + \frac{1}{r}} \right]} $$
(3)

where, represents S/N ratio; MSD stands for Mean Square Deviation. F α represents critical values of the F-distribution for the significance level α; V e represents the pooled error variance.

3 Methodology

3.1 Define

A TFT-LCD array process consists of three main modules—Thin Film, Photolithography, and Etching (Chen et al. 2006). Photolithography process includes some sub-processes such as dehydration bake, HMDS, photoresist coating, soft/pre-bake, exposure, development, and post-exposure (as in Fig. 2). The high complexity and precision processing, means that every sub-process directly influences the success or failure to the entire photolithography process. LCD manufacturing is a glass substrate which must go through photolithography process 4–8 times to achieve complete circuit. Therefore photolithography process plays an important role of the entire LCD manufacturing process.

Fig. 2
figure 2

Photolithography process

Patterns after developing the photolithography process can be classified into normal developing, incomplete developing, under-development and over-development etc. This study focuses on the pattern pitch after developing of the photolithography process to meet the design target value 60 ± 5 (nm). The closer to the original mask design value, the better it is. Developing from the pattern pitch the left is incomplete developing, and the right is developing normally, as shown in Fig. 3.

Fig. 3
figure 3

Actual pattern pitch from developing

3.2 Measurement

Process capability indices (PCIs) are practical and powerful tools for measuring process performance. Process capability indices have been widely used in the manufacturing industry to provide numerical measures on whether a process is capable of reproducing items meeting the manufacturing quality requirement preset in the factory. Numerous capability indices have been proposed to measure process potential and performance. The two most commonly used indices C p and C pk discussed in Kane (1974), and the two more-advanced indices C pm and C pmk are developed by Chan et al. (1990), and Pearn et al. (1992). C pk measures how close one is to one’s target and how consistent one is to one’s average performance (Wright 1995). The larger the index, the less likely it is that any item will be outside the specifications. Of this study before improvement the C pk 0.85 < 1.33 presents the process is substandard, unstable and insufficient process. Process improvements must be given high priority and documented in a corrective action plan. The measurement data of the pattern pitch by 30 randomly selected developing products are shown in Table 1.

Table 1 Measure data of pattern pitch (nm)

3.3 Analyze

Three senior engineers with an average engineering experience of more than six years in the photolithography process, participated in this project. These experts identified control factors and fixed factors. The control factor chosen for this study had 4 control factors, including developing time, exposure energy, photoresist developers, and temperature. Table 2 presents the chosen control factors and the developer ingredients are Tetra Methyl Ammonium Hydride (TMAH).

Table 2 Control factors and fixed factors

3.4 Improve

Design of experiments (DOE) is a discipline that has very broad application across all the natural and social sciences and engineering. An excellent solution to this project is an approach known as Taguchi Parameter Design. As a type of fractional factorial design, Taguchi Parameter Design is similar to traditional DOE methods in that multiple input parameters can be considered for a given response. There are, however, some key differences, for which Taguchi Parameter Design lends itself well to optimizing a production process (Muthukrishnan et al. 2012). Taguchi Parameter Design methodology includes selection of parameters, utilizing an orthogonal array (OA), conducting experimental runs, data analysis, determining the optimum combination, and verification. In this experiment, the pattern pitch 60 ± 5 (nm) after the developing be used to obtain a set of best combination of experimental parameters. The use of orthogonal array can effectively reduce the number of experiment necessary. The experiment layout using a Taguchi’s \( L{_{9}^{\prime}} \)OA, as shown in Table 3, was used to design the Taguchi experiment in this study.

Table 3 Experimental layout using \( L_{9}^{\prime } \left( { 3^{ 4} } \right)\;{\text{OA}} \)

The greater the S/N ratio, the better quality has. The largest S/N ratio can get the best parameter level combinations. The experimental data shows that the S/N ratios for optimal factors combination are A2B3C2D2. Figure 4 presents main effects plot for S/N ratios.

Fig. 4
figure 4

Response graph for SN ratios

Perform ANOVA to identify significant parameters. ANOVA establishes the relative significance of parameters. Factors A, C, and D are significant in this experiment. The percentage of the experimental error of 2.42 %, less than 15 % can be identified in this experiment did not ignore some important factors. The F value of experimental factors A, C, D is greater than 4, which means that the factors’ effect is considerable. The calculated optimal expectation S/N ratios and CI 1 are 88.39 and 16.82. According to S/N ratios and CI 1, the range of the optimal conditions is [88.39 ± 16.82] = [71.57, 105.21]. This experiment performed three trials. Table 4 presents the results of the confirmation experiment.

Table 4 Results of confirmation experiment

Further, CI 2 is 20.103, the S/N ratio confidence interval of confirmation experiment is [88.39 ± 20.103] = [68.287, 105.50]. Through the confirmation experiment, S/N ratios fall within the 95 % confidence interval which indicates the success of the experimental results. Using the patterns pitch after developing and optimal factors combination of the experiment perform 30 times, process capability indices C pk is improved from 0.85 to 1.56 in experimentation (as in Fig. 5). This study clearly shows that through optimal factors combination A2B3C2D2, including the developing time of 70 s, the exposure energy of 500 mj, the photoresist thickness of 27,000 Å, and temperature of 115 °C, machining process is greatly improved for photolithography process.

Fig. 5
figure 5

Process capability after improvement

3.5 Control

After confirmation experiments and process capability analysis, this study thus can verify conclusions and has two-point suggestions for control. (1) Changing the factors combination, the control factors of the developing time from 50 to 70 s, exposure energy from 300 to 500 mj, the photoresist thickness from 26,000 to 27,000 Å, and maintaining the temperature at 115 °C. (2) Keeping observation the photolithography process records and monitoring the process capability analysis, the products quality and process stability will be improved.

4 Conclusions

This study uses Six Sigma DMAIC steps, technical data of one domestic optoelectronics manufacturer, to do investigate the potential improvement of photolithography process. Combined with Taguchi DOE and ANOVA analysis, the chosen key factors are use to identify the pattern pitch 60 ± 5 (nm) process optimization. Taguchi method was applied to this experiment to get the optimal processing factors including the developing time of 70 s, the exposure energy of 500 mj, the photoresist thickness of 27,000 Å, the temperature of 115 °C, and its process capability analysis results show that C pk is upgraded from 0.85 to 1.56 in experimentation. It will obviously improve the products quality of precision and process capability. In addition to increasing the competitiveness of products, the experiment results of photolithography process can also provide technical references for the domestic optoelectronic manufacturers and related industries.