Keywords

1 Introduction

The micro-inverters that are designed for the solar photovoltaic (PV) are single-stage, two-stage, and multi-stage. The multi-stage small-scale inverters are typically including a step-up DC-DC converter with an optimal power point tracking (OPPT) control [1]. The two-stage smaller scale inverter can be outlined falling an OPPT-controlled stride with a network-tied high-frequency inverter and a DC-DC converter, while the single-stage needs to play out voltage step-up, OPPT, and DC-AC reversal works across the board stage. To change over and to connect the solar power to the utility grid, the low voltage of the solar PV board must be stepped up to coordinate the utility level. It represents a test to the architect of solar PV inverters as a customary lift converter cannot give the required pick up at high efficiency [2, 3]. The common problem of the single-stage DC-AC power framework is the AC-DC power decoupling issue [4].

Correct and suitable types of power converters are required for solar PV systems to meet various needs, and applications have a significant influence to obtain the optimum performance [5] as they act as an interface between the utility/main grids and/or residential loads and solar PV systems. Various modeling methods for grid-connected step-up PV systems intended to include different tools for the control design are presented in reference [6]. A detailed review of the various single-stage inverter (SSI) approaches in solar PV systems is presented in [7]. In reference [8], a Zeta converter with a coupled inductor is utilized for efficient recycling of leakage inductor energy. As the PV array (PVA) depicts as the floating source, there is an enhancement in the overall safety of the system. It also discusses operating principles, steady-state analysis, and stress on active components of the converter are also presented. The important characteristics of DC/DC converters as well as various MPPT approaches are analyzed and reviewed in [9].

Reference [10] describes the design and detailed operation of a Cuk-derived, common-ground PV micro-inverter. The present state-of-the-art approaches available for micro-inverters with a comprehensive overview of various technical characteristics such as grid compatibility abilities, control structures, power circuit configuration, energy harvesting capabilities, decoupling capacitor placement, and various mechanisms required for safety are presented in [11]. The classification of the PV system, various inverter types, the global status of the PV market, configurations of grid-connected PV inverters, and topologies are reviewed in [12].

The decoupling of AC–DC power is accomplished on a high-voltage dc link and hence it needs generally low capacitance esteem. The one-cycle control (OCC) has a quick reaction and low affectability to dc-transport voltage swell permitted applying yet littler decoupling capacitor esteem, what's more, has shown low THD output for various sorts of profoundly nonlinear burdens.

2 Proposed Modules and Functionalities

Several single-stage topologies which can understand voltage step-up and reversal in a single-stage are presented in the literature. In a double lift inverter load is associated with yields of two bidirectional lift converters. Figure 1 depicts the DC-AC boost converter. Subsequently, this topology takes a typical H-bridge with boosting inductors associated with the midpoints of legs [13, 14]. The negative marks of this topology are the constrained DC step-up increase, flowing currents, which disable the efficiency; and to some degree entangled control.

Fig. 1
A circuit diagram of Boost D C A C converter depicts the H-bridges characterized by the addition of leg midpoint inductors for power enhancement.

Boost DC-AC converter

Figure 2 depicts another single-stage arrangement of the DC-AC converter. Contrasted with the topologies utilization of single lift inductor, no coursing currents and have a high voltage DC-link [15]. Likewise, customary control strategies can be connected. Also, the proposed topologies may give different decisions to single-stage arrangements.

Fig. 2
A circuit diagram of the single stage D C A C converter depicts the high voltage D C link and coursing currents, the design has one lift inductor.

Single-stage DC-AC converter

In any case, the restricted dc step-up requires utilizing more costly high-voltage PV boards with 70–100 \(V_{{{\text{dc}}}}\) yield keeping in mind the end goal to get coveted DC-transport voltage good to network-associated inverters [16, 17]. On the other hand, utilizing the famous crystalline silicon modules with the 25–50 \(V_{{{\text{dc}}}}\) maximum power point (MPP) extend. In the field operating conditions, substantial electrolytic capacitors have a short life and impede the framework’s unwavering quality. Hence, the decoupling issue ends up one of the significant worries in the miniaturized scale inverter outline. An enhanced topology using the spillage vitality reusing showed 86% pinnacle efficiency [18, 19]. Some other fly back-based topology likewise makes utilization of an extra power decoupling circuit.

Another nonlinear control system, one-cycle control is presented for steady-state frequency operation. However, the SSBI can be able to control by any existing control techniques. Figure 3 depicts the high-gain SSBI. Contrasted with the topologies utilization of a single lift inductor, have a high voltage DC-link [20], no coursing currents, and a small decoupling capacitor. Likewise, customary control strategies can be connected. Also, the proposed topologies give different decisions in single-stage arrangements [21, 22]. The schematic view of the Zeta converter is depicted in Fig. 4.

Fig. 3
A circuit diagram of the high gain S S B I depicts the single lift inductor, high voltage D C link, no coursing currents, and decoupling capacitor.

High-gain SSBI

Fig. 4
A circuit diagram of the Zeta converter depicts the D C output voltage is higher than the input voltage. S S B I exploits discontinuous conduction.

Zeta converter

To achieve a higher conversion ratio of voltage, with higher efficiency, higher gain enhancement techniques were implemented previously [23]. A boost converter is a power converter. Here in this converter, its DC voltage at the output is more prominent than its DC voltage at its input. The SSBI topology works in discontinuous conduction mode (DCM) all through the lattice cycle if it supports the operation of DCM through peak interim [24]. By applying the condition for the DCM or critical conduction mode (CCM) through peak interim yields the critical estimation of the adjustment file as beneath

$$ M = \frac{1}{{\left( {1 + \frac{{V_{{{\text{in}}}} }}{{V_{{\text{p}}} }}} \right)}} $$
(1)

where M is the modulation index, \(V_{{{\text{in}}}}\) is the input voltage, and \(V_{{\text{p}}}\) is the peak value of output voltage.

3 Implementation of High Gain SSBI for PV Array in Simulink

As mentioned earlier, the Zeta converter interfacing in an SSBI for PVA has been implemented in MATLAB Simulink software. MATLAB gives one of the successful modeling instruments and reenactment apparatus called Simulink. In engineering, it needs to represent the information graphically. MATLAB Simulink can be used for several applications such as image processing, signal processing, power electronics, basic electrical and electronics measurements, and instrumentation. Simulink is a piece graph condition for multi-space amusement and model-based outline. It underpins the recreation customized code age and steady tests and checks [25, 26]. Here viably gives a graphical depiction, can changes square libraries, and can agree to demonstrating and recreating dynamic structures. Along these lines, it is joined with MATLAB figuring into models and sends reenactment results to MATLAB for assist investigation.

This section presents the software design of the proposed models. Figure 5 depicts a simulation model of a high gain single-stage boosting inverter (implemented in Simulink model of MATLAB software) which is controlled by one cycle controller. It operates at an input voltage of 48 V, switching at 50 kHz frequency, and the output voltage at 436 V.

Fig. 5
A circuit diagram depicts the inverter that boosts voltage in a single stage and has a high gain. The single cycle controller controls it.

Implementation of high gain SSBI in Simulink

The PV array (PVA) comprises 8 PV cells, and all of them are associated in series to get a coveted voltage yield. Contingent upon required load control, the total number of parallel branches is expanded to at least 2. The impacts of solar irradiation and temperature levels are spoken to by two variables picked up. These are changed by dragging the slider pick-up modifications of these blocks named variable solar insolation and temperature. The design of the Zeta converter in the simulation approach and which is implemented in MATLAB is depicted in Fig. 6.

Fig. 6
A circuit diagram of the Zeta converter array simulation model depicts the slider choosing varied sun insolation and temperature blocks.

Design of Zeta converter simulation model for PV Array

Figure 7 depicts the simulation model of the design and integration of Zeta converter in high gain SSBI. Here, the PVA, ZETA converter, and high gain SSBI are cascaded respectively. The output of the PVA is given as input to the Zeta converter and in the same way, the output of a Zeta converter is given as an input to the high gain SSBI, and the output is fed to the load. The Simulink model of PVA is connected to a Zeta converter. The Simulink model of PVA fed Zeta converter is integrated into high gain SSBI in the Simulink model. This Simulink model is a discrete-time system, and simulation is switched at a frequency of 50 kHz.

Fig. 7
A circuit diagram of the Zeta converter interference in P V array simulation depicts the P V A output used as inputs for Zeta converter and S S B I.

Simulation model of Zeta converter interference in high gain SSBI for PV Array

4 Results and Discussion

This section presents the output results of the proposed models. In this work, PSIM simulation is utilized to confirm the DCMvoltage conversion proportion. Simulation parameters are as per the following: input voltage (\(V_{\rm g}\)) = 48 V, \(L_{m}\) = 150μH, \({\text{T}}_{s}\) = 20 μs, boost duty cycle (Ðbst) = 0.64, n = 3, and \(R_{{{\text{eq}}}}\) = 4000 Ω. Connecting these variables leads to \(M_{{{\text{cal}}}}\) = 10.96, though mimicked result \(M_{{{\text{sim}}}}\) = 10.58 emphatically supporting the hypothetical desire. CCM–DCM boundary condition is checked by simulation utilizing the accompanying parameters: \(V_{\rm g}\) = 48 V, \(L_{m}\) = 150 μH, \(T_{s}\) = 20 μs, Ðbst = 0.64, and n is 3. The detonated perspective of input current \(I_{\rm g}\) shows that SSBI is in reality at CCM–DCM boundary. The reproduced power output obtained as \(P_{{{\text{ob}}}}\) = 68 W and coordinated the hypothetically expected estimation of \(P_{{{\text{ob}}}}\) = 68.36 W. Figure 8 presents the output waveforms of the input current (\(i_{\rm g} )\) and inductor current (\(i_{{{\text{LO}}}}\)) of SSBI. The decoupling capacitance \(\left( {C_{{{\text{dc}}}} } \right)\) of DC-link capacitor between the inputs and output has been depicted in Fig. 9.

Fig. 8
Two graphs depict current in Amperes against time in seconds. The data plotted on the first graph oscillates while the second fluctuates.

Simulation waveforms of input current (\({\varvec{i}}_{{\varvec{g}}}\)) and inductor current (\({\varvec{i}}_{{{\mathbf{LO}}}}\))

Fig. 9
A graph of Capacitance in microfarads against time in seconds. The data on the graph depicts an oscillating trend.

Simulation waveform of decoupling capacitance \(\left( {{\mathbf{C}}_{{{\text{dc}}}} } \right)\)

The value of \(C_{{{\text{dc}}}}\) depends on \(P_{{{\text{dc}}}}\) and f at line conditions, \(V_{{{\text{dc}}}}\) and allowed peak-to-peak swell \(\left( {\Delta V} \right)\). The \(C_{{{\text{dc}}}}\) value can be calculated by

$$ C_{{{\text{dc}}}} = \frac{{P_{{{\text{dc}}}} }}{{2\pi \smallint V_{{{\text{dc}}}} \Delta V}} = \frac{160}{{2\pi \times 35 \times 6}} = 2.4\, \upmu {\text{F}} $$
(2)

Figure 10 depicts the waveforms of the diode current (\({\varvec{I}}_{{\mathbf{D}}}\)), input current (\({\varvec{i}}_{{\varvec{g}}} )\), , inductor peak current (\({\varvec{I}}_{{{\mathbf{pk}}}}\)), and input voltage \(\left( {{\varvec{V}}_{{\varvec{g}}} } \right)\). Figure 11 presents the current waveforms through each switch in SSBI.

Fig. 10
Three graphs depict current in Amperes against time in seconds. Switch Voltage V G s graph oscillates. Input current, peak inductor current, and diode current graphs fluctuate then rise.

Simulation waveforms of \({\varvec{i}}_{{\varvec{g}}}\), \({\varvec{I}}_{{\varvec{D}}}\), \({\varvec{V}}_{{\varvec{g}}}\), and \({\varvec{I}}_{{{\mathbf{pk}}}}\)

Fig. 11
Two graphs depict Diode Current in Amperes against time in seconds. The plotted lines I D s 1 to 4 depict a fluctuating trend.

Current waveforms through each switch in SSBI

The output current \(\left( {{ }I_{{\text{o}}} } \right)\) and output voltage \(\left( { V_{{\text{o}}} } \right)\) waveforms define the differences between input and output waveforms, and they are depicted in Fig. 12. Figure 13 depicts the output power of high gain SSBI.

Fig. 12
Two graphs depict voltage in Volts and current in Amperes on the y axes, and time in seconds on the x axes. The lines plotted on Output Voltage and Current graphs oscillate.

Output voltage \(\left( {{\mathbf{V}}_{{\mathbf{o}}} } \right)\) and output current \(\left( { {\mathbf{I}}_{{\mathbf{o}}} } \right)\) waveforms of SSBI

Fig. 13
A graph of power, viscosity index versus time in seconds. The line plotted on the graph rises and then plateaus.

Waveform depicting the output power of high gain SSBI

The waveforms in Fig. 12 represent the nature of output voltage below and above the \(P_{{{\text{omin}}}}\) In Fig. 13, \({\text{P}}_{o}\) is simply above \(P_{{{\text{omin}}}}\) and it does not cause any distortion in the waveform. In Fig. 13, Po is just underneath the beginning of peak-shaving distortion. Parameters utilized as a part of the simulation are \(V_{\rm g}\) = 48 V, \(V_{{{\text{dc}}}}\) = 380 V, and Output current Io = 0.8981A. Figure 14 depicts the operation of Zeta converter when it is integrated with a high gain SSBI.

Fig. 14
A graph of voltage in Volts against time in seconds. V d c line rises, then plateaus, and V p v line has minimal fluctuations.

Output voltage (\({\varvec{V}}_{{{\mathbf{dc}}}}\)) and PV array voltage (\({\varvec{V}}_{{{\mathbf{PV}}}}\)) of Zeta converter

The variable voltage from the PV array is given to a high-gain SSBI. Then SSBI produces the variable output voltage for each particular level of input voltage from the PV array as the output of the PV array is variable from time to time so to stabilize the output of SSBI, and the Zeta converter is integrated with between PV array and single-stage boosting inverter. When the \(V_{{{\text{pv}}}}\) 38 V of PV array is applied to the Zeta converter then it produces 48 V DC voltage and is applied to the high-gain SSBI as \(V_{\rm g}\) then output voltage \(V_{{\text{o}}}\) is 435 V. In another case, \(V_{{{\text{pv}}}}\) 58 V of PV array is applied to the Zeta converter then it produces 48 V DC voltage and is applied to the high-gain SSBI as \(V_{\rm g}\) then output voltage \(V_{{\text{o}}}\) is 435 V. The output of the Zeta converter is always constant even if the input is above or below the level of output voltage. By this, the variable renewable source output is maintained stable and the converter achieves the high voltage conversion.

5 Conclusions

The integration of Zeta converter in high-gain SSBI for elective vitality age applications has been described in this paper. Here high gain SSBI utilizes a TI to accomplish a high-input voltage step-up and, therefore, permits operation from the low dc input voltage. This paper determines the standards of operation, hypothetical investigation of nonstop, and irregular modes of operation by considering the increase in voltage and current stresses. Here, two remaining solitary models with 48 and 35 V inputs are studied and simulated. Hypothetical discoveries remain in great assertion with simulation and trial comes about. Satisfactory efficiency was accomplished with a low dc input voltage source. The Zeta converter provides positive output power from variable solar irradiance to the SSBI topology. The high gain SSBI provides the upside of high voltage step-up, and it can be additionally expanded by modifying the TI turns proportion.