Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic Christian PachaOliver KesslerFranz J. Tegude OriginalPaper Pages: 7 - 25
The Influence of Strain Relaxation on the Electrical Properties of Submicron Si/SiGe Resonant-Tunneling Diodes P. W. LukeyJ. CaroS. Radelaar OriginalPaper Pages: 27 - 35
Concept of Nanometric High Density Charge Coupled Devices K. MutambaA. Sigurdardo´ttirH. L. Hartnagel OriginalPaper Pages: 37 - 40
Analog Computation Using Single-Electron Circuits Eriko TokudaNoboru AsahiYoshihito Amemiya OriginalPaper Pages: 41 - 49
Quantum Hopfield Network Using Single-Electron Circuits—A Novel Hopfield Network Free from the Local-Minimum Difficulty Masamichi AkazawaEriko TokudaYoshihito Amemiya OriginalPaper Pages: 51 - 57
Considerations about Nanoelectronic GSI Processors Jose´ Camargo da CostaJaap HoekstraArthur H. M. van Roermund OriginalPaper Pages: 59 - 71
Simulation and Measurement of Shot Noise in Resonant Tunneling Structures G. IannacconeG. LombardiB. Pellegrini OriginalPaper Pages: 73 - 78