Abstract
The reliability of flip-chip Sn/Cu solder joint strongly depends on Kirkendall voids, since it affects the mechanical properties of the solder joints. In this paper, the formation of Kirkendall voids (KVs) at the interface of Sn/Cu joints was investigated by changing various Cu substrates, namely, high-purity Cu (HP Cu), electroplated Cu (EP Cu), and vacuumed-sputtered Cu (VS Cu). It is found that the KVs did not appear at the Sn/HP Cu interface even after aging at 180 °C for 720 h. A large number of voids were observed at the Cu3Sn/Cu interface in Sn/EP Cu and Sn/VS Cu joints during a short aging time. The size of voids formed in the Sn/EP Cu was larger relative to that in Sn/VS Cu. The formation of different voids at the Sn/Cu joints can be attributed to three factors, i.e., diffusion paths for Cu atoms increased from Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu, different impurities (S, Cl, et al.) in Cu substrates, and different stress states at the Cu3Sn/Cu interface.
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1 Introduction
In the joints between Sn-based solders and Cu substrate, the presence of Kirkendall voids (KVs) always accompanies with the formation of Cu3Sn layer during the thermal aging. With the miniaturization of solder joints, the voids usually formed at the Cu/Cu3Sn interface have a detrimental effect on the reliability of joints [1,2,3,4].
Generally, the formation of KVs was attributed to the Kirkendall effect, that is, the unbalanced diffusion of component elements (mainly Cu and Sn) [5, 6]. Researchers found that the presence of impurities plays a very important role in the growth of KVs [1, 5,6,7,8,9,10,11]. For instance, Kim et al. [6, 8] indicated that the impurity element S incorporated during the electroplating process could segregate at the Cu3Sn/Cu interface, reduce the activation energy barrier of the void nucleation, and accelerate the formation of voids. Yin et al. [5] [11] pointed out that the organic impurities were responsible for the formation of voids. In addition, due to the effect of impurities in electroplated Sn, the voids can also be developed in the Sn/high-purity Cu (HP Cu) couples [3].
In recent years, extensive research has been done on the effect of impurities on the formation of KVs [3, 6, 8, 9]. However, there have been few studies on exploring the microstructure of Cu substrate. Zou et al. [12] mentioned that the formation of voids might be affected by the grain size of Cu substrate. Therefore, a comprehensive and systematic research on the effect of various Cu substrates on the formation of KVs at the Sn/Cu interface is very necessary.
In these works, three types of substrates, i.e., HP Cu, electroplated Cu (EP Cu), and vacuumed-sputtered Cu (VS Cu), were designed to produce Sn/Cu joints. The concentration of impurities and grain size of Cu substrates were analyzed. The interface evolution, especially the Kirkendall voiding level, was discussed.
2 Experimental procedures
The solder used in this work was pure Sn (99.99%). Three kinds of substrates were used, designated as HP Cu, EP Cu, and VS Cu. HP Cu in dimension of 10 mm × 10 mm × 0.1 mm was 99.999% in purity. Electroplated (EP) Cu film in 10-μm thickness is processed with a solution which consists of CuSO4, H2SO4, HCl, and PEG (polyethylene glycol) (the detailed contents could be found in refs. [13, 14]) and a VS Cu film is processed at a vacuum level of 4.99 × 10−5 Torr and electric current of 4 A for 2 h. The target and substrate were high-purity copper (99.999% in purity), and prior to the deposition process, the substrate was cleaned in acetone, followed by deionized water rinsing in an ultrasonic tank. The final deposited Cu film was 5 μm in thickness.
The surface microstructure of HP Cu, EP Cu, and VS Cu was observed by scanning electron microscopy (SEM), and the etchant of 5 g FeCl3 + 8 ml HCl + 8 ml HNO3 + 100 ml C2H6O was used to display the grain boundary. The mean grain sizes were measured with the software Image J. At last, the solder joints were prepared by melting Sn on the foils at 260 °C for 1 min. The isothermal aging for the as-reflowed samples was performed at 150 °C or 180 °C for different times. Then, these samples were mounted in epoxy and metallurgically polished. The cross-sectional microstructure at the interface was observed by SEM, the compositions of intermetallic (IMC) layer were determined by energy-dispersive spectroscopy (EDS), and the average thickness of IMC layers was measured with the software Image J. X-ray photoelectron spectroscopy (XPS) was used to characterize the presence of impurities (C, O, Cl, and S) in all kinds of Cu substrates. To observe the three-dimensional morphology of the interfacial IMC layers, the Sn solder was etched completely using a 10% HNO3+90% distilled water solution.
3 Experimental results
Figure 1(a1) shows the interfacial microstructure of as-reflowed Sn/HP Cu joint. A layer of scallop-shaped Cu6Sn5 formed at the interface, and no voids appeared at the interface. After aging at 180 °C for 72 h, a Cu3Sn layer emerged at the interface of Cu6Sn5/HP Cu, but no voids can be detected, as presented in Fig. 1(b1). Even after aging at 180 °C for 720 h, as seen in Fig. 1(c1), there still have no voids at the Cu3Sn/HP Cu interface. Moreover, the thickness of the Cu3Sn layer exceeds that of Cu6Sn5 layers. The interfacial microstructure of as-reflowed Sn/EP Cu joints can be observed in Fig. 1(a2). Similar to the Sn/HP Cu joints, the scallop-shaped Cu6Sn5 layer was formed at the interface. Only several voids can be found at the Cu3Sn/EP Cu interface after aging at 180 °C for 24 h, as seen in Fig. 1(b2). After extending the aging period to 72 h, a large number of voids appeared, most of which located in the Cu3Sn layer near the Cu3Sn/EP Cu interface, as seen in Fig. 1(c2). Figure 1(a3–c3) shows the interface morphologies of the Sn/VS Cu joints. After the reflow treatment, the scallop-shaped Cu6Sn5 layer and the thin Cu3Sn layer formed at the interface, but both of them were discontinuous. In addition, a small amount of KVs was detected during the soldering period (Fig. 1(a3)). After aging at 180 °C for 24 h, continuous IMC layers were developed and the KVs at the Cu3Sn/VS Cu interface became denser (Fig. 1(b3)). With the further prolonging of aging time to 72 h, many small voids appeared at the Cu3Sn/VS Cu interface (Fig. 1(c3)).
According to the experimental results above, KVs did not appear at the Sn/HP Cu interface even after aging at 180 °C for 720 h, but formed at the Sn/EP Cu and Sn/VS Cu interfaces after a short aging time. Moreover, the void size and number distribution of Sn/EP Cu were more than those of Sn/VS Cu.
4 Discussion and analysis
The reasons why the KVs of the Sn/Cu solder joint vary from HP Cu to VS Cu substrates are analyzed. Three main factors are presented as follows:
-
i.
Diffusion paths for Cu atoms increased from Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu. The microstructures of three kinds of substrates are shown in Fig. 2(a). It can be seen that the HP Cu has coarse grains and the mean grain size is about 30 μm. However, compared with HP Cu, the grain sizes of EP Cu and VS Cu are much smaller those of about 1.2 μm and 300 nm, respectively. The number of grain boundaries of Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu interfaces is compared. The top morphology of the interfacial Cu6Sn5 is shown in Fig. 2(b). It is seen that the number of grain boundaries increased from Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu.
It is well known that copper is the dominant diffusing species in the Sn/Cu reaction couple [15, 16]. The grain boundary diffusion is the dominant diffusion mechanism for Cu atom [17], due to the number of grain boundaries increased from Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu. It means that the Cu flux increased from Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu. The vacancy flux (Jv) by the Sn/Cu reaction couple can be expressed as follows
where JCu is the Cu atoms diffuse out of the Cu/IMC toward the Sn matrix and JSn is the Sn atoms that migrate from the Sn matrix to the IMC/Cu interface. It well known that the formation of KVs was attributed to the unbalanced diffusion of component elements, that is, Cu and Sn [6]. Since the Sn/VS Cu and Sn/EP Cu can supply bigger JCu than that of Sn/HP Cu due to more diffusion paths, there will be generation of more considerable vacancies at the Sn/VS Cu and Sn/EP Cu relative to the Sn/HP Cu at the Cu3Sn/Cu interface.
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ii.
Different impurities in substrates. The formation of KVs is closely related to the impurities in the Cu substrate. Kumar et al. [18] revealed that the voids can be observed at the Sn/Cu (99.9%) interface at a relatively high temperature, while not at the Sn/Cu (99.999%) interface. Yu et al. [6] showed that the segregation of impurities (like sulfur) to the Cu/Cu3Sn interface might lower the nucleation energy of KVs. Figure 3 and Table 1 show the atomic percentages of impurity elements, like C, O, S, and Cl, in HP Cu, EP Cu, and VS Cu by using XPS (the HP Cu is 99.999% in purity; the XPS spectra do not list). It is seen that the EP Cu contained the impurity element S and Cl, but the surface components of HP Cu and VS Cu are all purity Cu except basic existent elements C and O.
Due to the impurity, element S incorporated during the electroplating process could segregate at the Cu3Sn/Cu interface, reduce the activation energy barrier of the void nucleation, and accelerate the formation of voids. Therefore, a large number of voids appeared at the Cu3Sn/EP Cu interface and further prove that the impurity is one of the major reasons for Kirkendall voiding.
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iii.
Different stress states at the Cu3Sn/Cu interface. There is a close correlation between the voids and the Cu3Sn phase [19]. The voids always appear at the Cu3Sn/Cu interface. The results in this work were also in accordance with this conclusion. The location of voids at the interface is related to the distribution of residual stress induced by phase transformation [20]. In the very early stage, the formation of IMC phases at the interface will cause a significant volume contraction [4, 20]. Song et al. [20] revealed that if the IMC layers were formed by Cu and Sn interdiffusion within a short time, the volume shrinkage was − 10.29 cm3/mol (ΔV=VCu3Sn-3VCu-VSn) for Cu3Sn or − 6.04 cm3/mol (ΔV=VCu6Sn5-6VCu-5VSn) for Cu6Sn5, and induced a tensile force according to force and momentum equilibria of the Cu-Sn system. Based on the structural information, the volume contraction can be estimated. When pure Cu and Sn react to form Cu6Sn5, a net 5.44% contraction in volume will occur. There will be a net 9.97% decrease in volume during the formation of Cu3Sn. It can be noted that the shrinkage rate of Cu3Sn is approximately twice as high as that of Cu6Sn5, so the voids appear at the Cu3Sn/Cu interface easily.
In the later stage of IMC formation after tensile force evolution, the IMC layer grows toward the Sn side by the dominant diffusion of Cu into Sn side. The molar volume (VSn) of Sn was replaced with that (VIMC) of Cu-Sn IMC (Cu3Sn and Cu6Sn5). Song et al. [20] revealed that a compressive force resulted from the volume expansion of + 11.01cm3/mol (ΔV=VCu3Sn-VSn(with 3Cu)) and/or + 36.56 cm3/mol (ΔV=VCu6Sn5-5VSn(with 6Cu)). In addition, the formation of Cu3Sn between Cu and Cu6Sn5 was due to the interstitial diffusion of Cu [15]. It also caused a compressive force with the molar volume expansion of + 18.49 cm3/mol (ΔV = 5VCu3Sn- VCu6Sn5 (with 9Cu)). Figure 4 shows micrographs of the Cu6Sn5 and Cu3Sn layers of Sn/Cu solder joint annealed at 150 °C for different times. Similar to the Sn/Cu joints annealed at 180 °C, the KVs did not appear at the Sn/HP Cu interface even after aging at 150 °C for 720 h, but formed at the Sn/EP Cu and Sn/VS Cu interfaces after a shorter aging time. However, during the annealing at 150 °C, the KVs of Sn/EP Cu and Sn/VS Cu interfaces were found to need longer aging times than those at 180 °C. Figure 5 shows the relationship between aging time and average thickness of Cu6Sn5 and Cu3Sn layers in three kinds of joints. It can be seen that the growth rate of Cu6Sn5 and Cu3Sn layers could be enhanced by grain refining of Cu substrates. Under the same thermal aging time, the thickness of total IMC layers increases from Sn/HP Cu, Sn/EP Cu, and Sn/VS Cu solder joint. In addition, with annealing increasing from 150 to 180 °C, the growth rate of Cu6Sn5 layers of three kinds of joints changed little, as seen in Fig. 5(a). The growth rate of Cu3Sn layers of three kinds of joints grew much quickly, as seen in Fig. 5(b). To sum up, the thickness of total IMC layers of Sn/VS Cu and Sn/EP Cu solder joints was much thicker than that of Sn/HP Cu solder joints, especially for the Cu3Sn layer. Therefore, the higher distribution of residual stress would be developed at the Sn/VS Cu and Sn/EP Cu interfaces relative to the Sn/HP Cu solder joints. Kim and Weinberg [6, 21] pointed that the residual stress facilitated the grain boundary diffusion of Cu atoms in solder joints and aggravated the unbalanced diffusion of Cu and Sn at the interface. Consequently, the higher distribution of residual stress at the Sn/VS Cu and Sn/EP Cu interfaces relative to the Sn/HP Cu solder joints is conducive to the formation of voids.
The common feature for HP Cu and VS Cu is that there existed negligible impurities in the substrates, but the VS Cu has much smaller grains and the higher stress at Cu3Sn/Cu interface relative to the HP Cu. Although the grain size of EP Cu is larger than that of VS Cu, the impurity elements S and Cl are incorporated into EP Cu during plating. The KVs formed have a large void size and number distribution in the Sn/EP Cu solder joints compared with the Sn/VS Cu solder joints.
5 Conclusions
Three kinds of substrates were employed to investigate the formation of KVs in the Sn/Cu joints during the thermal aging. Numbers of voids appeared at the Cu3Sn/Cu interface in Sn/VS Cu and Sn/EP Cu joints, but not in Sn/HP Cu joints. The results implied that the formation of voids could be accelerated due to the small grain size and more diffusion paths due to numerous grain boundaries in the Sn/VS Cu interface. The combination of impurities and small grain size in EP Cu also promoted the formation of voids at the Sn/EP Cu interface. The size of these voids was much larger than that at the Sn/VS Cu interface. The high distribution of residual stress was developed at the Cu3Sn/Cu interface in Sn/VS Cu and Sn/EP Cu joints, which would be helpful for the formation of voids.
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Funding
This project is supported by the National Natural Science Foundation of China (Grant Nos. 51805316 and 51605276), Shanghai Science and Technology Development Funds (18FY1424900), and Shanghai Science and Technology Committee Innovation Grant (17JC1400600 and 17JC1400601).
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Chen, J., Yang, J., Zhang, Y. et al. Effect of substrates on the formation of Kirkendall voids in Sn/Cu joints. Weld World 63, 751–757 (2019). https://doi.org/10.1007/s40194-019-00704-5
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DOI: https://doi.org/10.1007/s40194-019-00704-5