Summary
Systolic tree automata with a binary (or, more generally, balanced) underlying tree are investigated. The main emphasis is on input conditions, decidability, and characterization of acceptable languages.
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Culik II, K., Salomaa, A., Wood, D.: VLSI systolic trees as acceptors. Res. Rept. CS-81-32, Dept. of Computer Science, University of Waterloo, Waterloo, Ontario, 1981
Culik II, K., Gruska, J., Salomaa, A.: Systolic trellis automata (for VLSI). Ibid., CS-81-34
Culik II, K., Gruska, J., Salomaa, A.: On a family of L languages resulting from systolic tree automata. Ibid., CS-81-36
Culik II, K., Gruska, J., Salomaa, A.: On nonregular context-free languages and pumping. EATCS Bulletin 16, 22–24 (1982)
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This work was supported by Natural Science and Engineering Research Council of Canada Grant Nos. A7403 and A1617
On a leave of absence from the Computer Research Center in Bratislava, Czechoslovakia
On a leave of absence from the University of Turku, Finland
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Culik, K., Gruska, J. & Salomaa, A. Systolic automata for VLSI on balanced trees. Acta Informatica 18, 335–344 (1983). https://doi.org/10.1007/BF00289573
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DOI: https://doi.org/10.1007/BF00289573