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1 CMOS Compatible Bio-Sensors

In order to realize sensor system-on-chips (SoCs), bio-sensors need to be fabricated on chip and integrated with the active circuitry. Most importantly, the required post-IC processes should be fully compatible with CMOS technologies to advance the future commercialization of sensor SoCs. In this section, the design, the sensing mechanism, and the process for fabrication of CMOS compatible bio-sensors would be introduced.

1.1 Cantilever-Based DNA Sensor: Design and Fabrication

The cross-section view of the micro-cantilever DNA sensor is depicted in Fig. 1 [1]. Addressed as probe DNAs in Fig. 1, single-stranded DNA molecules with a predefined sequence are immobilized on the top of the micro-cantilever to capture specific DNA molecules. The specific DNA molecule with a sequence that matches the sequence of the probe DNA can be combined with the probe DNA through base pairing to form a single double-stranded molecule in the hybridization process and is called the target DNA.

Fig. 1
figure 1

Cross-section view of the micro-cantilever DNA sensor [1]

The sensing mechanism of the DNA sensor is based on the piezoresistor which is embedded in the micro-cantilever as a physical transducer. As shown in Fig. 1, the N+ polysilicon semiconductor layer in a standard CMOS process is used to realize a piezoresistor whose resistance depends on the applied mechanical stress. The sensing mechanism of the CMOS DNA sensor is illustrated in Fig. 2 [1]. When the sensor is exposed to the target DNA, the hybridization process would take place and change the surface stress. Then the cantilever bends to response to the mechanical stress and hence the resistance of the embedded piezoresistor alters. The variation in the resistance of the piezoresistor can be measured by a resistive readout circuit to achieve the detection of the specific DNA.

Fig. 2
figure 2

Sensing mechanism of CMOS DNA cantilever sensor [1]

It has been proved that thiol-modified bio-molecules can be reliably bound to a gold surface. As known, gold has excellent biocompatibility. Moreover, gold is quite robust against surrounding changes and can withstand repetitive detection/cleaning cycles when immersed into buffer solution due to its stability. Therefore, a gold layer and thiol-modification are used to immobilize the probe DNAs onto the micro-cantilever. Figure 3 illustrates the post-processing in steps: (a) removal of the passivation layer above the sensor; (b) removing the silicon dioxide (SiO2, the dielectric material for insulation layer in IC technology) around the defined area of the micro-cantilever by dry etching; (c) depositing a gold (Au) layer upon the micro-cantilever by lift-off method; (d) finalizing the micro-cantilever structure by using dry etching to remove the underneath silicon substrate [1]. During the post-processing, either the first metal layer (M1) or the second metal layer (M2) can be adopted as an etching stop, which determines the thickness (either 1.62 μm or 3.26 μm) of the micro-cantilever.

Fig. 3
figure 3

Post-processing steps [1]

The DNA sensor is fabricated by using a CMOS compatible MEMS technology which is developed by National Chip Implementation Center of Taiwan. As a well-established CMOS Bio-Microelectromechanical Systems (Bio-MEMS) platform, this technology is performed by combining TSMC 0.35-μm 2P4M CMOS technology with a series of CMOS compatible micromachining post-processing. The scanning electron microscope (SEM) images of CMOS micro-cantilever-based DNA sensors are shown in Fig. 4. To find the optimal micro-cantilever structure, DNA sensors with different types of cantilever structures are realized on the same chip, as shown in Fig. 4. It is worth mentioning that all the cantilevers should exhibit an identical intrinsic resistance for fair comparison of the sensitivity. During the measurement, an analog multiplexer is used to connect one of the DNA sensors with the readout circuit so that each sensor can be evaluated individually. Note that the auxiliary analog multiplexer contributes an on-resistance of 39.5 Ω which affects the measurement results of the DNA sensors. To solve the issue, the readout circuit should perform self-calibration to eliminate the effect of the on-resistance [1].

Fig. 4
figure 4

SEM images of the CMOS cantilever DNA sensors [1]

1.2 Polysilicon Nanowire Based DNA/Protein Sensor

To achieve the goals of mass production and standardization, a poly-silicon nanowire (NW) based DNA/Protein sensor is designed and implemented by using a 0.35-μm 2P4M commercially-available CMOS process, as illustrated in Fig. 5. There are two poly-silicon layers in the 0.35-μm 2P4M CMOS process, where the first poly-silicon layer (poly1) is a heavily doped poly-silicon material designed for the metal gates and the second poly-silicon layer (poly2) with lower N+ doping is designed for on-chip poly-insulator-poly (PIP) capacitors. According to previous studies, the biomolecular sensitivity of a semiconductor-based NW biosensor can be enhanced by lowering the doping concentration of the poly-silicon. Therefore, the poly2 layer of the 0.35-μm 2P4M CMOS process is chosen to implement the poly-Si NW biosensors. The cross-sectional view of a poly-Si NW-based biosensor is depicted in Fig. 6. A meander shape poly-Si NW with certain adequate impedance is designed so that the poly-Si NW sensor can have a good design window of interface circuits.

Fig. 5
figure 5

The illustration of a poly-Si NW-based biosensor

Fig. 6
figure 6

The cross-sectional view of a poly-Si NW-based biosensor in the 0.35-μm 2P4M CMOS process [2]

The Wheatstone bridge architecture is adopted to measure the resistance/conductance variation of poly-Si NWs for the higher sensitivity and the better common-mode rejection ratio (CMRR). Figure 7 shows the micrograph of poly-Si NW sensors in the Wheatstone-bridge. Particularly, the layout of metal layers is designed to minimize the chip area occupied by the poly-Si NW biosensor so that the nearby circuits on the same chip can be well protected during post-IC processing. Moreover, as shown in Fig. 6, all the metal layers and the interconnection layers are stacked to form an etching stop sidewall surrounding the poly-Si NW biosensors, which prevents lateral etching and is crucial for the yield rate enhancement in the post-etching process.

Fig. 7
figure 7

The micrograph of poly-Si NW sensors in the Wheatstone-bridge [3]

To enable the poly-Si NW biosensors, it requires a post-etching process to remove most of the dielectric layers above the biosensors after the standard CMOS process so that the sensors can be exposed for DNA/protein detection. Note that the passivation layer (Si3N4) of the chip can be selectively removed in the standard CMOS process by a proper bond pad design because the passivation layer over the pad area would be removed to expose the top metal layer (metal4) for wire-bonding. Therefore, the passivation layer above the sensors can be removed in the standard CMOS process to simplify the post-processing. After that, only TEOS oxide is left above the biosensor. To remove most of the TEOS oxide layer above the biosensor quickly and successfully, both dry etching and wet etching methods are utilized. The reactive ion etching (RIE) is first performed by applying trifluoromethane (CHF3) gas to get rid of a great deal of oxide above the sensor. Since both poly-Si NW and on chip circuits may be damaged by long running RIE, wet etching is then performed with buffered hydrofluoric acid (BHF) as the second step of post-etching process to further reduce the oxide thickness to 100 nm. Note that the N+ poly2 exhibits a limited resistance due to its doping concentration so a leakage current through the solid/liquid interface between poly-Si and the aqueous environment could occur and worsen the signal-to-noise ratio (SNR) of the sensing devices. Therefore, a thin oxide layer above the poly-Si NW is essential to reduce the undesired leakage current. The etching process is illustrated in Fig. 8.

Fig. 8
figure 8

Post etching process (etch ILD): Step 1. Dry etch: Reactive Ion Etch (RIE), Step 2. Wet etch: Buffered Oxide Etch (BOE) [3]

1.3 Architecture & Sensing Mechanism

A successful single-chip biosensor system normally relies on a multidisciplinary design covering both sensors and circuits. According to previous works, biosensors made of smaller and thinner low-doping silicon nano-wires can achieve better bio-molecular sensitivity. However, the design of silicon nano-wires is not so flexible because most parameters of the devices are restricted by specific process recipes of the manufacturer. To solve the issue, a Wheatstone bridge is adopted as the interface between the sensor and the read-out circuit. Figure 9 illustrates the full-bridge arrangement of the Wheatstone sensor bridge formed by poly-Si NWs. In the full-bridge configuration, two of the poly-Si NWs (R1 and R4) are exposed by post-etching process while the others (R2 and R3) are still covered by the dielectric (oxide) and passivation (nitride) layers. The aminopropyltriethoxysilane (APTES) is used to form amino groups on the surface of the exposed poly-Si NWs so that the probe ssDNA molecules can be immobilized upon the poly-Si NWs by using succinimidyl-4-(N-maleimidomethyl)cyclohexane-1-carboxylate (SMCC) as the linker. Consequently, only the poly-Si NWs R1 and R4 can function as DNA sensors. Since the target ssDNAs carry negative charges in PBS environment, the electrons within the N-type poly-Si NWs would be repelled from the surface of the NW as the target ssDNA hybridizes with the probe ssDNA. Due to the charge repulsion, the hybridization phenomenon decrease the conductance (or increases the resistances) of the poly-Si NWs R1 and R4. Basically, the detection of the complementary target ssDNA that has a specific binding affinity to the HBV probe ssDNA is performed by measuring the variation in the conductance (or the resistance) of the poly-Si NW. The increase in the resistance of R1 and R4 results in the decrease in the output voltage of the Wheatstone bridge (=IAVin+ − IAVin). This output voltage can be delivered to a readout circuit for further signal processing.

Fig. 9
figure 9

The full-bridge arrangement of the Wheatstone sensor bridge formed by poly-Si NWs

The full-bridge arrangement helps to minimize measurement errors resulted from testing environments and fabrication processes. Moreover, the configuration doubles the differential output signal, as compared with other types of arrangements. To eliminate the measurement errors due to temperature variation, a CMOS temperature sensor can be included to provide temperature calibration for on-chip biomolecular sensing applications. As reported in [2], the temperature sensor shares the same signal path with the poly-Si NW biosensors by using a multiplexer to reduce complexity and power consumption.

1.4 Hydrogel-Based Glucose Sensor

Hydrogel is a cross-linked polymer that can absorb water, as illustrated in Fig. 10a [4]. The most important feature of hydrogels is their ability to swell when put in contact with a thermodynamically compatible solvent like water. The swelling process in hydrogels depends on many factors including the property of the aqueous solution. Consider a glucose-sensitized hydrogel which is absorptive to both glucose and water molecules. When the hydrogel is exposed to a glucose solution to trigger the swelling process, its volume varies with the glucose concentration. The difference in the swelling behavior or the volume change of hydrogels results from that the absorption of glucose molecules helps the polymer chains to relax more so that more H2O molecules can be filled with to enlarge the volume of the hydrogel, as illustrated in Fig. 10b. Apparently, glucose sensing can be performed by measuring the change in the hydrogel volume, which requires only a drop of the solution. Moreover, the absorption of molecules in hydrogels is actually a diffusion process in which the molecules penetrate into the network of crosslinked polymer chains. The diffusion process is reversible and the hydrogel can conditionally recover from the swelling deformation, which makes the detection mechanism quite suitable for reusable sensors.

Fig. 10
figure 10

Absorption and swelling behavior of hydrogel for (a) water and (b) glucose solution [4]

The above-mentioned sensing mechanism is applied to a glucose monitoring SoC based on capacitive sensing configuration, as shown in Fig. 11, where its packaging strategy is also depicted [4]. The glucose sensor is implemented with a sandwich structure composed of the glucose-sensitized hydrogel in the middle, an anodic aluminum oxide (AAO) membrane at the top, and a MEMS capacitor at the bottom. As previously mentioned, the volume of the hydrogel varies with the glucose concentration when the hydrogel is exposed to a glucose solution. The volume change then varies the compression force acting on the MEMS capacitor and turns into the change in the air gap of the capacitor. As a consequence, a capacitance variation that depends on the glucose concentration can be observed and delivered to the readout circuit for further processing.

Fig. 11
figure 11

Schematic of proposed hydrogel-based glucose monitoring SoC and its package [4]

Beneath the hydrogel, the MEMS capacitor is built in a metal-air-metal structure and covered by a polydimethylsilicane (PDMS) material. The top metal plate of the capacitor is a Cr/Au plating deposited on the underside of the PDMS cover, whereas the bottom metal of the capacitor is realized by the top metal layer of the standard CMOS technology. With bisacrylamide introduced as the cross-linker, the glucose-sensitized hydrogel is prepared in situ by a copolymer aqueous solution of methacrylamido phenylboronic acid (20 mol%) and acrylamide (80 mol%). A potassium persulfate/tetraethylenediamine redox system is used to initiate polymerization. Allowing only glucose and water molecules to pass through it, the AAO membrane behaves like a filter which blocks bacteria or other impurities to avoid undesired reaction.

The principle of hydrogel-based glucose sensor is illustrated in Fig. 12. Take a close look at this figure, you can find that there are actually two MEMS capacitors inside the sensor and they are connected in series. When the glucose solution seeps through the AAO membrane to react with the hydrogel, the hydrogel starts to swell and squeeze the PDMS layer, which makes the top plate of the capacitors bend and leads to a capacitance variation. The effective capacitance of the device can be calculated as follows. Let CS1 and CS2 represent the two MEMS capacitors in the sensor. The effective capacitance of each MEMS capacitor before and after applying the glucose solution to the sensor can be expressed as:

$$ {\mathrm{C}}_{S1}={C}_{S2}=\frac{\varepsilon_0\cdot {A}_t}{2\cdot \left({d}_n\right)}\;\mathrm{and}\;{\mathrm{C}}_{S1}^{\prime }={C}_{S2}^{\prime }=\frac{\varepsilon_0\cdot {A}_t}{2\cdot \left({d}_n+\Delta d\right)}, $$

where At is the effective area of each MEMS capacitor, dn is the distance between the top and bottom plates and Δd is the change in the distance due to the swelling in the hydrogel after applying the glucose solution to the sensor. The effective capacitance of the device before and after applying the glucose solution to the sensor can be expressed as:

$$\begin{array}{lll} {C}_T=\frac{C_{S1}\cdot {C}_{S2}}{C_{S1}+{C}_{S2}}+{C}_{S3}=&\frac{\varepsilon_0\cdot {A}_t}{4\cdot \left({d}_n\right)}+{C}_{S3}\;\mathrm{and}\;{C}_T^{\prime }\\=&\frac{C_{S1}^{\prime}\cdot {C}_{S2}^{\prime }}{C_{S1}^{\prime }+{C}_{S2}^{\prime }} +{C}_{S3}^{\prime }=\frac{\varepsilon_0\cdot {A}_t}{4\cdot \left({d}_n+\Delta d\right)}+{C}_{S3}^{\prime }, \end{array}$$

where CT represents the total capacitance of the device and CS3 represents the parasitic capacitance between the bottom plates of the two capacitors. Note that CS3  CS3’. The change in the distance Δd, as well as the change in the effective capacitance of the device, depends on the glucose concentration.

Fig. 12
figure 12

The principle of hydrogel-based glucose sensor [4]

The sensor was applied with glucose solutions of different concentrations from 0 to 240 mM. The experiment results of hydrogel-based glucose sensor are shown in Fig. 13 [4]. As expected, the capacitance of the glucose sensor increases with the glucose concentration. The sensor exhibits the capacitance of 1.1 pF for a concentration of 0 mM and gradually increases as the glucose concentration is increased. The capacitance reaches 2.68 pF for the glucose concentration of 240 mM and seems saturated due to a limit on the volume expansion of the hydrogel.

Fig. 13
figure 13

Measurement result of sensor capacitance vs. glucose concentration [4]

To conduct a long-term test on the hydrogel-based glucose sensor, a stand-alone sensor is tested every 15 min and applied with a drop of glucose solution whose concentration is gradually increased from 5 to 120 mM and then decreased from 120 mM back to 5 mM. According to the experiment results shown in Fig. 14 [4], the capacitance of the sensor varies with glucose concentration for 12 h. These results prove that the hydrogel-based glucose sensor is reusable and can continuously operate for a long time.

Fig. 14
figure 14

The measured capacitance of the hydrogel-based sensor varies with the glucose concentration [4]

1.5 Ion-Sensitive-FET (ISFET) Based pH Sensor

ISFET based sensors can be realized by using CMOS technologies with either open-gate or floating-gate structure, where open-gate ISFETs can achieve higher sensitivity than floating-gate ISFETs [5]. The penalty of using open-gate ISFETs is an extra post-process required to remove the poly-silicon gate. It becomes quite challenging when the previously mentioned poly-silicon NW-based DNA sensor is also integrated to achieve a multi-sensing system. Note that the open-gate ISFETs would be realized with the first poly-silicon layer (poly1) while the poly-silicon NW-based sensor would be made of the second poly-silicon layer (poly2) by using a CMOS technology with two poly-silicon layers, such as the previously mentioned TSMC 2P4M 0.35-μm CMOS process. Moreover, the post-process needs to be performed without causing severe damage to the thin gate oxide layer under the first poly-silicon layer so that the poly-silicon NW-based sensor under the oxide can be well protected.

Alternatively, the floating-gate ISFET can be developed as a pH sensor to save the trouble mentioned above. The passivation layer made of silicon nitride in a CMOS technology can function as a pH sensitive membrane so that the floating-gate ISFET pH sensor can be realized without any post-IC process. The cross-section view of an floating-gate ISFET pH sensor is depicted in Fig. 15 [5]. Notably, the sensitivity depends on the sensing area which can be increased without enlarging the on-chip transistor device (50/50 μm). The top metal area as well as the above Si3N4 membrane occupied an area of 250 μm × 250 μm. The sensing mechanism of the open-gate ISFET pH sensor is also illustrated in Fig. 15. The ISFET is configured as a normal NMOS current source with the gate voltage defined by a reference electrode. When the ambient concentration of the hydrogen ion H+ increases (or the pH value falls), the increase in the number of these positively charged ions will decrease the threshold voltage of the ISFET and hence increase its output current.

Fig. 15
figure 15

The cross-section view of the ion-sensitive FET (ISFET) pH sensor [5]

The pH value of human blood is normally regulated within a narrow range from 7.35 to 7.45. Therefore, a proper range for the pH meter would be from 6 to 8 with a resolution of 0.01 (8-bit resolution). During the measurement, the current of the ISFET is first adjusted to 3 nA with a neutral buffer solution (pH = 7). Then the ISFET current would vary with the pH values of solutions under test (from 6 to 8) with the maximum variation of 3 nA, as shown in Fig. 16.

Fig. 16
figure 16

The ISFET current versus the pH value from 6 to 8

1.6 Bandgap-Based Temperature Sensor

Bandgap references are widely adopted to provide accurate bias voltage and can be used to realize temperature sensors in standard CMOS process due to its adjustable temperature coefficient. A temperature sensor is realized by using a bandgap reference circuit consisting of vertical pnp BJTs, as shown in Fig. 17 [5]. Conventionally, a temperature-independent bandgap reference voltage (VREF) is generated by combining a PTAT voltage with a base-emitter voltage which exhibits a negative temperature coefficient. PMOSET current mirror pairs M1-2 and M3-4 form a supply independent bias, which ensures that Vx = Vy. Both the drain current of M1–M6 (IPTAT) and the bias voltage VPTAT are proportional to the absolute temperature (PTAT) and can be expressed as:

$$ \begin{array}{l}{I}_{PTAT}={I}_{D1-4}={I}_{D5,6}=\frac{V_{BE2}-{V}_{BE1}}{R_0}=\frac{V_T\; \ln\;n}{R_0}\\ {}{V}_{PTAT}={I}_{PTAT}\times {R}_{OUT}={V}_T\; \ln\;n\times \frac{R_{OUT}}{R_0}\propto {V}_T\propto T,\end{array} $$

where V T  ln n is the difference between the base-emitter voltages of the two BJTs operating at different current densities. Resistors R0 and ROUT are implemented with the same type of resistors (poly2 resistor) to avoid unwanted effects resulted from the temperature coefficient or the process variation of resistors.

Fig. 17
figure 17

Schematic of the bandgap reference temperature sensor [5]

Since the human body temperature is about 37 °C, the output voltage (VPTAT) at 37 °C is designed to be 0.9 V with a temperature coefficient of 3.78 mV/°C. Note that a simple temperature sensor like this can be used to perform temperature compensation on other sensors. The output of the temperature sensor can be delivered to a readout circuit followed by an ADC to provide temperature information. As presented in [3], the temperature information would be used to reduce errors due to temperature drifts in the output signals of poly-silicon nanowire and ISFET sensors. The required number of bit for ADC and the noise requirement of the readout circuit can be considered as follows. To provide the required dynamic range of an implantable system that operates in a temperature range from 32 to 42 °C, a resolution about 0.05 °C can be achieved with 8 bit. For a limit of detection (LOD) referring to an SNR of 3, the input referred noise of the sensor readout should be no more than 44.5 μVrms so that the minimum output voltage change of 189 μV can be detected at the precision of 0.05 °C. If a sampling frequency of 200 Hz is adopted, the input referred noise of the sensor readout should be no more than 3.15 μV/√Hz over 200 Hz. When the sensor is used to monitor the ambient temperature, where the system operates in a wider temperature range from −20 to 120 °C, then it requires a larger number of bits to achieve the reasonable dynamic range and resolution. For example, a resolution of 0.5 °C should be achieved by at least 9 bit. Therefore, a 10-bit ADC and a readout circuit with the programmable gain from 0 to 40 dB are designed to accommodate all the requests with safety margin in these works [3, 5]. For the better accuracy, the bandgap-based temperature sensors can also be improved by using dynamic element matching and auto-calibration, as discussed in [6].

2 Readout Circuits

Most of the time, the sensing results from the sensor would be some tiny little physical quantities accompanied by interfering noise. As the interface between a sensor and the sensor SoC, a readout circuit needs to provide proper amplification for these signals. To achieve that, it should contribute the least noise and distortion while consuming the lowest power and chip area. In this section, the design of readout circuits would be introduced.

2.1 Reconfigurable Multi-Sensor Readout Circuit

In practical applications, it is necessary to monitor several biomedical signals simultaneously for patients with severe heart diseases or lung failure. Physicians need to handle different types of monitoring systems immediately, which is inefficient and could be quite dangerous under those urgent circumstances. An adaptive transducer readout that supports four types of signal acquisition (C, R, I, V) has been proposed for multi-parameter sensing [7]. However, the multi-sensing system in [7] requires four independent interface circuits, resulting in poor hardware efficiency.

A reconfigurable sensor interface which can be shared among four sensors can be realized by using the switched-capacitor topology. Switched-capacitor-based readout circuits have several advantages over other classes of readout circuits[8, 9]. First, all types of signals can be easily transformed into charges stored in the capacitor of the switched-capacitor circuit in the sampling mode, which improves the hardware efficiency since it requires only one sensor interface to cope with many different types of sensors. Second, the fundamental building blocks of the switched-capacitor circuits deal with capacitive loads, instead of resistive loads that require power-hungry output buffers and also generate extra thermal noise.

The correlated double sampling (CDS) technique is utilized to reduce non-ideal effects such as dc offsets and the inherent flicker noise of CMOS amplifiers. Although the chopper stabilization (CHS) technique is adopted in many low-noise sensor interfaces [8], it is not compatible with a sampled system and hence it is not suitable for the switched-capacitor-based readout circuit. Moreover, the CDS technique is superior in several aspects, as compared with the CHS technique. By using the CDS technique, the dc offsets and the flicker noise are directly eliminated at the output of the amplifier where they still exist as modulated noises if the CHS technique is adopted. Consequently, the amplifier that adopts the CDS technique can handle a larger output swing, which is beneficial to a low voltage design. Besides, the CHS technique requires a high-quality low-frequency low-pass filter to suppress the modulated dc offsets and flicker noise, which increases both the power consumption and the die area.

Figure 18 shows the schematic of the reconfigurable switched-capacitor-based readout circuit. There are two stages in the readout circuit. The first stage is a reconfigurable multi-sensor interface consisting of a noninverting switched capacitor amplifier and a multiplexer. Notably, the noninverting switched capacitor amplifier is based on the differential to single architecture. The differential input configuration provides the common-mode rejection of the circuit (CMRR = 164 dB), which helps eliminate the unwanted effects of CMOS switches such as charge injection and clock feed-through. By manipulating the switches (φC,R,I,V) in the multiplexer properly, the interface can be reconfigured to cope with any kind of sensor. During cyclic operations, time-division multiplexing (TDM) is adopted to control the switches (φC,R,I,V) and this interface will be reconfigured four times every 250 ms to sequentially process four types of signals from the corresponding sensors.

Fig. 18
figure 18

Schematic of the reconfigurable readout circuit [5]

The conversion principles for four types of signals (voltage, current, capacitance and resistance) are illustrated in Fig. 19a–d. In the sampling mode (φ1), one of the four input signals will be converted into the charges stored in C1 (10.6 pF), and then it will be transformed into an output voltage through charge redistribution over C2 (10 pF) in the amplification mode (φ2). Let ΔQ1 represent the amount of charges stored in C1 by the end of the sampling mode. In the amplification mode, the charges gained by C2 would be equal to the charges previously sampled by C1, so the output voltage can be expressed as ΔQ1/C2. Note that any dc-offset would be differentially stored in capacitors C2 in the sampling mode and it would be subtracted and cancelled in the amplification mode.

Fig. 19
figure 19

Conversion principles for (a) V-type, (b) I-type, (c) C-type, and (d) R-type inputs [5]

For voltage signals (VIN), the interface behaves as a conventional noninverting switched capacitor amplifier, and hence the voltage gain of 1.06 V/V can be estimated from the capacitor ratio (C1/C2). For current signals (IIN), ΔQ1 is equal to the product of the input current IIN and the sampling time (Ts), and hence the transresistance gain of 250 MΩ can be estimated for the sampling time of 2.5 ms. It is worth mentioning that the sampling clock rate (φ1,2) should be set faster than 200 Hz to make a trade-off between the system requirement and the circuit limitation. As the output voltage is inversely proportional to the clock rate and the value of C2, long clock periods or small capacitors can lead to very large output voltages, which may cause nonlinear characteristics. To cope with an input current of 3 nA with a proper capacitor value (C2 = 10 pF) in the interface, 200 Hz is the minimum clock rate that can prevent the amplifier from saturation. Additionally, the clock rate should exceed the flicker noise corner frequency of the CMOS amplifier in the vicinity of 100 Hz.

To measure the capacitance variation, one of the sampling capacitors (C1) is replaced by the capacitive sensor (CIN). Then an identical voltage difference (VDD − Vcm, i.e. 0.9 V) is intentionally fed to both CIN and C1 for sampling. The difference between CIN and C1 will cause different amount of charges stored in these sampling capacitors in the sampling mode and hence results in different output voltages in the amplification mode. The conversion gain of 43.7 mV/pF can be estimated from the expression: (VDD − Vcm)/(C1 + C2). Because the unstable post-process of the MEMS capacitive sensor causes inevitable capacitance offsets, a 3-bit capacitor array with the least significant bit capacitance of 0.75 pF is incorporated into the sampling capacitor (CIN) to perform calibration. To observe the resistance variation, the resistive sensors (RS) with reference resistors are configured as a Wheatstone bridge (as mentioned in Sect. 1.1) to convert the resistance variation into a voltage signal (VS = VDD/2RREF) first. Then as a voltage signal, it can be handled by the conventional switched capacitor amplifier with a voltage gain of C1/C2. The overall conversion gain of 95.4 mV/kΩ can be estimated from the expression VSC1/C2 for RREF = 10 kΩ and VDD = 1.8 V.

The second stage of the readout circuit is a programmable-gain switched capacitor amplifier which is also based on the noninverting configuration and employs a 7-bit binary-weighted capacitor array as the input capacitor. With respective conversion gains offered by the first stage, each type of input signal would be converted to a voltage which then can be properly enlarged by the programmable-gain amplifier to enhance the sensitivity. The 7-bit capacitor array is designed with the least significant bit capacitance of 0.1 pF to provide linear gain control. The variable gain can be adjusted from 0 to 40 dB, which extends the input dynamic range of the readout circuit. All the switches are realized as transmission gates to minimize non-ideal effects. Particularly, a non-overlapping clock scheme must be used in this switched-capacitor-based readout circuit to avoid inaccurate charge sharing between capacitors.

The readout circuit suffers from noise folding due to the sampling process in the CDS technique, as other circuits that adopt sampling techniques. The uncorrelated thermal noise would be sampled and hence the thermal noise power at least doubles [10]. Apparently, the thermal noise of the CMOS amplifier needs to be reduced to alleviate the above mentioned problem. A large transconductance (gm) of the input transistors is preferred. Moreover, large sampling capacitors are advantageous as the integral noise power over the Nyquist interval is limited to KT/C. As previously mentioned, the readout circuit employs the sampling capacitor of 10 pF, and hence the noise power KT/C is 411.4 × 10−12 V2 rms, i.e. 20.3 μVrms. Therefore, the readout circuit can handle the temperature sensor with the resolution of 0.05 °C.

Instead of using reset switches, the capacitor C3 is connected between the input and output nodes of the op-amps for both stages of the readout circuit in the sampling mode, which prevents dramatic changes in the output voltages and thus relaxes the slew rate requirement of the op-amps. However, the speed of the readout circuit also limits the time-division-multiplexing (TDM) among different sensors. When the readout circuit is reconfigured to handle a different type of signal, it takes at least twelve clock cycles (60 ms) for the readout circuit to deliver a reliable result, which explains why it takes the interface 250 ms to sequentially process four types of signals from the corresponding sensors. Moreover, the frequency of input signals (<0.1 mHz for the sensors in Sect. 1.1) is much lower than half the sampling frequency (>200 Hz), the voltage at the input terminals of the op amp would not change appreciably from one clock phase to the next due to oversampling. Therefore, the input signal at input terminal of the op amp, as a slowly varying signal, would be nearly cancelled by the CDS switching of C1 and C2. For the op amps with a finite gain A, the dc gain of the switched capacitor amplifier can be expressed as:

$$ \frac{V_{OUT}}{V_{IN}}=\frac{C_1}{C_2}{\left(1+\frac{C_1+{C}_2}{C_2{A}^2}\right)}^{-1} $$

Notably, the dc gain does not depend on the capacitors C3, and the gain error is proportional to A−2, indicating that the effect of the finite op-amp gain is reduced. The gain of op amp is designed as large as 110 dB to achieve the negligible gain error for the readout circuit. The op-amps employ PMOS input pairs with long channel (L ≥ 1 μm) to mitigate the effect of flicker noise. Moreover, all the transistors in the op-amps operate in the sub-threshold region for better current efficiency.

2.2 Capacitive Readout Circuit

The capacitance changes of the glucose sensor mentioned in Sect. 1.1 can be measured by the readout circuit shown in Fig. 20. The readout circuit consists of a current generator, a capacitance-to-frequency converter (C–F converter) [4], and a digital counting amplifier (DCA) processor. The DCA processor, through its control over the current generator, forms a feedback path to improve the detection resolution.

Fig. 20
figure 20

The readout circuit for capacitive sensors [4]

The C–F converter is aimed to convert a capacitance to a periodic pulse signal with a corresponding frequency. Figure 21 shows the schematic of the C–F converter which basically employs a sensing clock loop (SCL) and analog bio-signals from the capacitive sensor would be converted to digital signals in a dynamic comparator by using similar approaches proposed in [11, 12]. As a variable capacitor, the capacitive glucose sensor is connected with a constant on-chip capacitor (Cint) in parallel whereas the current generator functions as a dc current source (Isource) to charge the capacitors. One terminal of the capacitor is terminated to ground so the charging current is applied to the other terminal from which the output voltage of the capacitor is observed. A reference voltage Vsw is applied to the negative terminal of the comparator.

Fig. 21
figure 21

Schematic of C–F converter [4]

As shown in Fig. 21, the output voltage of the capacitor is delivered to the positive terminal of the comparator. When the output voltage of the capacitor exceeds Vsw, the output state of the comparator will be switched to high. The transition will be delivered to the delay stage and after a while, an NMOS would be turned on by the delayed transition to discharge these capacitors. Due to the time delay, the output voltage is higher than the reference voltage Vsw at the beginning of discharging process. So it also takes a while for the output voltage to fall below the reference voltage and changes the state of the comparator from high to low. Again, the transition would be delayed first and then sent to the NMOS to break the discharging path so that the current source can start to charge the capacitors whose output voltage is below the reference voltage Vsw due to the time delay. Through the processes mentioned above, periodic pulses would be generated at the output of the comparator. Notably, the output voltage of the comparator changes at the rate that depends on the capacitance. Therefore, the pulse width and the interval between two consecutive pulses can be used to measure the effective capacitance.

The measurement results of the C–F converter are shown in Fig. 22. According to the previous discussion, the period/frequency of the pulse waveform depends on the capacitance observed by the C–F converter. When glucose sensor is disconnected from the on-chip capacitor Cint, the output frequency of C–F converter is 4.63 Hz. When the capacitive glucose sensor is connected with Cint in parallel, the frequency of the CF-converter shifts to 3.76 Hz. Figure 23 shows the operation principle of DCA, where a faster clock is employed to measure the time interval between two consecutive pulses that links to a distinct capacitance. The capacitance resolution of the readout circuit can be improved by adjusting the clock rate.

Fig. 22
figure 22

C–F converter measurement results [4]. Left: stand alone on-chip Cint. Right: Cint and the capacitive sensor in parallel

Fig. 23
figure 23

Operation principle of DCA [4]

2.3 Oscillator-Based Self-Calibrated Readout Circuit

Resistive sensors deliver resistance variations as output signals which require readout circuits to perform measurement on resistances. As mentioned in Sect. 1.1, the cantilever DNA sensor requires a readout circuit that recognizes the change in its resistance before and after DNA hybridization. Many approaches have been proposed to measure the resistance variation of sensors [1316]. As mentioned in Sect. 1.1, the Wheatstone bridge is adopted to convert the resistance variation into a voltage output signal. Unfortunately, the mismatch and the offset problems pose severe design difficulties [17]. By observing the current that flows through the resistance, the resistance measuring method for achieving a wide dynamic range is demonstrated in [18]. However, the precision of the readout circuit is insufficient for a sensor exhibiting tiny resistance variation that is less than 0.02 % of the original resistance.

An oscillator-based readout circuit with self-calibration can be used to measure the tiny resistance variation. As depicted in Fig. 24, the readout circuit is formed from a sensor-merged oscillator, a buffer, a divider, a mixer, a frequency-to-digital (F-to-D) converter, and a calibration controller. The sensor-merged oscillator is a ring oscillator comprised of three different delay cells. The resistive sensor, ex. a piezoresistive DNA sensor, is embedded in one of the delay cells as a variable resistor, and thus the oscillation period would be linear with its resistance. In particular, for small resistance variations, the change in the oscillator frequency (FSENSOR) is approximately linear with the resistance variation of the sensor. The output signal of the oscillator is first passed to a buffer stage to be extended to a rail-to-rail signal. Then the rail-to-rail signal is delivered to a divide-by-4 circuit which provides an output clock (FDIV) with a perfect duty cycle of 50 %. The output clock would be delivered to the mixer while the other input terminal of the mixer is applied with an external clock (FCLK). A simple D flip-flop (DFF) is employed as a mixer to provide frequency down-conversion. The output clock of the divider (FDIV) is multiplied with the external clock (FCLK) by the mixer to increase the relative frequency variation. Due to the simple mixer architecture, the port-to-port isolation of the mixer is very poor. If the frequency of the external clock is close to the frequency of the oscillator, the external clock could cause frequency pulling to the oscillator, which retards the sensing function. In other words, the divider plays an important part in minimizing the frequency pulling in the oscillator.

Fig. 24
figure 24

Architecture and simplified circuits of the oscillator-based self-calibrated readout circuit [1]

Simulations are performed with/without the divider to observe the frequency of the down-converted signal versus the frequency difference between the two input signals of the mixer. For comparison, the simulation results are shown in Fig. 25, proving that the accuracy can be effectively improved by incorporating the divider into the readout system.

Fig. 25
figure 25

Simulated results of frequency pulling effect [1]

The mixer is followed by a counter which converts the frequency of the down-converted signal (FOUT) into an 8-bit digital output (DOUT). Let FCOUNTER represent the frequency of the counter, then the digital output (DOUT) can be expressed as:

$$ {D}_{OUT}=\frac{\left|{T}_{OUT}-{T}_{0,DN}\right|}{T_{counter}}=\left|\frac{F_{counter}}{F_{OUT}}-\frac{F_{counter}}{F_{0,DN}}\right|=\left|\frac{F_{counter}}{F_0+\Delta F}-{D}_0\right|, $$
(1)

where F0,DN (T0,DN) is the initial frequency (period) of the down-converted signal before the sensing process begins, and ΔF is the frequency variation due to the resistance change of the sensor after the sensing process completes. You can tell that FDC actually plays the role of an analog-to-digital converter (ADC) in this oscillator-based readout system. Moreover, the FDC digitizes the absolute frequency change of the down-converted signal before and after the sensing process. Therefore, the readout system can cope with either an increase or a decrease in the resistance of the sensor, as well as in the output frequency.

As previously mentioned, the mixer transfers the divider output signal (FDIV) down to a lower frequency band (FOUTPUT) to increase the relative frequency variation. An illustration shown in Fig. 26 is used to explain the method in more detail. For simplicity, assume that the divider delivers an output frequency of 10 MHz (FDIV = 10 MHz). After the sensing process (DNA hybridization) completes, the piezoresistive sensor exhibits a very small resistance variation of 0.02 %, which leads to a frequency shift of 2 kHz at the divider output (FDIV). Apparently, the frequency shift is much smaller than the original frequency of 10 MHz, which makes the following frequency discrimination quite difficult.

Fig. 26
figure 26

An example to explain the functionality of the added mixer [1]

To solve the problem, the frequency band is down-converted to a relatively lower band by using a mixer. Applied with an external clock (FCLK) of 9.9 MHz, the mixer converts the output signal of the divider from 10 MHz to 100 kHz, while the frequency shift due to the sensing process (DNA hybridization) remains unchanged, so that the relative frequency variation is enlarged by 100 times. This method efficiently improves the sensitivity of the system and thus the design constraints in other aspects can be significantly relaxed.

In the previous work [1], the ring oscillator is designed to operate at the frequency around 24 MHz, where the piezoresistive DNA sensor presents the resistance around 3 kΩ. So the divider delivers the frequency FDIV around 6 MHz which is then down-converted to the output frequency FOUT of 200 kHz. As previously mentioned, the output frequency would be translated into the 8-bit digital output by the FDC. In order to support a variety of applications, the clock rate of the counter (FDC) is adjustable so that a wide range of frequency variations can be handled by the readout system. During the measurement, the readout circuit is capable of detecting a small frequency shift of 1.2 kHz, less than 0.02 % in terms of the relative variation. Notably, the tiny resistance variation of 0.6 Ω in the sensor can be estimated from the frequency shift.

A self-calibration mechanism is employed to compensate for the process-voltage-temperature (PVT) variations. As depicted in Fig. 24, a capacitor array is incorporated into one of the delay cells. During calibration, the RC time constant of this delay cell would be configured to adjust the oscillation frequency, as well as the output frequency of the mixer (FOUT). Through altering the control code of the capacitor array DCTRL<7:0>, the FDC output would gradually approach a pre-determined code that corresponds to the condition for FOUT  200 kHz, the desired initial condition of the readout circuit after calibration. It is worth mentioning that the temperature effect during the sensing process should be considered because both the piezoresistive sensor and the oscillator-based readout circuit are susceptible to the temperature. When the piezoresistive sensor is embedded in the readout circuit, a relative temperature coefficient of 1,074 ppm/°C can be observed during the simulation, which means only a slight temperature variation of 0.186 °C could yield the same output result as the one from the resistance variation of 0.6 Ω and lead to malfunction. For practical use, a temperature sensor would be required to perform temperature calibration on the readout circuit.

3 Sensor System-on-Chip (SoC)

3.1 Cantilever-Based Label-Free DNA SoC for Hepatitis B Virus Detection

3.1.1 System Introduction

Figure 27 depicts the system block diagram of a wireless DNA detection system. Cantilever-based DNA sensors, an oscillator-based self-calibrated readout circuit, a microcontroller unit (MCU), voltage regulators, and an on–off keying (OOK) transceiver are monolithically integrated. For most of the time, the system operates in the standby mode in which only the OOK receiver and part of the MCU are turned on to listen to commands, therefore, the average power consumption can be significantly reduced. Once meaningful wireless command signals from external mobile devices such as laptops are received, the OOK receiver demodulates the commands and delivers them to the MCU to set up the system parameters and put the system in the readout mode.

Fig. 27
figure 27

The system block diagram of a wireless DNA detection system [1]

In the readout mode, most building blocks of the system are awaked, whereas the receiver is turned off. The change in the resistance of the cantilever-based DNA sensor is first transformed into a frequency shift by the sensor embedded ring oscillator of the readout circuit. Then the frequency shift is converted into an 8-bit digital output signal by the frequency-to-digital (F-to-D) converter. The 8-bit digital output signal is further translated into data with RS232 format by the MCU. Through OOK modulation, the RF carrier is combined with the data in the on-chip transmitter. The modulated signals would be wirelessly delivered to other external mobile devices.

3.1.2 Experiment Results

The DNA SoC was realized in a CMOS Bio-MEMS Process. Figure 28 shows the chip micrograph and the DNA SoC occupies an area of 5 × 6.08 mm2. To investigate the device sensitivity, DNA sensors were implemented with different structures of micro-cantilevers on this chip. All the circuits need to be well protected during the post process required for the development of the DNA sensors, which ensures the normal function of the SoC during the following experiments. Table 1 summarizes the measured performance of the DNA detection SoC. With high level of integration and the wireless capacity, the system achieves the detectable DNA concentration lower than 1 pM.

Fig. 28
figure 28

Chip micrograph [1]

Table 1 Performance summary

The flowchart of the experiment is depicted in Fig. 29. First, the probe DNAs are immobilized on the top of the cantilever to implement the sensor, which takes about 2 h. Then, the DNA sensor is immersed into a solution of phosphate buffered saline (PBS buffer) for experiment initialization. And then, a sample of DNAs is injected to see how many DNAs in the sample can hybridize with the probe DNAs. After waiting for 15 min which is long enough for the DNA hybridization, rinse the sensor with PBS buffer for 10 min to reduce non-specific binding. This step ensures that the stress change of cantilever is mainly caused by DNA hybridization (matched DNAs), rather than non-specific DNA binding (unmatched DNAs). Finally, the sensing chamber is dried for 20 min to obtain steady signals. During the experiment, the temperature was maintained at the room temperature (=25 °C) by a temperature conditioner.

Fig. 29
figure 29

The flowchart of the experiment [1]

3.1.2.1 Preliminary Test

To examine the function of the DNA sensor SoC, a preliminary experiment was conducted. In this preliminary experiment, the 5′ thiol-modified DNA (DNA sequence: 5′-HS-ATAGGTCGGTAGGTGAATGG-3′) was chosen as the probe DNA and immobilized on the cantilever. Then a sample of 1 μM all-matched DNAs (5′-CCATTCACCTACCGACCTAT-3′) and a sample of 1 μM all-mismatch DNAs (5′-GGTAAGTGGCGAGTTGGATA-3′) were injected individually, as target DNAs in the experiments. For both experiments, the divider output frequency is recorded over time as shown in Fig. 30, where the black curve (solid square) and the red curve (solid circle) represent mismatch and match DNAs, respectively. Before the DNA samples are injected, the PBS buffer is applied to the sensor SoC as a “no-DNA” control to generate the frequency in the initial state (F0). In “Wash State”, the sensor is rinsed with PBS buffer for several times, which results in relatively unstable frequency changes due to background fluctuations. Particularly, the frequency increases from the “Initial State” to the “Wash State” for the match DNA and decreases for the mismatch DNA. The phenomenon is probably caused by the following factors. First, the experiment on the cantilever-based DNA sensors is performed in an open environment where the ion concentration of the buffer solution may increase due to evaporation The unstable ion concentration could affect the characteristics of the probe DNAs on the sensors and the target DNA bio-molecules. Second, particles such as DNAs and ions can move in the liquid environment due to electric fields and bump into the cantilever sensor, which also causes measurement uncertainty. Third, the piezoresistor is embedded on the bottom of the cantilever and exposed to the buffer solution. The resistance of the piezoresistor might be affected by the unstable ion concentration of the buffer solution. All the factors mentioned above are attributed to the liquid environment. Therefore, the sensors need to be dried after the “Wash State” so that stable measurement results can be obtained in the “Dry and Steady State”.

Fig. 30
figure 30

The divider output frequency is measured over time for experiments on match and mismatch DNA samples [1]

Generally, the temporally unstable characteristic in the “Wash State” would not be an issue if all the unbound particles are totally removed during the washing procedure and the sensors are perfectly dried in the Steady State. The difference between the divider output frequency in the “Initial State” and that frequency in the stable “Dry and Steady State” can be regarded as the change due to the DNA hybridization. As calculated from Fig. 30, the frequency change is about 112 kHz for match DNAs and is about 50 kHz for mismatch DNAs. Apparently, the match DNAs cause the larger frequency change than the mismatch DNAs, which unequivocally proves the function of the DNA SoC. It should be noted that the smaller frequency change of 50 kHz is resulted from non-specific binding of mismatch DNAs which can be considered as an interfering noise source. Practically, non-specific binding phenomenon seldom occurs in the experiments on match DNAs. Therefore, as long as the frequency change caused by hybridization of match DNAs is larger than that by non-specific binding of mismatch DNAs for the same concentration, the noise can be ignored or eliminated by post signal processing. To avoid degradation in the sensitivity, the undesired effect can also be alleviated by some previously proposed techniques [19].

In the other experiment, two match DNA samples of different concentrations (100 pM and 1 μM) are injected as target DNAs. As shown by the experimental results in Fig. 31, frequency changes (ΔF) of 40 and 16 kHz are induced by the match DNA samples with concentrations of 1 μM and 100 pM, respectively. Namely, the DNA SoC could distinguish concentrations of different DNA samples from 100 pM to 1 μM. It should be noted that the time left for the hybridization process is much shorter than (about one third of) that in the previous experiment. Only 5 min is left for the hybridization process in this experiment to avoid the unwanted effect due to saturation of DNA binding. According to [20, 21], the extent of the hybridization strongly depends on the time for hybridization before saturation of DNA binding occurs. Consequently, the time for hybridization would determine the sensitivity of the DNA sensor, which explains why the frequency change (40 kHz) shown in Fig. 31 is nearly one third of the frequency change (112 kHz) shown in Fig. 30 for the same concentration of 1 μM match DNA.

Fig. 31
figure 31

The divider output frequency is measured over time for experiments on match DNAs with different concentrations [1]

Furthermore, to evaluate the precision of the system, the short term stability (noise floor) is analyzed according to the steady-state data obtained from this experiment. As depicted in Fig. 32, the short-term Allen deviation σ y in this experiment reduces to 6.58 × 10−5 at an average time of 160 s, so the frequency deviation in the presence of noise would be equal F0 × σ y  = 395 Hz [22]. This frequency deviation can be used to estimate the minimum recognizable frequency change about 1.2 kHz (0.02 % frequency variation), as the limit of detection (SNR = 3) for the DNA SoC.

Fig. 32
figure 32

Short-term Allan deviation according to the experimental data [1]

To investigate the influence of the cantilever structure on sensor characteristics, several sensors with different structures (identified as C1  10) were designed and implemented. The experiment results are shown in Fig. 33. For these cantilever-based DNA sensors, the illustration of sensor geometries and a summary table with the detailed information are shown in Fig. 34. Theoretically, a cantilever sensor with a smaller spring constant (larger L/W) is supposed to present a higher sensitivity[23]. However, after the cantilevers are developed and released from the silicon substrate in the post process, they present different extents of initial bending due to individual residual stresses. This issue has a great impact on the characteristics of the sensors, such as the initial resistance (F0 frequency) and the sensitivity.

Fig. 33
figure 33

Frequency variation for different cantilever sensors in this chip [1]

Fig. 34
figure 34

Detailed information of the designed cantilever sensors in this chip [1]

It is found that after the post processing, the sensor with the cantilever structure C10 is usually flatter than sensors with other structures, which means the residual stress in this cantilever C10 is lower than others. This explains why the sensor with the cantilever structure C10 can achieve the best sensitivity among all the sensors, as can be seen in Fig. 34, even though it does not present the smallest spring constant. Notably, the output frequency increases for most of the sensors as the result of DNA hybridization and decreases for a few others, as shown in Fig. 33. It may be due to different residual stresses and/or different sequences of target DNAs [24, 25].

The Fig. 35a shows the measured digital output signal of the DNA SoC for the experiments on match and mismatch DNAs. The digital output results agree with the corresponding frequency changes in Fig. 30. The digital output would be sent to the OOK transmitter which delivers an output power of −6.4 dBm at 402 MHz (in the MICS band), as shown in Fig. 35b. The waveforms of the OOK-modulated signal delivered by the transmitter and the digital output signal recovered from the OOK-modulated signal were measured by an oscilloscope, as shown in Fig. 35c.

Fig. 35
figure 35

(a) Measured digital data for match and mismatch DNA conditions. (b) Spectrum of the transmitter output. (c) Waveforms of the transmitted data and the recovered data displayed in the oscilloscope [1]

3.1.2.2 Hepatitis B Virus (HBV) DNA Detection

Hepatitis B is the most common serious liver infection which affects around 350 million people worldwide. In order to prove the practical use of the DNA SoC, the detection of hepatitis B virus (HBV) DNA was demonstrated. In this experiment, the HBV (5′-SH-CCGATCCATACTGCGGAAC-3′), as the probe DNA, and several kinds of DNA oligonucleotides, as target DNAs, were used to evaluate the selectivity of the system. All the DNA samples were purchased from Genomics, Taiwan. The sequences of the target DNAs are all-match(5′-GTTCCGCAGTATGGATCGG-3′), one base pair (1-bp) mismatch (5′-GTTCCGTAGTATGGATCGG-3′), three base pair (3-bp) mismatch (5′-GTTCCGTGATATGGATCGG-3′), and all-mismatch (5′-ACCTTATCTACCTACCTAT-3′), respectively. Figure 36 shows the measured divider output frequency before and after DNA hybridization for different samples including the PBS buffer and the target DNAs with four kinds of sequences as previously mentioned. As expected, the hybridization process involving the all-match DNA sample causes the largest frequency change. According to the experiment results, the DNA SoC is capable to distinguish between the match HBV DNAs and the mismatch DNAs even for those with one base pair mismatch sequence.

Fig. 36
figure 36

Measured divider output frequency for different target DNA sequences before and after DNA hybridization[1]

The frequency changes are normalized by the initial frequency to obtain the relative frequency change (Fsteady − F0)/F0 for the experiments on match HBV DNAs with different concentrations (1 pM, 100 pM, and 10 nM), as shown in Fig. 37. As mentioned previously, the PBS buffer is treated as the “no-DNA” control and applied to the system first to obtain the initial frequency F0 for each experiment.

Fig. 37
figure 37

Relative frequency change for match HBV DNAs with different concentrations (1 pM, 100 pM, and 10 nM) [1]

For sensing of HBV DNA, a concentration range from 1 pM to 10 nM can be provided by the system, as can be seen from Fig. 37 where the relative frequency change is almost linear with the DNA concentration in log scale. For each concentration, measurement results were collected from the experiments on five pieces of sensor samples and used to calculate the standard error of the mean (SEM), as shown by the error bar in Fig. 37. It is noteworthy that the relative frequency change of 0.9 % for the 1 pM HBV DNA sample is much larger than the minimum recognizable frequency change (0.02 %) that is estimated for the limit of detection (SNR = 3). According to the measured results and the previous analysis, the limit of detection of the system would be less than 1 pM in terms of the DNA concentration, indicating that the DNA sensor SoC is suitable for most clinical applications.

3.1.2.3 Practical Issues

The effect of nonspecific binding is a critical problem to practical applications for bio-molecule detection. Actually, it is nearly impossible to create a sensing environment without nonspecific binding in practical applications. As an origin of interfering noise for the detection system, it should be minimized in practical use. Nonspecific binding can be alleviated to enhance the selectivity of the system by several techniques. For example, blocking agents or antifouling agents [19] can be added into the sensor chamber to prevent subsequent nonspecific binding. In addition, more effective washing procedure before the steady-state condition can sometimes improve the selectivity. Apparently, a compromise needs to be made between the selectivity and the complexity of sample preparation.

Moreover, restrictions or notes should be clearly described in user guides for such type of devices in the future. The required information can be obtained as follows. The DNA SoC should be tested under more different conditions including the worst case. It should be tested on DNAs with different sequences, for different lengths of time, with different DNA concentrations or buffer solutions, and within a wider temperature range, etc. Then useful information including the tolerant concentrations of interfering sources (ions or DNAs) for certain degrees of accuracy, the limits of detection for certain analytes, recommended buffer solutions, and the required time for each procedure can be provided for users. For example, when our system is applied to DNA sequence discrimination, for higher accuracy, the concentration of the target DNAs should better be controlled roughly within the range from 1 pM to 10 nM, as found in the experiment.

3.2 Poly-Silicon-Nanowire-Based Hepatitis B Virus Detection DNA SoC

There is still room for improving the characteristics of the previously presented DNA SoC. For clinical applications, systems with better sensitivity, higher selectivity and robotic characteristics are always desired. To address this need, DNA biosensors are realized with polysilicon nanowires (poly-Si NWs) by using commercialized CMOS technology. Due to the one-dimensional nano-scale morphology, NW FETs with large ratios of surface to volume can achieve high sensitivity as chemical and bio-molecules sensors [26, 27]. In addition to high sensitivity, the CMOS poly-Si NW-based bio-SoC can achieve label free and real time detection of HBV DNA. With the characteristics of low cost, high practicability and portability, the bio-SoC promisingly allows the access to point-of-care and outdoor applications.

The whole system architecture is shown in Fig. 38. Benefiting from the CMOS SoC technology, the poly-Si NW-based biosensor is integrated with an analog-front-end (AFE), a successive-approximation-register analog-to-digital converter (SAR ADC), and a digital controller to form a sensor SoC that exceeds traditional Si NW discrete measuring systems. In addition, an on–off keying (OOK) wireless transceiver is incorporated to provide the wireless capability for the DNA bio-SoC.

Fig. 38
figure 38

The system architecture of the poly-Si NW based DNA detection SoC [2]

As mentioned in Sect. 1.1, a Wheatstone bridge is formed by poly-Si NW-based sensors in the full bridge arrangement. The change in the resistances of the sensors would result in a corresponding change in the output voltage of the Wheatstone bridge. The differential output signal is properly amplified by the AFE with characteristics of low noise, high CMRR, and rail-to-rail input range. The AFE consists of a differential difference amplifier (DDA) and a low-pass filter (LPF) as shown in Fig. 38. It is worth mentioning that the in-band noise of the AFE is dominated by flicker noise and dc offset. Therefore, the chopper-stabilization technique is adopted to reduce low-frequency noise and dc offset. Moreover, the DDA should exhibit large input impedance to reduce its loading effect on the resistive biosensor.

The amplified signal is then digitized by the 10-bit SAR ADC at very low power consumption and then sent to the digital controller. The digital controller functions as a built-in micro-processer that provides the required control for each building block and translates the digitized signals into data with RS232 format so that the sensing results can be wirelessly delivered to external devices by the transceiver through OOK modulation. The data can be recorded and further analyzed in the external devices. In addition to the function of data transmission, the OOK transceiver also performs receiving and demodulation on commands from external devices.

To overcome the temperature drift of the resistive poly-Si NW biosensor, a temperature sensor that is proportional to absolute temperature (PTAT) with excellent linearity (R2 = 0.9999 from −20 to 120 °C) is incorporated into the bio-SoC for temperature calibration. The measurement results from the temperature sensor and the bio-sensor would be used to build up a mapping table. Such a mapping table can be stored in the external devices and used to perform the calibration.

3.2.1 Experiment Results

The poly-Si NW based bio-SoC is fabricated in TSMC 0.35-μm 2P4M CMOS process. Figure 39 shows the micrograph of the bio-SoC, along with a summary table of the system performance. Since the procedures to functionalize the sensor and the following experiment are conducted in aqueous environments, it is necessary to protect the on chip CMOS circuits. Moreover, it is important to prevent the bonding wires and pads from short-circuit condition due to ionic buffers. Therefore, after the bio-SoC is mounted on a printed-circuit-board (PCB) by wire-bonding, the epoxy Ab glue is used to cover the area of pads and bond wires to create the passivation. To keep liquid samples on the top of bio-SoC, a plastic tube is stood on the PCB board as a fluid channel that encloses the bio-SoC with bonding wires. During the experiment, all the bio-related protocols are carried out inside the fluid channel. To realize the DNA sensor, the probe DNA is first immobilized on the poly-Si NW. After the functionalizing procedure, the probe DNA, as a functional layer on the sensor, can capture the target DNAs with specific sequence. The steps of surface immobilization and hybridization are illustrated in Fig. 40a, while the photo of the bio-SoC and the fluid channel on the PCB, with the bounding pads and wires covered by AB glue, is shown in Fig. 40b. The HBV DNA sequences are shown in Fig. 40c.

Fig. 39
figure 39

The chip photo and performance summary table of the bio-SoC [3]

Fig. 40
figure 40

(a) DNA immobilization and hybridization flow chart, (b) bio-SoC on the PCB with bonding pads and wires passivated by epoxy Ab glue and the fluid channel stood on the board, (c) HBV DNA sequences [3]

Figure 41a shows the average voltage at the output of the AFE (amplification factor: 40×) for different concentrations of all-match target DNAs and the inset shows the relative voltage change ΔV/V0. The trend in the output voltage variation with respect to the DNA concentration can be expected from the sensing mechanism. Because the net charge of the DNA molecule is negative, the more target DNAs are hybridized with probe DNAs, the lower the AFE output voltage becomes. To prove the result is solely contributed by the DNA hybridization, hot de-ionized (DI) water at 90 °C is applied to de-hybridize the sample and remove target DNAs. The AFE output voltage then returns to nearly the same level as it is in the initial state when only the PBS buffer is applied. According to the experimental results in Fig. 41a, the detection limit of 10 fM is examined, so the bio-SoC can meet most clinical requirements. Figure 41b shows the average voltage at the output of the AFE for different sequences of target DNAs. Obviously, the AFE presents the lowest output voltage for the all-match target DNA due to its highest binding affinity among target DNAs under test.

Fig. 41
figure 41

(a) Sensitivity and (b) selectivity of the developed poly-Si NW based DNA detection SoC[3]

As aforementioned, the digital controller and the OOK transceiver are incorporated to achieve the wireless function of the bio-SoC. To demonstrate the wireless data link between a personal computer and the bio-SoC, a commercial antenna operating at 433 MHz is soldered on the PCB and connected to the bio-SCO, as shown in Fig. 42a. Another 433 MHz transceiver module with an antenna is used to receive OOK-modulated RF signals from the bio-SoC and to recover the signals back to digital data with RS233 format that can be fed to the personal computer. Through wireless transmission, the digital data received at the personal computer for different concentrations of match target DNAs is shown in Fig. 42a. In addition, the experiment on cardiac troponin I protein (cTnI) is performed to demonstrate the biomolecular diagnosis capability of the bio-SoC, as shown in Fig. 42b. The testing protocol of cTnI is similar to that of HBV ssDNA except it takes longer time to prepare the cTnI sample. During the measurement, a stable detection range from 3.2 to 320 pM can be achieved in the PBS environments. The measurement results show that the bio-SoC has a great potential to be employed in various applications.

Fig. 42
figure 42

(a) A experimental demonstration of a functional wireless bio-SSoC for HBV DNA detection. The small image shows the wireless setup of this experiment. (b) An experimental time history of cTnI detection. Region (I) represents the response of pure PBS buffer. At Region (II), 3.2 pM cTnI sample was injected into the testing reservoir. At Region (III), pure PBS buffer was used to wash away un-bound cTnI antigen. At Region (IV) and Region (V), the same experimental protocol was repeated for measuring the 0.32 nM cTnI sample [2]

3.3 Glucose Sensor SoC

As one of the most serious chronic diseases, it is predicted that the diabetes could affect the daily lives of 3 hundred millions patients in 2025. For patients with diabetes, the glucose concentration in blood needs to be strictly regulated, which requires routine blood glucose measurements. Nowadays, blood glucose tests are usually performed by electrochemical methods, such as electro-enzymatic methods or electro-catalytic methods [28]. The procedures of these regular blood tests are invasive and the test has to be performed four to six times each day, which is really troublesome and also quite painful to these patients. If the blood glucose concentration is over 200 mg/dl, which is quite normal for these patients, the wounds caused by these blood tests can be difficult to heal and may even get infected.

A reusable hydrogel-based glucose sensor SoC can provide a better alternative. Through a subcutaneous implant surgery, once and for all, the sensor SoC can be put under the skin of the patient and wirelessly delivers the testing results of the blood glucose. In this way, blood glucose monitoring becomes more convenient and friendly to patients. In fact, the function of continuous data tracking is also helpful for other patients who strongly rely on personalized medicines. The block diagram of a glucose sensor SoC is shown in Fig. 43. As mentioned in Sect. 1.1, a hydrogel-based glucose sensor can convert a change in the glucose concentration into a capacitance change of the sensor. The glucose-induced capacitance changes can be translated into a digital output signal by the capacitive readout circuit introduced in Sect. 1.2.

Fig. 43
figure 43

Block diagram of the hydrogel-based glucose monitoring SoC [4]

Basically, the glucose sensor SoC operates the same as the other SoCs that are introduced in previous sections. A digital control unit is employed to translate the digital output signal into data with RS232 format and an ASK transceiver is incorporated to provide the wireless function. The ASK transceiver consists radio frequency circuits including a low noise amplifier (LNA), a multi-stage amplifier (Gain stage), a demodulator, a digital buffer, a ring-oscillator, a buffer stage and a power amplifier (PA) [29, 30]. Note that the power consumption for medical implants is an important issue and the ASK transceiver consumes the most power in this glucose sensor SoC due to its operating frequency. To reduce the average power consumption, the ASK transceiver will be waked up only when an external activation command is received.

3.3.1 Experiment Results

The hydrogel-based glucose sensor SoC is fabricated using TSMC 0.35-μm CMOS technology. The die area is 3 × 3 mm2. The read out circuit dissipates the power of 285 nW from the 3-V supply and it provides the detectable capacitance range from 1.1 to 2.68 pF at such a low power consumption. As previously mentioned, the wireless circuitry consumes most of the energy and its power dissipation of is 11.9 mW. To integrate the hydrogel-based glucose sensor into the system, the sensor is fabricated on the top of the chip by using CMOS compatible micromachining techniques. The glucose sensor SoC is illustrated in Fig. 44. Notably, a spiral inductor with an outer dimension of 3 × 3 mm2 is designed to capture the data and RF power through coil coupling [31] and placed under the active area of chip to reduce the fabrication cost. A rechargeable battery would be required for longer lifetime in the future [32]. As a medical implant, the SoC should be bio-compatible, so the package is coated with parylene material except for the AAO membrane.

Fig. 44
figure 44

Illustration of the hydrogel-based glucose monitoring SoC and its package [4]

The chip micrograph and the photo of the SoC with integrated glucose sensor after packaging are shown in Fig. 45a, b, respectively. Figure 46 shows in vitro measurement results. Before the glucose solution is applied, the glucose sensor would exhibit a small capacitance, which leads to a small binary value of the digital output result. Once the glucose solution of 200 mM is applied to the capacitive sensor, an obvious increase can be observed from the binary value of digital output result in a very short time. The increase in the binary value would become stable within 2 min. Experimental results show that the system achieves a limit of detection of 40 mM in terms of the glucose concentration. A summary of performance is given in Table 2.

Fig. 45
figure 45

Photo of (a) Chip (b) SoC package [4]

Fig. 46
figure 46

Preliminary in vitro measurement result of Digital Out vs. time with 200 mM glucose concentration [4]

Table 2 Performance summary

3.4 Reconfigurable Multi-Sensor SoC

In practical applications, several biomedical signals should be monitored simultaneously, which requires a multi-sensor SoC that can handle various types of biomedical signals by different sensing mechanisms. The biggest challenge in realizing a multi-sensor SoC may be the design of the post-IC processes. In the stage of deploying different sensors on a single chip, the chip needs to go through several post-IC processes. All the post processes must be compatible not only with the standard CMOS process but also with each other.

The architecture of a reconfigurable CMOS multi-sensor SoC is illustrated in Fig. 47. To achieve real-time monitoring on multiple physiological parameters, four types of sensors including the nanowire-based protein sensor, the hydrogel-based glucose sensor, the ISFET pH sensor, and the band-gap temperature sensor are integrated into the SoC as these sensors are widely used in biomedical sensing applications. Moreover, two energy harvesting mechanisms are employed so that the SoC can pick up the solar energy through a 2 × 2 mm2 GaAs solar cell with a condenser lens while grabbing the RF energy through electromagnetic coupling, which solves the issue of battery replacement in medical devices for long-term usage or implantable applications.

Fig. 47
figure 47

Overall system architecture and cross-section view of sensors [5]

Figure 48 shows the block diagram of the reconfigurable multi-sensor SoC. Four types of sensing results (capacitive, resistive, current, and voltage types of analog signals) are processed by reconfigurable circuitries to reduce the chip area. The reconfigurable multi-sensor interface provides functions of multiplex andconversion for these analog signals. According to the received command, the interface would be appropriately configured by the digital processor to select one of the four types of input signals and convert the selected signal to a voltage-type of signal. The reconfigurable sensor interface is followed by a programmable gain amplifier (PGA) which provides amplification for the voltage signals. Both the interface and the PGA are based on switched-capacitor circuits, as mention in Sect. 1.2. The output signal of the PGA is then converted into digital output signals by a 10-bit successive approximation register analog-to-digital converter (SAR ADC). Through digital signal processing (DSP), the digital processor performs digital filtering on the digital output signals to reduce most surrounding interferences like power-line noise. Finally, the digital output signal will be translated into data in RS232 format and then wirelessly transmitted to an external monitor by the 403-MHz on–off keying (OOK) transmitter.

Fig. 48
figure 48

Block diagram of the reconfigurable multi-sensor SoC [5]

As previously mentioned, the system relies on two kinds of energy resources, the solar energy from a GaAs solar cell and the RF power through coupling at 1 MHz. The two energy harvesting methods have been successfully demonstrated in previous researches [33, 34] and proved to be applicable even inside the human body. An energy harvesting interface is design to collect the available energy as follows. The external RF power is coupled via an inductor-capacitor (LC) tuned network and the RF input voltage obtained from the coil is sent to a rectifier for RF-to-DC conversion. Then, a dual-input switch capacitor voltage combiner is employed to combine the energy from both sources.

To meet the supply voltage requirement of the system (1.8 V) or rechargeable batteries, the output voltage of the combiner is further raised by a pulse frequency modulation (PFM) boost converter. However, the voltage combiner and the PFM boost converter cannot be operated at the low voltage (=0.7 V) offered by the solar cell, especially when these circuits are implemented using 0.35-μm CMOS technology, where low-threshold-voltage devices are unavailable. For energy transducers with low output voltages, start-up circuits that operate at low supply voltages (<0.5 V) are usually necessary. Powered by the solar cell only, a low-voltage start-up circuit generates a boosted voltage (>1.8 V) to kick-start the energy harvesting interface.

To achieve the reconfigurable multi-sensor system, system parameters such as the type of sensors and associated signals, the amplification gain of the PGA, the calibration bit, the transmission mode, the operation mode, and the alarm threshold can be adjusted by users with the self-defined data/command. Data in RS232 format is carried by the 1-MHz signal through OOK modulation and wirelessly delivered to the system by coil coupling. A simple demodulator then recovers the data from the received signal. The data is further processed in the digital processor which controls and operates the system according to the data contents. The UART in the digital processor is in charge of the data conversion between serial format and parallel format. A cyclic redundancy check (CRC) is used to detect data errors in the digital processor. After being digitized in the ADC, the sensing results in digital form would be further processed by the digital impulse response infinite (IIR) low-pass filter presenting the corner frequency of 10/40 Hz to eliminate the surroundings interference such as the power-line noise at 50/60 Hz, which is critical for detection functions of medical alert systems. The system can work in different operation modes according to the received commands, as illustrated in Fig. 49. In the single detection mode, one of the four sensors would be selected according to the received command and the signals from the selected sensor would be continuously monitored at higher sampling-rate. In the cyclic detection mode, the reconfigurable sensor readout circuit would process the four types of sensor signals sequentially and periodically to deliver the corresponding output voltages by time-division multiplexing (TDM). Moreover, the system can operate in the alarm mode to save the power consumption, which is suitable for low power applications. In the alarm mode, wireless transmission would not be turned on until an abnormal condition of the human body is detected, which dramatically reduces the average power consumption since the wireless circuitry is usually the most power-hungry building block in a medical implant. (The wireless transmitter in this system consumes up to 81 % of the total power.) Abnormal conditions can be defined by those in which the readout circuit delivers output voltages that either exceed or fall below specified thresholds (>VTH’H or <VTH’L). For example, the blood glucose levels of diabetes patients might get abnormal under many conditions in which the alarms would be activated to turn on the wireless circuitry for a while till the blood glucose levels return to the normal range. The thresholds can be remotely adjusted by users or physicians to achieve customized detection.

Fig. 49
figure 49

Illustrations of the three operation modes [5]

3.4.1 Energy Harvesting Interface

The schematic of the dual-input energy harvesting interface circuit is depicted in Fig. 50. Instead of far-field antenna radiation at UHF bands [35], near-filed inductive coupling at 1 MHz is adopted for RF powering due to its characteristics such as the potentially larger input voltage for the rectifier, weaker interference from nearby, and the lower propagation loss inside the human body. The rectifier is formed with four MOSFET switches to minimize the turn-on voltage [36]. Notably, since a switch conducts current in both directions, an unwanted reverse current would be generated during the rectifying process. Therefore, the rectifier is realized by using a two-way configuration [37], where the two NMOSs function as switches driven by differential input voltages while the two diode-connected PMOSs alternatively perform rectifying for half of each cycle. The substrates of PMOSs and NMOSs are weakly connected to the rectifier output voltage VRECT and the ground via the resistors RBP and the substrate resistors, respectively, to mitigate the reverse recovery currents through the PN junctions in the substrates. To recover the data from the OOK modulated RF signals, an envelope detector comprising a diode-connected NMOS, a parallel RC network, and a voltage comparator is employed to perform the demodulation. A shunt capacitor is incorporated with the coil to form a LC tuned network to optimize the input impedance so that the input RF amplitude can be maximized. Due to the impedance matching and the small threshold voltage of NMOS, the demodulator can handle the minimum input signal level of −30 dBm at the data rate of 2.4 kbps. To combine the voltages from the two transducers, a simple and high-efficiency (Max. 92 %) switched-capacitor voltage combiner is adopted. Let V1 and V2 represent the voltages from the solar cell and the rectifier, respectively. The operation mechanism of the voltage combiner is based on charge redistribution. Each clock cycle of the switched capacitor circuit is separated into two operation modes in which the switches would be configured as follows. In one mode, V1 is sampled and stored in C1. In the other mode, C1 is connected between the output terminals the rectifier and the combiner. After a number (=N) of cycles, the output voltage of the combiner (VCOMB) can be presented as:

$$\begin{array}{lll} {V}_{COMB}\left[N\right]&=\left(V1+V2\right)\cdot \frac{C1}{C1+C2}+{V}_{COMB}\left[N-1\right]\cdot \frac{C2}{C1+C2}\nonumber\\ &=\frac{\left(V1+V2\right)\cdot C1}{C1+C2}\cdot \left[1+\left(\frac{C2}{C1+C2}\right)+\cdots +{\left(\frac{C2}{C1+C2}\right)}^{N-1}\right]\end{array}$$
(2)

By adopting identical capacitors C1 and C2, the combiner would eventually deliver an output voltage of V1 + V2 after a sufficiently large number of cycles to achieve voltage combining. It is worth mentioning that a current may flow back from the voltage combiner to the rectifier if the weak input power of the rectifier results in that VCOMB > V2. To prevent this potential reverse current, the intrinsic diode of the PMOS in the RF-DC rectifier is connected to the output terminal of the rectifier.

Fig. 50
figure 50

Schematic of the dual-input energy harvesting interface [5]

In case that the voltage generated from the combiner may not be high enough to charge the battery effectively, the voltage VCOMB is further stepped up by a boost switching regulator. Pulse frequency modulation (PFM) can dynamically adjust the switching rate and hence achieve the lower switching loss under light load conditions, as compared with pulse width modulation (PWM). Apparently, the PFM boost regulator is more suitable for low-power applications and therefore adopted in this sensor SoC. The schematic of the PFM boost regulator is depicted in Fig. 51. The PFM switching control circuitry consists of a resistive voltage divider (R1 and R2), a hysteresis comparator, and a ring oscillator with the fixed frequency of 1 MHz. By dynamically turning on the oscillator, the number of pulses can be increased (or decreased) to raise (or reduce) the output voltage (VBOOST). Notably, the frequency of the oscillator is effectively set to zero when the oscillator is turned off. Through the hysteresis comparator, the output of the voltage divider would be compared with a reference voltage (VREF = 0.9 V) to determine whether the oscillator is turned on to raise the output voltage or not. Based on the voltage regulation mechanism, the output voltage would eventually settle down around the level defined by

Fig. 51
figure 51

Schematic of the PFM boost regulator [5]

$$ {V}_{BOOST}=\left(1+\raisebox{1ex}{${R}_1$}\!\left/ \!\raisebox{-1ex}{${R}_2$}\right.\right)\cdot {V}_{REF} $$
(3)

The resistive voltage divider employs two identical resistors (R1 = R2) of 10 MΩ to obtain the output voltage of 1.8 V and the intrinsic power consumption of the energy harvesting interface is 45 μW at 1.8 V supply voltage. The duty cycle of the switching clock can also be adjusted to optimize the efficiency of the boost regulator in different input voltage ranges.

As previously mentioned, the voltage from the solar cell may not be high enough to activate the energy harvesting interface circuit. Similar problems often occur in self-powered systems with integrated transducers for energy harvesting. Previous studies attempted to adopt batteries, to apply higher initial voltages or RF powering [38] to kick-start the voltage boosters. However, these systems still rely on manual intervention with additional external powering sources and hence fail to be truly self-powered. In order to achieve a self-powered system, a low-voltage (0.5 V) start-up circuit that can be activated solely by the solar cell (<0.7 V) is adopted to provide a stepped-up voltage to kick-start the operation of the energy harvesting interface. The schematic of this start-up circuit is shown in Fig. 52. Due to the weak inversion operation, the low-voltage clock generator and the clock booster can operate at a supply voltage of 0.5 V. The clock booster doubles the amplitude of the clock signal (CLK) from the low-voltage clock generator. Then the clock signal (CLKB) with sufficiently large amplitude is able to drive the switch in a step-up boost converter which would generate a boosted voltage stored in C1 to provide the start-up voltage (VSTART). As VSTART exceeds 1.8 V, the power-on detector applies the start-up voltage VSTART to the primary energy harvesting interface and disables the start-up circuit by turning off the clock generator at the same time. The start-up circuit dissipates an intrinsic power of 2.3 μW from the 0.7-V supply. In particular, the energy interface circuit adopts large-size switches (W/L = 2,000/0.5 μm) to reduce the turn-on resistance (4 Ω) and power loss. To drive these large-size switches whose intrinsic gate capacitance may be up to 5 pF, strong clock buffers with the setup time of 5.5 ns are adopted.

Fig. 52
figure 52

Schematic of the low-voltage start-up circuit [5]

3.4.2 Low-Power OOK Transmitter

The wireless circuitry tends to be more power-hungry than other building blocks due to its high operating frequency. To reduce the average power, OOK modulation scheme is adopted so that the transmitter consumes the least power during the transmission of a “zero”. The OOK transmitter in the previous work [1] consumes a large power (11.9 mW) due to the inefficient power amplifier architecture. To achieve the better efficiency, the power amplifier is modified into the configuration of inverter stages in cascade. The OOK transmitter comprises a voltage-controlled ring oscillator and the inverter-type power amplifier (PA) [39], as depicted in Fig. 53. The ring oscillator generates the required carrier signal and is switched on/off by the DATA input to realize the OOK modulation. The carrier frequency (fOSC) can be expressed by

$$ {f}_{OSC}=\frac{1}{2\cdot N\cdot \tau }=\frac{I}{2\cdot N\cdot V_{OSC}\cdot {C}_g}, $$
(4)

where N is the number of stages, τ is the delay for each stage, VOSC is the oscillation amplitude, Cg is the gate capacitance, and I is the current through each stage. To reduce the power consumption, the oscillator adopts small size transistors to minimize the gate capacitance Cg so that the oscillation at the desired frequency can be achieved with a lower current. Notably, one of the delay cells in the oscillator is realized by a NAND gate so that the oscillator is turned on/off by the data input of 1/0 to perform the OOK modulation. Through adjusting the equivalent resistance of PMOSs M1 and M2, the current through the oscillator as well as the oscillation frequency can be controlled by the voltage VTUNE. The overall power consumption of this OOK transmitter is 762 μW.

Fig. 53
figure 53

Schematic of the low-power OOK transmitter [5]

3.4.3 Experiment Results

This self-powered reconfigurable multi-sensor SoC was fabricated in the standard TSMC 0.35-μm CMOS process followed by necessary post-IC processes. The chip micrograph is shown in Fig. 54, along with its side view after post-IC processes. The chip consumes an area of 3 mm × 3.75 mm. After the post-IC processes, the MEMS glucose sensor is stacked on this CMOS chip. For the sake of the post-process compatibility, the nano-wire protein sensor needs to be fabricated before the MEMS glucose sensor is implemented. The bonding wires and pads were carefully insulated by AB glue to avoid electrical short circuit during the experiments when the chip would be immersed into liquid solutions. On the contrary, the sensing areas of the on-chip sensors cannot be covered by the AB glue or anything else since these areas need to be exposed to the solutions. To ease the insulation procedure, all the sensors are placed at least 300 μm away from the bonding pads.

Fig. 54
figure 54

(a) Chip photo and (b) side view of the chip after post-IC process [5]

The integration of the analog building blocks including the reconfigurable multi-sensor interface, the PGA and the 10-bit SAR ADC is verified by using instruments or built-in devices to provide the four types of input signals. The sampling frequency of the sensor interface was set to 200 Hz. For each type of signal, the input range during the measurement is wider than the estimated output signal range for each sensor. The output voltages obtained from the readout circuit (left axis) and the digital output results delivered by the ADC (right axis) were simultaneously recorded, as shown in Fig. 55a–d. Within the input range of each signal, the sensor interface exhibits a coefficient of determination (R2) close to unity, indicating that a linear conversion from each type of signal to a voltage is achieved. In other words, the circuitry can handle the sensor signals faithfully. The conversion for resistance input signals shows the worst linearity than the conversions for other types of input signals, because resistance signals go through the additional conversion of the Wheatstone bridge.

Fig. 55
figure 55

Measured results: (a) capacitance, (b) resistance, (c) current, and (d) voltage detection [5]

Figure 56 show the measurement results obtained from the reconfigurable sensor interface and the ADC during the in vitro experiments with on-chip sensors. During these experiments, the chip was covered by AB glue, except for the exposed sensing area which was surrounded by a fluid channel. Then the phosphate buffered saline (PBS) buffer with pH = 7 was injected into the channel to initialize the test suite. Whenever a new detection process began, both the chip and the channel would be cleaned by the PBS buffer before the sample under test was injected. The data was recorded in all the procedures including the cleaning phase. Glucose sensor tests were performed on five samples with different concentrations, where the data was recorded for 15 min in each case. For the glucose concentration range from 4 to 8 mM, the output voltage rises quasi-linearly with the glucose concentration at the sensitivity of 69 mV/mM, as shown in Fig. 56a. In the protein sensor test, cardiac protein Troponin-I was chosen as the target proteins to evaluate the feasibility of the system in heart disease detection. Four protein sensor tests were performed under different concentrations for the duration of 20 min.

Fig. 56
figure 56

In vitro experimental results obtained from the sensor interface and the ADC for: (a) glucose, (b) protein, and (c) temperature detection [5]

Technically, the system can successfully identify the troponin-I protein according to Fig. 56b, where the readout delivers the voltage change of 6.8 % in response to the protein concentration of 300 fM. Finally, to test the on-chip band-gap temperature sensor, the chip was placed in a temperature chamber with the temperature varied from −20 to 120 °C in 14 steps. Particularly, the data was recorded after the temperature of the chamber became stable enough for each temperature point which took 30 min to achieve the accuracy of 1 °C. As shown in Fig. 56c, the output voltage is a linear function of the temperature with the sensitivity of 3.78 mV/°C.

The energy conversion efficiencies (η) of the energy harvesting interface circuit and its individual building blocks were evaluated for various load conditions. It took about 5 min to perform the measurement and data recording for each load condition. As shown in Fig. 57, the SC voltage combiner achieves the maximum efficiency of 92 % at the 10-kΩ load (Pin = 150 μW), while the PFM boost regulator achieves 82 % at the 1-kΩ load (Pin = 4 mW). The maximum efficiency of the whole energy harvesting interface reaches 73 % at the 1-kΩ load (Pin = 2.4 mW) which falls in the vicinity of the equivalent resistance (3.4 kΩ) of the entire wireless multi-sensor system.

Fig. 57
figure 57

Measured conversion efficiency of the energy harvesting interface [5]

The function of the whole energy harvesting interface is verified by simultaneously observing the output waveforms of the solar cell, the RF-DC rectifier, the voltage combiner, and the boost regulator with the oscilloscope, as shown in Fig. 58. After the RF power (2.1 mW) and the sunlight (1.36 mW/mm2) were applied to this system, output voltages of the solar cell and the RF-DC rectifier gradually came to the dc voltages around 0.5 V. In one second, the voltage combiner successfully combined the two voltages into the dc voltage of 1 V which was upgraded to 1.8 V in the boost regulator in the meanwhile. Technically, the system operation can entirely rely on the solar cell due to the low-voltage start-up circuit and the boost regulator, namely, the system would autonomously power itself once the light shines on it.

Fig. 58
figure 58

Measured waveforms of energy harvesting process [5]

The performance summary of the chip is listed in Table 3. The chart at the left-hand side of Fig. 59 illustrates the power breakdown of the system excluding the energy harvesting interface circuitry. The wireless transmitter consumes 762 μW, equal to 81 % of the total power consumption (942.9 μW). Practically, the system would better operate in the alarm mode to reduce the average power consumption, as previously mentioned. The power breakdown of the system in the alarm mode is illustrated at the right-hand side of Fig. 59, showing that the resistive sensor consumes most of the power (80 %).

Table 3 Performance summary
Fig. 59
figure 59

Power distribution of the entire system [5]