Keywords

1 Introduction

Over the past couple of decades, silicon technology has dominated the semiconductor industry and the major factors responsible for it, besides easy availability, and excellent oxide properties have been the scalability of Si devices. However, the aggressive demands on device and circuits parameters which are being set by the wireless communication sector in the microwave and RF region will soon appear to be out of reach of Si-based devices whose parameters are close to their theoretical maxima. Moreover, relatively lower values saturation velocity besides a low carrier mobility precludes silicon as the material of choice for modern high speed switching applications. Over the last decade, the continuous strife for miniaturization has led to an exponential increase in the power density of semiconductor electronics. Besides the obvious bottlenecks due to short-channel effects and leakage current due to tunneling, the average operating temperature of devices has sharply increased due to the combined effects of high frequency switching and lower surface area per device. However, it is very much problematic to use silicon electronics device as a power device because of its temperature constraint. Hence, the focus of device scientists on new compound semiconductors which include group III–V materials, silicon–carbide, and silicon–germanium. In the last two-decade, group III-nitride semiconductors and in particular gallium nitride (GaN), and its associated alloys, have emerged as the most promising nitride semiconductor for commercial applications, especially in the field of optoelectronic and high-power devices due to its inherent material properties. Indeed, GaN has a larger breakdown field (20 MV/cm) [1] than GaAs (4 MV/cm) and Si (3 MV/cm) and also high peak electron velocity [2] of 3 × 107 cm/s as compared to GaAs (2 × 107 cm/s) and Si. The acceptability of GaN technology to the stringent military as well as commercial sector owes itself the superior electron transport properties of GaN. However, widespread acceptability cannot be achieved unless some bottlenecks such as drain current collapse and other reliability problems [3,4,5] are overcome.

As we move further into the DSM regime, effective control of channel is an area of concern. As per the roadmap provided by ITRS, the effects associated with short channel together with the stringent leakage requirements for devices beyond 32 nm technology node will seriously impede further developments using planar devices. Multigate devices like tri-gate transistor or fin-shaped field effect transistor appear to be one of the most promising devices below the 20 nm technology node, as the effective increase in the inversion layer owing to multiple gates leads to a better channel control. The gate-all-around architecture provided by FinFET suppresses the short-channel effects (SCE) while achieving high trans conductance value and lower subthreshold swing [6,7,8]. Miniaturization of the components and low energy consumption makes it possible to use them as switching power supplies, amplifiers, frequency converters in electronic equipment [9, 10], sensors [11,12,13], as well as high frequency switching generators and modulators in medical surgical devices for high frequency and ultrasonic welding of biological tissues.

In this study, the proposed structure is simulated with two different channel materials, i.e., GaN and Si. An LDD doping profile has been chosen. The parameters varied are temperature and gate material, and different figures of merit of relevance, namely ION/IOFF ratio, threshold voltage, leakage current, saturation current, and subthreshold slope have been calculated from the simulation data.

This paper is organized as follows. In Sect. 2, the simulation model is described. The simulated results of GaN-based n-channel TG-FinFET are analyzed and discussed in Sect. 3, and Sect. 4 discusses the significance of the study.

2 Materials and Methods

2.1 FinFET

In this work, a model of GaN-based FinFET structure is considered for the simulated study by Atlas of Silvaco_TCAD device simulator. An SOI FinFET is the chosen structure for simulation. While the larger gate area leads to a better control, the SOI structure helps in the elimination of parasitic capacitance leading to a better high-frequency response. Moreover, due to BOX layer, there is no unwanted leakage paths which are far from the gate and lesser effect of back-gate leading to lower power consumption. A major drawback of SOI structure is self-heating as the silicon oxide substrate prevents heat dissipation. However, the better thermal properties of the chosen material GaN make this structure better suited for it than Si.

The simulated device structure of the n-channel TG (Tri gate) FinFET, used in this study, is shown in Fig. 1. A buried oxide thickness (TBOX) of 50 nm has been used.

Fig. 1
figure 1

TG-FinFET structure (2D and 3D view)

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The device consists of a Si fin of rectangular cross-sectional wrapped around the channel which terminates in the source and drain regions at both ends. The inversion current is controlled by the polarization charge on gate oxide which forms the interface between the channel and the fin. Thus, the output drain current is a function of gate and drain bias voltages.

2.2 Simulation Method

All simulations of this work have been carried out using ATLAS SILVACO TCAD, 3D simulation. Basic parameters of this n-channel TG-FinFET structure are presented in Table 1.

Table 1 Basic parameters used for SOI TG-FinFET
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A Gaussian doping profile has been used for the channel region. In this entire simulation procedure, work function of gate electrode is assumed as 4.6 eV. Solution method applied is Gummel Newton. For carrier statistics, instead of the default Boltzmann statistics, we have used Fermi to account for reduced carrier concentrations in heavily doped regions. As this study considers the effects of high temperature, the energy exchange with the surrounding lattice environment through carrier heating and through generation-recombination processes need to be taken into account. To take account of the recombination effects, the leakage currents that owe their origin to thermal generation are simulated by the Shockley–Read–Hall (SRH) model while consrh accounts for concentration dependent lifetimes. Auger is used to account for recombination at high current densities and high-level injection effects. The Auger recombination rate is reduced at higher values of carrier density as the inter-carrier interactions become more significant. Experimental work has shown that in heavy doped regions SOI MOSFET starts behaving like a bipolar transistor as the pn product becomes doping dependent, and bandgap narrowing occurs; BGN accounts for this effect. The quantum mechanical effect of carrier confinement at the gate oxide interface in MOSFETs is accounted for by the correction given by Hansch (Model HANSCHQM).

3 Simulation and Results

In this section, the simulated results of n-channel TG-FinFET with different channel materials, various dielectric materials, different types of channel doping, and temperature variations are analyzed and discussed in detail.

3.1 Variation in Channel Material

Figure 2 shows the variation of drain current with the increment of gate voltage for silicon (Si) and gallium nitride (GaN) channel TG-FinFET. Here, the DC voltage is applied to the gate terminal which is varied from 0 to 1 V with the drain bias fixed at VDS = 1 V.

Fig. 2
figure 2

ID–VG curve for n-channel TG-FinFET (uniform doping) with different channel materials

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The transfer characteristics show that the higher mobility of GaN translates to a higher ON current than Si. This makes such GaN-based field effect devices a better choice for power-electronics circuits where a higher drive current is required.

3.2 Variation in Drain Doping Profile

Various works have been done on the effects of gradation of doping of field effect devices in the channel region [14,15,16,17]. The gradation may be deliberate or an undesired consequence of the implantation process. However, in this study, it was observed that replacement of a uniform doping profile with a Gaussian one in the channel region led to an insignificant change. This could be a consequence of the light doping and tight control of the channel region by the surrounding gate structure. However, the source and drain regions are highly doped, and FinFET devices with LDD implantation have been reported [15] to exhibit better electrostatic characteristics resulting in reduced values of subthreshold slope and DIBL. In this study, also, the effect of an LDD doping profile (Fig. 3) was studied, and the transfer characteristics show a notable improvement for GaN though the effect is less pronounced for the Si channel device (Fig. 4).

Fig. 3
figure 3

Doping profile of LDD region

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Fig. 4
figure 4

ID–VG curve for n-channel TG-FinFET with LDD region

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3.3 Dielectric Material Variation

Simulations were done to study the outcome of gate dielectric material on the output of both GaN and Si-channel devices. It can be seen that in both the cases GaN channel-based field effect device produces more current than silicon channel-based device and significantly reduction in threshold voltage also. The different dielectric materials used were aluminum oxide (Al2O3), hafnium oxide (HfO2), silicon nitride (Si3N4), and zirconium dioxide (ZrO2) in contrast with the silicon dioxide (SiO2). Figure 5 shows the simulated result.

Fig. 5
figure 5

ID–VG characteristics (GaN channel TG-FinFET) for different dielectric materials

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Extracted parameters from the simulations are given in Table 2. From the comparison shown in the Table 2, it can be noted that with the decreasing value of dielectric constant of different dielectric material the value of the threshold voltage is decreased. The value of maximum saturation drain current IDSmax is also decreased, whereas the value of leakage current is increased. Furthermore, it is observed that the value of threshold voltage for all kind of dielectric material used in GaN channel-based TG-FinFET is lower than that of the Si channel-based TG-FinFET. The sensitivity to dielectric material [17] can be explained as follows:

Table 2 Extracted parameter value for n-channel TG-FinFET
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The drain current in the subthreshold region has an exponential dependence of the form \({\text{exp }}\left( {{\raise0.7ex\hbox{${v_{{\text{gs}}} }$} \!\mathord{\left/ {\vphantom {{v_{{\text{gs}}} } {nVT}}}\right.\kern-\nulldelimiterspace}\!\lower0.7ex\hbox{${nVT}$}}} \right)\) which results a relation for subthreshold voltage

$$S = nVT\ln \left( {10} \right) \,{\text{where}}\,n = \left( {1 + \frac{{C_{\text{b}} }}{{C_{\text{g}} }}} \right)\,,\,C_{\text{b}} = {\raise0.7ex\hbox{${\smallint Si}$} \!\mathord{\left/ {\vphantom {{\smallint Si} {w_{\text{d}} }}}\right.\kern-\nulldelimiterspace}\!\lower0.7ex\hbox{${w_{\text{d}} }$}}\,,\,C_{\text{g}} = {\raise0.7ex\hbox{${\smallint_{ox} }$} \!\mathord{\left/ {\vphantom {{\smallint_{ox} } {t_{{\text{ox}}} }}}\right.\kern-\nulldelimiterspace}\!\lower0.7ex\hbox{${t_{{\text{ox}}} }$}}$$

Now, as HfO2 has the higher dielectric constant, there will be an increment in oxide capacitance which translates to a lower value of n. Thus, a higher value dielectric constant of gate oxide helps the subthreshold slope to approach its ideal value. The lower leakage current can be accounted for by the decrease in threshold voltage.

A very significant observation is given in Table 3. Table 3 provides the data for percentage change in threshold voltage with variable dielectric material, in this case GaN taken as the primary material for this study, whereas silicon data are used as a comparison. The percentage change in threshold voltage with dielectric constant is much more for GaN than Si. Over the past decade, a significant amount of work [18,19,20,21,22] has been done on the use of field effect devices as a biosensor. The increased sensitivity of GaN-based device to dielectric variation makes it a promising candidate for use as a detector of biologically relevant substances.

Table 3 Percentage change in threshold voltage with dielectric
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3.4 Temperature Variation

Applicability of group III-nitride-based devices for high-frequency, power, and temperature applications is well documented [22,23,24,25]. Therefore, for device optimization, self-heating effect and ambient temperature effect of a device are such a thing that can be studied to establish its suitability as a power electronic device. In this work, the transfer characteristics of GaN FINFET have been studied for temperatures ranging from 300 to 600 °K. From the result plotted in Fig. 6 it can be concluded that with the variation of the temperature the saturation drain current decreases with the increasing temperature. Furthermore, if the ratio of Ion/Ioff is considered, significant phenomena is being noticed. With the increasing temperature, the ratio of Ion/Ioff decreases more sharply in case of silicon channel device compared to GaN channel device. This comparison is plotted in Fig. 7. It may be observed that the sensitivity of Ion/Ioff ratio to temperature is much lower for GaN as compared to Si over the measured temperature range. This indicates the issue of degradation of performance with temperature is much lower for GaN making it a promising candidate for devices with high-power density.

Fig. 6
figure 6

Temperature variation in transfer characteristics for n-channel (GaN) TG-FinFET

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Fig. 7
figure 7

Variation in ION/IOFF ratio with temperature for different channel material

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4 Conclusion

A survey of existing scientific reports shows that the existing work on GaN has been limited to HEMT-based devices. The wafer technology of GaN is not mature that coupled with the technologically challenging HEMT structure does not encourage its acceptance as a mass-scale replacement for Si. The objective of this study was to show its suitability as simple field effect device vis-à-vis silicon without taking into consideration the piezoelectric advantage associated with the AlGaN/GaN heterostructure. The SOI n-channel TG-FinFET structure is successfully designed and simulated by the influence of different channel material, lightly doped drain profile, and temperature variation. It has been shown that the GaN channel devices provide a higher ON current and lower threshold voltage though its leakage current and subthreshold performance lag behind silicon. Moreover, the temperature sensitivity of GaN is much lower than Si FinFET indicating its suitability for high-power density devices. Perhaps, the most interesting outcome of this study has been the observation of a significantly enhanced sensitivity of threshold voltage of GaN FINFET to dielectric variation as compared to Si. This has promising implications by way of application as a biosensor. In future, this work will be extended to study the switching performance of such devices as well its sensitivity to variations in structural parameters.