Keywords

1 Introduction

Since few decades, active devices [1] are mostly used in analog signal processing. These are also used in filter, oscillator, instrumentation amplifier, inductance simulator and so on. These active blocks can be categorized as either voltage mode or current mode. In voltage mode, technique information is represented in the form of voltage, whereas in current mode, technique information is represented as current signal. Nowadays, current mode (CM) technique-based circuit design is preferred over voltage mode (VM) technique due to its inherent property of large bandwidth, high slew rate, simple circuitry, low power consumption, etc. Some of the most considered current mode active analog block is second generation current conveyor (CCII) [2,3,4,5,6], third generation current conveyor (CCIII) [7], current controlled current conveyor (CCCII) [8], differential voltage current conveyor (DVCC) [9,10,11], differential difference current conveyor (DDCC) [12,13,14,15], differential current conveyor (DCCII) [16], voltage differencing transconductance amplifier (VDTA) [17], modified current conveyor (MCCII) [18], dual-X second generation current conveyor (DXCCII) [19], fully differential second generation current conveyor (FDCCII) [20], current feedback operational amplifier (CFOA) [21], current feedback amplifier (CFA) [22], differential voltage extra-X current controlled current conveyor (DV-EXCCCII) [23], operational transresistance amplifier (OTRA) [24] and many more.

Analog filter employing these analog building blocks (ABB) enhances filter performance. Among all the filters, all-pass filter (APF) is one of the most important filter circuit. All-pass filter is needed where phase change between input and output signal is required while keeping its magnitude constant. APF is also known as phase shifter. In first order, APF phase varies from 0° to 180°. Several number of voltage mode APF using high-performance analog blocks are reported in the literature.

Proposed voltage mode APF is based on single DV-EXCCCII [25] and single capacitor. Two APF circuit can be designed from the same circuit topology only by changing position of input and output signals. Both filter circuits provide same transfer function for APF. No matching of components is required to realize filter response. Pole frequency of proposed APF can be varied by changing the bias current of DV-EXCCCII so presented filter is electronically tunable.

This paper is organized in the following manner: Introduction of proposed work is summarized in Sect. 1 of the paper. Proposed filter design and analysis is given in Sect. 2. Non-ideal analysis and sensitivities caused by these non-idealities are also discussed in this part of the paper. In Sect. 3, proposed work is compared with previously reported work. Proposed filter is verified through simulation in Sect. 4. In Sect. 5, conclusion of the work is given.

2 Proposed Filter Analysis

2.1 Circuit Implementation

The electrical symbol for DV-EXCCCII is represented in Fig. 1 and circuit implementation is given in Fig. 2.

Fig. 1
figure 1

Symbol of DV-EXCCCII

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Fig. 2
figure 2

CMOS representation of DV-EXCCCII

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Input and output signals relationship can be expressed by matrix given as follows.

$$\left[ {\begin{array}{*{20}c} {I_{Y1} } \\ {I_{Y2} } \\ {V_{X1} } \\ {V_{X2} } \\ {I_{Z1 \pm } } \\ {I_{Z2 \pm } } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} 0 & 0 & 0 & 0 & 0 & 0 \\ 0 & 0 & 0 & 0 & 0 & 0 \\ 1 & { - 1} & {R_{X1} } & 0 & 0 & 0 \\ 1 & { - 1} & 0 & {R_{X2} } & 0 & 0 \\ 0 & 0 & { \pm 1} & 0 & 0 & 0 \\ 0 & 0 & 0 & { \pm 1} & 0 & 0 \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {V_{Y1} } \\ {V_{Y2} } \\ {I_{X1} } \\ {I_{X2} } \\ {V_{Z1} } \\ {V_{Z2} } \\ \end{array} } \right]$$
(1)

where Rx1 and Rx2 are internal resistance of current terminals X1 and X2, respectively. This resistance depends on the bias current I0 and can be expressed as

$$R_{X1} = R_{X2} = R_{X} = \frac{1}{{\sqrt {8\mu C_{0X} \left( \frac{W}{L} \right)} I_{{\text{o}}} }}$$
(2)

Here, µ is mobility of the charge carrier, Cox is oxide capacitance, W/L is aspect ratio and I0 is bias current of active block.

This DV-EXCCCII has two current terminals and two voltage terminals. Current terminals (X1, X2) are low input terminals, and voltage terminals (Y1, Y2) are high input terminals. All the output terminals (Z) of the block are high output current terminals. Plus sign (+) shows that current of X and Z terminals is in same phase and minus sign (−) shows that they are in opposite phase. As application demands, many number of Z terminals can be created.

Two circuit designs for VM all-pass filter are proposed based on DV-EXCCCII, and they are represented in Fig. 3. Both the circuits can be obtained from same circuit configuration only by interchanging input and output signals position. Single DV-EXCCCII and single capacitor are used in both circuits to realize the response for APF. Input voltage Vin is applied to obtain APF output at Vout terminal.

Fig. 3
figure 3

Proposed filter configuration a circuit 1; b circuit 2

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For both the circuits, same transfer function will be obtained and their expression can be given as

$$\frac{{V_{{{\text{out}}}} }}{{V_{{{\text{in}}}} }} = \frac{{R_{X} Cs - 1}}{{R_{X} Cs + 1}}$$
(3)

Above expression shows that matching of components is not needed to realize voltage mode all-pass filter transfer function for both circuit configurations.

Pole frequency can be given as

$$f_{o} = \frac{1}{{2\pi R_{X} C}}$$
(4)

Phase variation for both circuits can be expressed as

$$\phi = \pi - 2\tan^{ - 1} (\omega R_{X} C)$$
(5)

2.2 Non-ideal Behavior

Non-ideal behavior of DV-EXCCCII is explained here. Taking non-idealities of active block into consideration, port relationship of DV-EXCCCII is modified as

$$\left[ {\begin{array}{*{20}c} {I_{Y1} } \\ {I_{Y2} } \\ {V_{X1} } \\ {V_{X2} } \\ {I_{Z1 \pm } } \\ {I_{Z2 \pm } } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} 0 & 0 & 0 & 0 & 0 & 0 \\ 0 & 0 & 0 & 0 & 0 & 0 \\ {\beta_{11} } & { - \beta_{12} } & {R_{X1} } & 0 & 0 & 0 \\ {\beta_{21} } & { - \beta_{22} } & 0 & {R_{X2} } & 0 & 0 \\ 0 & 0 & { \pm \alpha_{1 \pm } } & 0 & 0 & 0 \\ 0 & 0 & 0 & { \pm \alpha_{2 \pm } } & 0 & 0 \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {V_{Y1} } \\ {V_{Y2} } \\ {I_{X1} } \\ {I_{X2} } \\ {V_{Z1} } \\ {V_{Z2} } \\ \end{array} } \right]$$
(6)

where β11, β12, β21, β22 are voltage transfer errors and α1±, α2± are current transfer errors. Considering these, coefficient filter expression is modified as

For Circuit 1:

$$\frac{{V_{{{\text{out}}}} }}{{V_{{{\text{in}}}} }} = \frac{{R_{X} Cs - \alpha_{1 + } }}{{R_{X} Cs + \beta_{12} \alpha_{1 + } }}$$
(7)

Modified pole frequency:

$$f_{0} = \frac{{\beta_{12} \alpha_{1 + } }}{{2\pi R_{X} C}}$$
(8)

Sensitivities due to non-ideality and passive components can be given as

$$S_{C}^{{f_{0} }} = S_{{R_{X} }}^{{f_{0} }} = - 1;\quad S_{{\beta_{12} }}^{{f_{0} }} = S_{{\alpha_{1 + } }}^{{f_{0} }} = 1;$$
(9)
$$S_{{\alpha_{1 - } }}^{{f_{0} }} = S_{{\alpha_{2 + } }}^{{f_{0} }} = S_{{\alpha_{2 - } }}^{{f_{0} }} = S_{{\beta_{11} }}^{{f_{0} }} = S_{{\beta_{21} }}^{{f_{0} }} = S_{{\beta_{22} }}^{{f_{0} }} = 0$$
(10)

It can be observed from (9) and (10) that sensitivities caused by non-idealities are low for circuit 1.

For Circuit 2:

$$\frac{{V_{{{\text{out}}}} }}{{V_{{{\text{in}}}} }} = \frac{{R_{X} Cs - \beta_{12} }}{{R_{X} Cs + 1}}$$
(11)

Pole frequency:

$$f_{0} = \frac{1}{{2\pi R_{X} C}}$$
(12)

Sensitivities due to non-ideality and passive components can be given as

$$S_{C}^{{f_{0} }} = S_{{R_{X} }}^{{f_{0} }} = - 1$$
(13)
$$\begin{aligned} fS_{{\alpha_{1 + } }}^{{f_{0} }} & = S_{{\alpha_{1 - } }}^{{f_{0} }} = S_{{\alpha_{2 + } }}^{{f_{0} }} = S_{{\alpha_{2 - } }}^{{f_{0} }} \\ & = S_{{\beta_{11} }}^{{f_{0} }} = S_{{\beta_{12} }}^{{f_{0} }} = S_{{\beta_{21} }}^{{f_{0} }} = S_{{\beta_{22} }}^{{f_{0} }} = 0 \\ \end{aligned}$$
(14)

It can be observed from (13) and (14) that sensitivities caused by non-idealities are zero for circuit 2.

3 Comparative Research

Several high-performance analog building blocks (ABB) are reported in the literature. Using these high-performance active blocks, many number of first-order voltage mode APF are discussed previously. In this section of the paper, comparison of presented work with previously reported work is given. In [11], differential voltage current conveyor-based first-order VM APF is reported. In this paper, two DVCC, one resistor and one capacitor are used. Matching condition is not required to realize filter response. Electronic tunable property is absent in this filter. Differential difference current conveyor-based filter is reported in [13]. This filter also uses two DDCC and four passive components due to which circuit becomes complex. Matching is not required for filter realization, and filter is not electronically tunable. Filter given in [16, 18, 19] uses single active element but passive components used are large in number. In these filters, matching of components is required for APF realization. These are not electronically tunable filters. APF reported in [14] employed two DDCC and four passive components. Component matching is required in this filter. Single FDCCII-based APF is presented in [20]. It uses single resistor and single capacitor to obtain all-pass filter response without matching constraints. Single DDCC-based filter employed one resistor, and one capacitor is reported in [15] without matching of components. In many reported work, electronically tunable property is missing.

Proposed filter is resistor-less and uses one DV-EXCCCII and single capacitor. Matching of components is not needed to obtain all-pass response. This filter is electronically tunable so response can be changed with bias current of the DV-EXCCCII. Comparison of proposed filter with already available first-order VM all-pass filters is summarized in Table 1.

Table 1 Comparison of proposed filter with previously reported filter
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4 Simulation Results

To prove the analyzed theory, proposed voltage mode first-order APF is simulated taking UMC 180 nm CMOS parameters through SPECTRE simulator of CADENCE VIRTUOSO. Supply voltage ± 0.9 V is used for simulation. Proposed APF is designed for f0 = 3.9 MHz using C = 50 pF. Bias current of DV-EXCCCII is taken as I0 = 100 µA, and for this value of bias current, intrinsic impedance of active block at current terminals X1 and X2 is found to be RX1 = RX2 = 813 Ω.

Gain and phase response of filter is presented in Fig. 4. It can be seen from response that magnitude is constant with frequency variation. Phase of proposed filter is changing from 180° to 0°.

Fig. 4
figure 4

Magnitude response for first-order APF

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Proposed filter is electronically tunable with internal current (I0) of DV-EXCCCII. Electronic tunable property of the filter is represented in Fig. 5. Pole frequency of both the filter circuit configurations can be varied with internal bias current of the DV-EXCCCII. To verify this property of the all-pass filter, phase response is shown at 20 µA, 40 µA, 60 µA and 100 µA of bias current and pole frequency is obtained as 1.7 MHz, 2.8 MHz, 3.2 MHz, 3.95 MHz, respectively.

Fig. 5
figure 5

Phase variation in APF at different I0

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Transient behavior of the proposed APF is shown in Fig. 6. To obtain time domain response, 50 mV peak-to-peak input voltage is applied at 3.9 MHz frequency. It can be observed from response that output voltage is 900 phase shifted with input at pole frequency which verifies theoretical analysis.

Fig. 6
figure 6

Time domain input and output signal of APF

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5 Conclusion

In this paper, resistor-less first-order voltage mode APF using DV-EXCCCII is reported. Two APF circuits can be obtained from same configuration just by interchanging the position of the input and output signal. Single DV-EXCCCII and single capacitor are employed to realize APF without requirement of matching of components. Filter has capability of electronic tuning so frequency can be varied by changing internal current (I0) of DV-EXCCCII. Proposed topology is simulated by taking UMC 180 nm CMOS parameters with supply voltage of ± 0.9 V to verify theoretical analysis.