Abstract
This paper presents a new dimension ordered routing algorithm for Mesh-of-Tree (MoT) based Network-on-Chip (NoC) designs. The algorithm has been theoretically proved to be deadlock, live-lock and starvation free. It also ensures shortest-path routing for the packets. The simplified algorithm, compared to the previously published works, provides same throughput and average latency measures, at a lesser hardware overhead (about 61% for routers, 46% for links, and 44% in total) due to possible reduction in the minimum flit-size. It allows us to vary router complexity more flexibly while planning the MoT based NoC for application specific System-on-Chip (SoC) synthesis.
This work is partially supported by Department of Science and Technology, Govt. of India (SR/S3/EECE/0012/2009), Dt 20th May, 2009.
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Manna, K., Chattopadhyay, S., Gupta, I.S. (2011). A Novel Deadlock-Free Shortest-Path Dimension Order Routing Algorithm for Mesh-of-Tree Based Network-on-Chip Architecture. In: Meghanathan, N., Kaushik, B.K., Nagamalai, D. (eds) Advances in Computer Science and Information Technology. CCSIT 2011. Communications in Computer and Information Science, vol 131. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-17857-3_17
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DOI: https://doi.org/10.1007/978-3-642-17857-3_17
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