CDF: The World’s Largest Silicon Detector in the 20th Century; the First Silicon Detector at a Hadron Collider

Abstract

The Collider Detector at Fermilab (CDF) is situated in Batavia, Illinois near Chicago. CDF is one of the two multi purpose detectors at the TEVATRON proton–antiproton collider at the Fermi National Accelerator Laboratories (FNAL).

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The Collider Detector at Fermilab CDF is situated in Batavia, Illinois near Chicago. CDF is one of the two multi purpose detectors¹ at the TEVATRON proton–antiproton collider at the Fermi National Accelerator Laboratories FNAL. Figure 5.1 shows the CDF detector configuration for RUN II operating since 2000—a conventional multi purpose hadron collider detector. The beryllium beam pipe is naturally located in the centre followed by the inner tracking system consisting of three silicon sub detectors, Layer 00, SVX II and ISL, surrounded by the open cell drift chamber. The tracking volume rests completely inside the 1.41 T solenoid. The calorimeter, divided into the electromagnetic and hadronic part, is located outside of the solenoid. The drift chambers for muon detection are situated outside of the solenoid return yoke. The tracking system was largely increased for the RUN II upgrade, the silicon barrel detector’s length increased to almost 2 m to cover a pseudorapidity² ${\vert \eta \le 2\vert }$ without any endcap structure. This chapter describes solely the tracking detectors of CDF, starting with the historical evolution and focusing on the RUN II configuration.

5.1 Historical Evolution of the CDF Vertex Detector

Already at the time of NA11 and in the early design phases of DELPHI, the CDF collaboration had preliminary ideas on the use of silicon as a luminosity monitor inside the vacuum beam pipe or as forward detectors ([28, 214] 1983). The first CDF proposal of a silicon vertex detector to improve tracking resolution and to allow the tagging of heavy quarks was written up in 1985 [27]. Since the successful MX chips from the LEP experiments were tuned to low load capacitances they were not directly applicable for CDF with longer module design thus higher load capacitance. Also, bunch crossings every 3.5 $\upmu$s made pulsed powering impossible. This led 1989  –  1990 to the development of the first SVX chip – refer also to Sect. 1.10 on p. 96f. It contained 128 channels with double-correlated sampling and sparsification . The first chip version worked also in quadruple sampling mode since the sensors were DC coupled and the constant leakage current had to be subtracted. More radiation-tolerant chip versions with integrated ADC and optimized for shorter beam crossings followed, with later chip iterations culminating in the SVX3 chip used for the upgrade in 2000. Cooling and mechanics of the detector were constructed in Pisa and FNAL, while all hybrids and modules were assembled at Berkeley. The expertise gathered in the operation of SVX in 1992  –  1993 led then to the SVX$^{\prime }$, which was in operation from 1993 to 1996. The first silicon sensors were produced on 4 in. wafers with DC coupling since AC coupling had not yet matured during the design phase; it was introduced at LEP. To underline the pioneering aspect of the first vertex detector design and construction I like to cite Nicola Bacchetta:

Fig. 5.1

Elevation view of half of the CDF II detector [61, 332]

I think the SVX was never really a formally approved project for CDF, but rather a prototype to prove the concept. Vertexing with silicon sensors was not considered viable at hadron collider. I recall vividly people being very skeptical about all the effort ...many others claiming at such radius the detector would be completely lit (100% occupied) all the time. It turned out not to be the case.

Design criteria were similar to the LEP experiments but also additional aspects are important:

• to obtain the best impact parameter resolution , a high precision point was needed as close as possible to the interaction point together with a precision link space point or better track segment to the outer drift chamber³

• in contrast to the LEP experiments in the TEVATRON, a hadron collider, the interaction region is longitudinally stretched with a $\sigma _Z$ of 35 cm. This requires a long detector to cover as much as possible of the interaction

• reducing multiple scattering to the bare minimum, the material budget must be minimized

• the mechanical tolerances internally must match the intrinsic detector resolution, i.e. about 10 $\upmu$m, while the accurate placement with respect to the outer detector must match the resolution of the surrounding drift chamber

Fig. 5.2

SVX, the first vertex detector at a hadron collider, an isometric view. The consequent implementation of a wedge geometry made it necessary to have different sensor geometries per layer with different widths but same lengths. Two barrels with four layers cover 51 cm in length. Each ladder consists of three sensors with one beryllium hybrid carrying the SVX chips at the end [122]

The SVX silicon detector (1992  –  1993) consisted of two barrels with four layers, single-sided, DC-coupled silicon sensors and non-radiation tolerant electronic chips, produced in 3.5 $\upmu$m feature size. A full description can be found in [122] and a schematic view is shown in Fig. 5.2.

The four layers were situated at $R =$2.8, 4.3, 5.7, 7.8 cm. Information was $R\phi$ only. The barrels stretched to a total length of 51 cm covered around 60% of all ${p\bar{p}}$ collisions of the TEVATRON. Three silicon microstrip sensors, 8.5 cm long and 300 $\upmu$m thick, were glued on a low-weight Rohacel bar with a readout hybrid at the end forming a 25.6 cm long module/ladder. To adapt circumference differences for different layers while keeping a perfect wedge layout, the sensor widths were adapted. In total 96 ladders with 288 sensors were implemented. A detailed list of detector parameters is presented in Table 5.1.

Pitches of $60\,\upmu \mathrm{m}$ result in point resolution of 8  –  10 $\upmu \mathrm{m}$ and therefore an impact parameter resolution of $\sigma _{{IP_{\phi }}}=\sqrt{13^2+(39/p_T)^2}~\upmu \mathrm{m}$. Typical flight path lengths D are on the order of $350\,\upmu \mathrm{m}$. It was then possible to resolve B-decays which was a major success. Cuts on decay lengths improved invariant mass measurements greatly.

After around 30 pb$^{-1}$ of data between 1992 and 1993 in RUN Ia with around 30 krad of radiation, the increase in sensor leakage current saturated the preamplifier and in addition significant threshold changes in the transistors deteriorated gain and increased noise.

The basic geometric parameters for SVX and $\mathrm{SVX}^\prime$ are comparable to those in Table 5.1, just layer 0 was moved 2 mm closer towards the beam pipe.

Table 5.1 Design parameters of the SVX detector in CDF at the TEVATRON, the first silicon vertex detector in a hadron collider experiment

The main improvements were the technology choices of electronic chips and sensors. The new chip SVXH being produced in 1.2 $\upmu \mathrm{m}$ technology was radiation tolerant up to 1 Mrad. It also featured higher gain with less noise and contained an 8-bit ADC on chip. The sensors contained integrated coupling capacitors to avoid dark current into the chip which therefore was operated in double-correlated sampling instead of in quadruple mode. The SVX$^{\prime }$ detector was successfully operated from 1992 to 1996. During this time algorithms were already developed to have a silicon stand-alone tracking. As in DELPHI basically all sensors and modules were different for each layer which gives the detector the predicate to be a “work of art”. During operation, the detector had an efficiency of >99% with an average position resolution of ${\sim }12\ \upmu \mathrm{m}$ and an asymptotic impact parameter resolution of $13\ \upmu \mathrm{m}$.

The silicon upgrade for RUN II is described in detail in the next section but first design considerations are given here – the lessons learned from the SVX and SVX$^\prime$. The longer shutdown between RUN I and RUN II made a major upgrade possible. Also with the success of SVX and SVX$^\prime$ the project was more fundamentally supported. The design parameters were defined by the need for a large coverage, a good impact parameter $d_0$ and transverse momentum $p_T$ resolution $\sigma _{p_T}(p_T)$ is often also expressed as $p_\perp$).

The transverse momentum resolution $\sigma _{p_T}$ is defined by

$$\begin{aligned} \frac{\varDelta p_T}{p_T}\approx \frac{\varDelta s[\upmu \mathrm{m}]}{(L[\mathrm{cm}])^2B[\mathrm{T}]}p_T[\mathrm{GeV}] \end{aligned}$$

(5.1)

with sagitta $s =L^{2}/8R$ , lever arm L, magnetic field B, curvature radius R and transverse momentum $p_T$. The equation immediately tells that (a) intrinsic position resolution has to be good to resolve s and that (b) the B field strength gives a linear improvement, while (c) a larger lever arm improves momentum resolution quadratically. An explanatory scheme is given in Fig. 5.3. With increasing $p_T$ the resolution gets worse again and with an error of 100% not even the charge of the particle can be identified anymore.

Fig. 5.3

Transverse momentum resolution $\mathrm{p}_T$. The momentum resolution of a moving charged particle in a B field is given by its curvature path. Points on the path are only measured where the particle cross sensor layers with a point resolution of $\sigma _x$. With $\mathrm{s} = \mathrm{L}^2/8\mathrm{R}$ and $\mathrm{B}\cdot \mathrm{R} = \mathrm{p/q}$ one gets the momentum resolution as $\frac{{\Delta \text {p}}}{\text {p}} \approx \frac{{\Delta \text {s}}}{{\text {L}^2 \text {B}}}\text {p}$

A layer around $R =$ 20 cm was necessary to improve $\sigma _{d{_0}}$ and $p_T$ resolution. The short lever arm of 5 cm realized in the $\mathrm{SVX}^\prime$ detector resulted in a poor $p_T$ resolution and the track extrapolation to the drift chambers was not precise. An overall increase in length was needed to increase coverage. This led initially to a five layer SVX II detector with layer 4⁴ at $R =10.6$ cm. The length of SVX II was increased to 96 cm by adding a third barrel. To improve pattern recognition and allow for a 3D vertex reconstruction double-sided, double metal silicon sensors were introduced. To bridge between vertex and drift chambers an Intermediate Fibre Tracker IFT or an Intermediate Straw Tracker IST was proposed. Both concepts suffered from the necessary extensive R&D in the short available time period. Both were finally cancelled and additional Intermediate Silicon Layers were introduced, the ISL detector. To make it affordable, a large fraction of the sensors were produced on 6 in. wafers⁵ – the first time for HEP experiments. The only remaining flaw in the concept of this beautiful detector is the unavoidable amount of material disturbing the impact parameter resolution, thus the b-tagging capability. This was solved by adding even more material but at a very low radius, namely adding a layer 00 at $R =1.6$ cm directly onto the beam pipe. The closer space point recovers $\sigma _{d_{0}}$ for the latter multiple scattering, refer to formula (4.1).

With an expected integrated luminosity of $2\,\mathrm{fb}^{-1}$ the front electronics radiation tolerance needed to be improved. This led to a third generation of the SVX chip series – the SVX3 chip (Sects. 1.10 and 5.2.1). Somehow the SVX detector noise increased above expectation during RUN Ib and this was attributed to the FOXFET biasing , being less radiation tolerant than anticipated. As a result for RUN II polysilicon bias resistors were introduced. Last but definitively not least the SVX II information was introduced into the Level-2 trigger – the CDF Secondary Vertex Trigger SVT.

5.2 Design, How to Cover $|\!\varvec{\eta \le } \mathbf {2}|$ Without Endcap

In 2000 the TEVATRON was upgraded for RUN II to higher luminosity and a slightly higher energy 1.8 to 2 TeV. The corresponding tracking system is described in detail in this section.

5.2.1 Tracking System

Efficient precision charged particle tracking is extremely important for the CDF analysis technique. Reconstruction of both high $p_T(m_W)$ and low $p_T(B\rightarrow J/\varPsi K)$ is required. The combination of track, calorimeter and muon chamber information, with an excellent purity at both the trigger and offline level, is possible. Precise and efficient b-tagging is essential for top t-quark physics and new phenomena searches. The goal is to guarantee precise 3D impact parameter resolution with an enhanced coverage up to $\vert \eta \le 2\vert$. The CDF II tracking system consists of an inner silicon vertex tracking system and a large drift chamber. The inner tracker consists of a minimum radius inner layer (Layer 00 at 1.35 cm) glued to the beam pipe and a five-layer silicon detector (SVX II at $R =$ 2.7  –  10.7 cm) with two-dimensional readout in each layer. It is surrounded by a third two-layer silicon detector (ISL $R =$ 20 and 28 cm) and finally an eight-layer open cell drift chamber (Central Outer Tracker COT at ). It is worth mentioning that the $\vert \eta \le 2\vert$ coverage was achieved with a consequent long barrel geometry and without any forward structures. Layer 00 and SVX II are ${\sim }$1 m long, the ISL spans even ${\sim }$2 m.

The full tracking volume can be seen in Figs. 5.4 and 5.5, the latter giving an expanded view of the inner part. The inner and outer tracking systems are capable of stand-alone tracking. This enables track–track matching instead of the normal track space point fit. The COT gives Level-1 trigger information and the inner silicon tracking system provides Level-2 information. The trigger acts on displaced vertices.

Layer 00

With a silicon layer placed at very small radius, the first precision space point is recorded without earlier multiple scattering thus improving impact parameter resolution. A 6-wedge layer is mounted directly on the beryllium beam pipe with single-sided-silicon microstrip sensors, each being 7.8 cm long and 0.8 cm or 1.5 cm wide. The length of Layer 00 is approximately 94 cm, consisting of six modules with two sensors per module, summing up to a total of 144 sensors. Sensors are placed at $R =$1.35 cm and $R =$1.6 cm (see Figs. 5.5 and 5.6).

Fig. 5.4

Longitudinal view of the CDF II tracking system [272]

Fig. 5.5

CDF silicon tracking system. Full tracking is possible up to $\vert \!\upeta \le 2\vert$ [272]

The caveat of a very high radiation environment is overcome by using radiation hard silicon sensors following early design recipes of the freshly developed LHC sensors and silicon material proposed by the RD50 collaboration. The sensors were single-sided only with p-on-n $R\phi$ readout. They were produced on $\langle 100\rangle$, 300 $\upmu$m thick silicon, AC coupled with a multi-guard ring structure to guarantee high voltage operation, which is the key to radiation-tolerant operation. Some sensors were even oxygenated (see Sect. 2.1). Strip implants were spaced 25 $\upmu$m while every second strip is connected to the readout. The sensors are actively cooled to freeze radiation damage and reduce leakage currents.

Fig. 5.6

End view of the layer 00 detector and a rare view during assembly. The left side expresses the tightness, allowing only 0.8 cm (1.5 cm) wide sensors at a radius of 1.35 cm (1.6 cm). Layer 0 of the SVX II detector sits already at R $=$ 2.45 cm. On the right Layer 00 is visible with silicon sensors not yet covered by the thin long fine-pitch cables. The main importance of Layer 00 is the first high precision space point at very low radius to seed the impact parameter calculation before multiple scattering [154]

Fig. 5.7

Layer 00 during insertion. The clearance towards the SVX II detector is about 300 $\upmu$m only. Insertion finally succeeded in November 2000 [154]

The radiation-tolerant SVX3 chips are mounted along the line separated from the sensors by longer cables at larger radii. Signals are carried out by thin, fine-pitch cables up to a length of 47 cm. Free cables can be seen in Fig. 5.6 while final assembly of Layer 00 during insertion with cables strapped tightly together is displayed in Fig. 5.7.

A summary of parameters is given in Table 5.2. The Layer 00 was proposed very late as a “beyond baseline” detector component, a detailed description of the early idea can be found in [189, 221].

Silicon Vertex Detector SVX II

The Silcon Vertex Detector II SVX II is divided into 12 wedges in $R\phi$ and in 3 barrels in z (beam axis) with a length of 29 cm each. This results in a total length of 96 cm, almost twice as long as the former SVX or SVX$^{\prime }$. With the length of almost 1 m SVX II covers $\approx 2.5\sigma$ of the interaction region providing track information up to ${\vert }\eta \le 2{\vert }$. It has five double-sided silicon layers measuring the $R\phi$ and Rz coordinates. Three layers (0, 1 and 3) have a $90^\circ$ stereo angle allowing high-resolution Rz measurements, while layers 2 and 4 have a $1.2^\circ$ stereo angle. This design provides good pattern recognition and 3D vertex reconstruction with an impact parameter resolution $\sigma _\phi < 30\ \upmu$m and $\sigma _z <60\,\upmu$m for central high momentum tracks. Figures 5.4 and 5.5 show the location of the SVX II detector and the ISL. The SVX II replaces the former SVX – a four-layer, single-sided silicon microstrip detector. A photo of one SVX II barrel is displayed in Fig. 5.8. Half-ladders contain two sensors plus a hybrid mounted directly to the silicon surface at the end. Two half-ladders are daisy-chained together to form full ladders of four sensors each. A total of 720 sensors form 360 half-ladders or 180 full ladders. A photo of an SVX II module is presented in Fig. 5.9.

Table 5.2 Parameters of the CDF II Silicon Sensors, SVX II, ISL and Layer 00. The large variety of silicon sensor types gives an impression about the complexity of the device. Only the large area outer ISL detector is fabricated with a single sensor type

Fig. 5.8

The SVX II detector, one barrel [42]

A 12-fold $\phi$ symmetry makes it possible to treat each $30^\circ$ wedge as an independent tracker. As for the SVX, the sensor widths had to be adapted for each layer to make a perfect wedge geometry possible. The data from SVX II are used at the Level-2 Silicon Vertex Trigger SVT [215], which identifies displaced vertices coming from B fragmentation. A placement precision of better than 100 $\upmu$m with respect to the beam was necessary to use track information in the Level-2 trigger.

All SVX II sensors are AC coupled, double-sided, 300 $\upmu$m thick with polysilicon bias resistors. The $R\phi$ side contains the $p^+$-implants, while the Rz or stereo side is composed of $n^+$implants isolated by a $p^+$-stop configuration (see also Fig. 5.17). For the $90^\circ {Rz}$ strips, a double metal layer routes the signals to the readout electronics. A photo of the double-sided sensor layout is given in Fig. 5.10. For the small stereo angle sensors no extra routing is needed. In Fig. 5.17 one can see how layer 2 and layer 4 sensors are processed on a single wafer with the new 6  in. sensor technology. A more detailed description of the advantages of 6 in. technology is presented in Sect. 5.3 and in the summary of sensor parameters in Table 5.2.

Fig. 5.9

A layer 1 hybrid with sensor [42]

Fig. 5.10

The double-sided double metal layer $90^\circ$ stereo sensor of the SVX II. The bonding pads are located on the left, they are connected to the Al strips on the double metal and are bonded to the readout electronics. The polysilicon bias resistors are located in the lower right part of the picture, the meander structures. The black spots on the upper right are the vias connecting signal lines to readout lines

Fig. 5.11

The intermediate silicon layers detector—ISL. The schematic shows the design drawings of the carbon-fibre spaceframe. The geometrical concept of the single additional layer in the central region and the two additional layers in the forward direction can be seen. The carbon-fibre rings are connected with hollow carbon-fibre rods. The total weight of the structure is about 6 kg before mounting the modules [138]

Fig. 5.12

[Courtesy of CDF, Fermilab]

The intermediate silicon layers detector.

Fig. 5.13

[Courtesy of CDF, Fermilab]

Into the ISL. The full ladders, six sensor long with readout electronics on both sides, are visible in a barrel configuration, a rare view during construction.

Intermediate Silicon Layers ISL

The intermediate silicon layers 5 and 6, both consisting of double-sided silicon strip detectors, measure both the $R\phi$ and Rz coordinates. The strips on one side of the wafers are parallel to the beam axis (z-axis) while the strips on the other side are tilted by $1.2^\circ$. This allows the measurement of the Rz coordinate with low ambiguity⁶ and no additional double metal layer. The ISL layers are mounted at the radii 20 and 28 cm. The overall length of the ISL is 195 cm, covering the This special long configuration enables “forward” tracking without forward structures. The whole support structure – the spaceframe – was designed with respect to weight, stiffness and material budget, which led to a carbon-fibre structure. The mechanical arrangement can be seen in Fig. 5.11 and an impressive view is shown in Fig. 5.12, a photo of the ISL before it was closed and inserted into the COT. The early design is described in [322]. Figure 5.13 allows a glimpse into the detector, the space where finally the SVX II was located. In contrast to SVX II, ISL was designed with simplicity in mind. A more detailed description of the ISL can be found in [136, 138]. The ISL sensors are also AC coupled, polysilicon biased and double-sided, with $p^+$-stop configuration on the n-side. For the larger radii, occupancy and radiation damage are lower. It is therefore possible to use longer strips and pitches are relaxed to 112 $\upmu$m on the $R\phi$ and stereo side. This is also necessary to reduce the number of readout channels, thus the costs of front-end electronics and DAQ equipment. Sensors from both old 4 in. and new 6  in. technologies [43, 136] are used. In the 6 in. case, two sensors are processed on a single wafer, see Fig. 5.16. Pitch adapters are used to bring the signals from the strips to the more closely spaced inputs of the SVX3 chips. The ISL ladders are composed of six sensors arranged as half-ladders of three sensors each with a double-sided hybrid at each half-ladder end. A total of 296 half-ladders form 148 full ladders summing up to a total of 888 sensors with 2368 chips. The ladders are composed of carbon fibre. The assembly fixture is displayed in Fig. 5.14. Relaxed space constraints in the high radius regions allow overlapping of ladders even for the z-coordinate.

Central Outer Tracker COT

The COT is an open drift chamber with an inner radius of $R = 44$ cm and an outer radius of $R = 132$ cm and a coverage in $\eta$ up to $\vert \eta \vert \le 1$. It replaces the Central Tracking Chamber CTC used in RUN I. Four axial and four stereo “superlayers” provide 96 measurements⁷, resulting in a total of 2520 drift cells and 30240 readout channels. The different wire angles with respect to Rz in each “superlayer” are $+3^\circ \ 0^\circ -3^\circ \ 0 +3^\circ \ 0^\circ -3^\circ$. The location is shown in Figs. 5.1 and 5.4. The main changes in the upgrade are the small drift cells with a maximum drift distance of 0.88 cm and fast gas to limit drift times of less than 100 ns. The readout is realized via a pipelined TDC⁸ system. The COT is also equipped with the possibility to measure dE/dx for particle identification. The measurement is complementary to the time-of-flight TOF method. A more detailed description is given in [61].

Fig. 5.14

Manual assembly of the CDF ISL ladders. The sensors resting on vacuum chucks were aligned and glued to the supports. The right picture show three half-ladders to complete the curing of the glue

The SVX3 Chip [61, 115, 248]

All silicon sensors are read out by the SVX3 chip, a radiation-tolerant CMOS custom-integrated circuit. Each chip has 128 parallel input channels. The chip consists of two parts built into a monolithic structure: the front-end for the analogue functions and the back-end part for the digital functions. The input amplifiers, integrators, the 46 cell pipelines needed for dead-timeless operation and the pipeline acquisition logic is located in the front-end. Up to four groups of cells can be queued for digitization and then read out at one time. The back-end consists of an 8-bit Wilkinson ADC, a readout FIFO⁹ and differential output drivers. The chip is able to work with positive and negative signals to handle double-sided silicon detectors. It has a sparsification mode, a calibration input and is capable of pedestal subtraction at the chip level. The chip is programmable to adjust for different TEVATRON running conditions, e.g. bunch spacings (132 and 396 ns). It can handle strip capacitances from 10 to 35 pF. The pipeline depth, threshold level and bandwidth limit are adjustable. The chip has been irradiated with a $^{60}{Co}$ source up to 4 Mrad and was evaluated to perform well¹⁰ [115, 248]. The amplification is 15 mV/fC which corresponds to 60 mV for a minimum ionising particle. The chip provides dead-timeless readout with Level-1 trigger rates up to 50 kHz. The maximum delay between the Level-1 trigger decision and read out without overwriting the pipeline cell content is 5.5 $\upmu$s at 132 ns between beam crossings.

Silicon Vertex Tracker SVT  –  Secondary Vertexing

The ability to use impact parameter information in the trigger to detect secondary vertices can substantially increase the physics reach of a hadron collider experiment. Background can be quite substantially reduced e.g. for the process $Z\longrightarrow b\bar{b}$. The B-decay studies will also be greatly enhanced. Some physics processes not involving b quarks will also profit from the SVT e.g. the high $p_T$ inclusive muon trigger, needed for the W-mass measurement, has a high Level-2 rate. The SVT can both reduce the accidental rate by demanding an SVX II track pointing to the primary vertex and remove lower $p_T$ muon background by using improved momentum resolution to tighten the $p_T$ threshold. In order to obtain impact parameter information at the silicon tracker is read out after each Level-1 trigger. The SVT combines data with the Level-1 tracking information from the COT and computes track parameters ($\phi , p_T$ and impact parameter $d_0$) with a resolution and efficiency comparable to full offline analysis [61, 215]. The SVT also introduced several hard constraints on the detector design and assembly:

• wedge geometry  –  compatible with hardware regional track reconstruction

• very tight mechanical tolerances  –  placement precision of 100 $\upmu$m and better with respect to beam

• dead-timeless readout with onboard digitization, sparsification and buffering

• dedicated DAQ pipeline for processing and control only for the SVX

The implementation of a silicon Level-2 hardware trigger on impact parameter information is unprecedented in a hadron collider detector.

5.3 Six Inch, a New Technology Step for Large Silicon Applications

The fabrication of microstrip detectors on 4 in. high resistivity wafers allowing a maximum processable area up to $42\,\mathrm{cm}^{2}$ has been established at LEP and RUN I at the TEVATRON. The workable area using 6 in. wafers increases up to 100 cm$^{2}$. Figure 5.15 shows a photo of a full wafer.

Since this is twice the area of a 4 in. wafer a larger number of sensors can be processed at the same time on the same wafer resulting in significant reduction of cost. CDF is the first HEP experiment using 6 in. sensors [43, 136]. Figure 5.16 show the mask layout of the 6 in. wafers for ISL and SVX II sensors, respectively. In the case of the ISL wafer both sensors are identical in size. In the SVX II wafer the sensors are produced for layers at different radii and hence have different geometries, specifically widths. In contrast to the production on 4 in. wafers, the cost of one mask set is saved which is a substantial fraction of the total cost, especially for double-sided sensors and small volume production. The ISL sensors on 6 in. design are even 5.75 mm longer than their counterpart in 4 in. design. Figure 5.17 shows the different electrical structures of an ISL sensor. A photo of the sensor surface (n-side) is shown in Fig. 5.18.

Fig. 5.15

Photo of a full 6 in. ISL wafer – real size $^*0.5$. Two ISL sensors plus two smaller study sensors and many small test structures like diodes and resistors can be seen. The four rounded fully metallized triangles at the perimeter are for handling purposes

All sensors for SVX II and ISL were AC coupled, polysilicon biased, double-sided, produced out of $\langle 100\rangle$ wafers. For $90^\circ$ Rz readout strips a double metal was implemented over a 5 $\upmu$m thick isolation to route the strips to the hybrid at the end of the ladders. Large thickness¹¹ of metal-to-metal isolation is mandatory to suppress cross-talk and keep capacitance low, especially parasitic capacitance. Also the aluminium trace widths are reduced to 8 $\upmu$m to reduce capacitance. Two or four sensors were connected to one hybrid for SVX II and ISL, respectively. Coupling capacitor isolation was achieved with a pattern of silicon oxide and silicon nitride. The aluminium strip width was 6 $\upmu$m smaller than the implant width below to suppress micro-discharge. All corners and edges have a radius of >10 $\upmu$m to avoid high fields and any doped region has a concentration of at least $10^{14}\, \mathrm{ions}/\mathrm{cm}^{2}$ to ensure radiation hardness. An active $n^+$ edge field shaper structure is implemented, refer to p. 49. Strip implants continue below the polysilicon resistors to maximize active surface. More details can also be found in [43, 227].

Fig. 5.16

Mask layout of an ISL and a SVX II wafer. Two sensors fit on one wafer. One ISL wafer is shown with two identical sensors, while on the right the SVX II wafer caries sensors with different layout – a layer 2 (L2) and a layer 4 (L4) sensor. At the bottom, mini sensors and test structures are placed

Fig. 5.17

Structure of an ISL sensor – p-side (left) and n-side (right). All 6 in. sensors for ISL and SVX II are 300 $\upmu$m thick on $\langle 100\rangle$ oriented Float-Zone silicon. The sensors are double-sided, single metal, AC coupled, polysilicon biased, with a common $p^+$-stop structure on the ohmic side for SVX II and isolated $p^+$-stop structure for ISL to guarantee inter-strip isolation

Fig. 5.18

Photo of the stereo n-side of an ISL sensor. The following structures are displayed from left to right, an outer guard ring, the bias ring with meander bias resistors with metal lines passing through the inner main guard ring ending on the small DC pads. The DC pads are then contacting the $p^+$-implants by a vias. The $n^+$ strips are fully surrounded by a $p^+$-stop structure. The mentioned inner guard ring is mostly covered by aluminium, the small squares mark the vias. The strips are arranged with a stereo angle of $1.2^\circ$ with respect to the strips on the junction side. In the right picture a middle part can be seen where, due to the angle, the strip does not reach the end of the sensor. Therefore the bias resistor angles in from the side

Initial Problems with First Sensors from 6 in. Wafers

In conclusion switching from 4 to 6 in. sensors was not completely straight forward, it was a bit painful, but feasible. In the end, fabrication on 6 in. sensors is cheaper and performance is as good as for 4 in. Some significant issues related to size increase are shown here, some other problems are presented in Sect. 1.14.

Early Low Capacitances at the Wafer Edges

During the prototype phase, coupling capacitance values decreased significantly towards the wafer edge, dropping below specification limits. The cause was identified to be a non-uniform aluminium sputtering process. The process was not yet fully adapted to larger wafer sizes. This resulted in a substantial over-etching of the Al strips, thereby decreasing aluminium width, thus coupling capacitances. A cartoon of the process problem plus some measurement results are presented in Fig. 5.19.

Two Cases of Low Inter-Strip Resistance

Several sensors were received, showing a defined pattern of several clusters of five consecutive strips with low inter-strip. The problem was tracked down to a PECVD¹² machine. The pattern matches gas outlet positions, where an increased susceptibility to charge-up was introduced. Correct cleaning cured the problem.

Fig. 5.19

Low coupling capacitances at the edges [43, 136]. On the left a measurement on a full wafer is shown while on the right measurements of an already cut sensor, representing half a wafer is shown. The cartoon in the middle explains how the over-etching happened

Fig. 5.20

Inter-strip resistance problems due to inhomogeneous wafer material. Half of the sensor shows a low inter-strip resistance on the n-side of the sensor. The effect was identified by leakage current and $\mathrm {R_{poly}}$ measurement and confirmed with a full $\mathrm {R_{int}}$ measurement. Low $\mathrm {R_{int}}$ connects strips, therefore current measurement also collects components from neighbour strips and bias resistors are now arranged in parallel configuration. Different bias voltages were applied during the left ($\mathrm{V}_{\mathrm{bias}}=80\,\mathrm{V}$) and right ($\mathrm{V}_\mathrm{bias} =100\,\mathrm{V}$) measurement. While only half of the sensor was full depleted with $V_{{bias}}=80\,\mathrm{V}$, the whole sensor was fully depleted at $\mathrm{V}_\mathrm{bias}=100\,\mathrm{V}$. This bias or full depletion characteristic can be explained by an inhomogeneous resistivity of the silicon wafer. Since, in the ISL case, the sensor only covers half of the wafer the decrease of resistivity towards the centre of the wafer translates to a decrease in one sensor to one side

A more severe problem is shown in Fig. 5.20 where low inter-strip resistance values were identified on only half of a sensor. The effect was present only on the n-side. Increasing the bias voltage cured the effect completely, leading to the suspicion that the depletion voltage on one half of the sensor is higher, thus the resistivity is lower. This explains why the effect is only present on n-side, because the depletion zone reaches n-side only after full depletion, however CV measurements on diodes contradicted this hypothesis. It was found later that the 6 in. wafer had a resistivity drop in the centre¹³ of the wafer. A good fraction of sensors had to be rejected.

Another problem with a low inter-strip resistivity encountered during the CDF quality assurance is presented in Sect. 1.14 where the sensor surface was charged up during transport.

All the problems encountered during prototype phase and first production runs were identified and solved.

5.4 Lessons Learned from Operation

In this chapter some incidents that occurred during commissioning and operation will be listed. It is a tale of unexpected incidents to be expected in future experiments. The CDF silicon detector was installed in February 2001. Commissioning of the CDF II silicon detector took place until spring 2002 [45].

Initially, the cooling lines to the central ISL barrel were blocked by remains of epoxy. This blockage was later solved by introducing a boroscope with a surgical laser to bore the glue out.

Failing power supplies and pick-up noise on the layer 00 had to be countered by a special readout arrangement.

A much more severe and unexpected phenomenon was identified when a substantial fraction of modules failed (14/704) long after the commissioning phase. The rate was not compatible with the expected infant mortality rate. The failure was strongly correlated with the trigger frequency. The wire-bonds, perpendicular to the 1.4 T magnetic field carry power for the SVX3D chips from the $R\phi$ to the Rz side of the SVX II hybrids. Any current fluctuations induce a changing Lorentz force on the wires. During consecutive, synchronous chip readout, these forces drive the wires to resonate and cause them to break. A new VME board was introduced to prevent wire-bond resonances by stopping the readout when the trigger rate exceeds a certain frequency. Since installation of the board no further wire-bond failures have been encountered. In addition, the digital current consumption of the SVX3 chips has been lowered by reducing the power output of their digital drivers. Further detailed discussions about this topic can be found in [46].

Another set of very serious incidents were beam incidents from the TEVATRON where the detector was subjected to high dose rates of $\ge 10^{7}\,\mathrm{MIPs}/\mathrm{cm}^{2}$ in a period of time ${\le }150\,\mathrm{ns}$. During the first weeks after an incident the affected readout chips returned data with bit errors. After some months at least some of the affected readout chips recovered. As a consequence a fast interlock, aborting the beam before it has time to de-bunch, has been implemented. In addition, collimators have been installed in order to intercept deflected particles and minimizing the dose rate during an incident. After these implementations no additional damage has been recorded despite the occurrence of several RF failures and kicker pre-fires. Further details can be found in [45].

Fig. 5.21

Depletion voltage and signal/noise vs. fluence at CDF. The upper plots show the situation as presented in 2007 with predictions up to $\mathcal {L}=8~{ fb}^{-1}$ (from [199]) and lower the final result evaluated after the end of operation with a total of $\mathcal {L}=12~{ fb}^{-1}$ (from [29]). It is interesting to see predications to hold, although, fortunately the more positive extrapolation came true. SVX II layer 0 depletion voltage evolution is shown in the left plots. Expectations are met. In the right plots signal/noise values are plotted

A small concern, since non-destructive, is the regular loss of communication to the non-radiation tolerant power supply mainframes in the collision hall. These crates need a reset from time to time, a so-called “hockerization” [145]. During the shutdown 2007/2008 another cooling problem was solved. An acidification of the cooling liquid caused a leak in the cooling joints. In an heroic effort again a boroscope and some catheters plus a small custom-made brass wire were utilized to deposit epoxy from the inside of the tube to the corroded areas [96].

An expected degradation derives from radiation. Signal is constantly decreasing while shot noise is increasing due to the increase of leakage currents. Especially in the inner layers, changes of depletion voltages can be observed. The data follow roughly the expectation given by the Hamburg model . Actually, the effect of radiation damage is being monitored and preliminary results of 2008 suggested the detector will survive $8\,\mathrm{fb}^{-1}$ [96, 199, 348] – and it did – it even did survive $\mathcal {L}=12\,{ fb}^{-1}$ of integrated luminosity. Depletion voltage and signal/noise changes vs. fluence is shown in Fig. 5.21. An interesting point in this discussion is the determination of the depletion voltage when a CV scan is not possible. By varying the bias voltage of the silicon sensors, noise values and signal when beam is present are recorded. When the signal maximizes and the noise minimizes or better plateaus their full depletion voltage has been reached. For CDF this is a manual operation and does not work in parallel to data taking.

In 2009 the CDF Run II silicon detector was running with 92% of all sensors and with a data-taking efficiency greater than 97%. Maintaining the detector at a high efficiency level requires a significant effort compared to other CDF sub detector systems, especially in terms of human resources. At least two of about 10 silicon operations group members were on 24-h call.

CDF II operations ended in September 2011, the TEVATRON delivered $\mathcal {L}{=}12~{ fb}^{-1}$ of integrated luminosity of $p\bar{p}$ collisions at $\sqrt{s}$=1.96 TeV – way above design! A more detailed overview of the operation experience of the CDF II silicon vertex detector can be found here [29].

5.5 The t Discovery, CP Violation in the b Quark Sector

How can precise track and vertex information help to reduce background? An impressive example is given in [204] where the $B^\pm \rightarrow J/\varPsi K^\pm$ mass spectra is given with and without SVX $c\tau >100\ \upmu \mathrm{m}$ cut, see Fig. 5.22. The cuts allow for fully reconstructed exclusive decays of b-hadrons together with a precise hadron momentum measurement in the magnetic field. This capability is also a milestone for any attempt to measure CP violation in the B sector.

In 1994 the evidence of a top quark was published in [5] – a milestone in particle physics finally achieved. Detailed descriptions are written in [6, 123, 147, 341]. Some brief analysis descriptions are presented where the SVX was instrumental in the initial identification. In later stages the SVX II with its larger coverage played also a vital role to reduce background for precision measurements. At the TEVATRON top quarks are produced $\sim$90% of the time by quark–anti-quark ($q\bar{q}$) annihilation into a gluon which then decay into $t\bar{t}$. Within the Standard model, the dominant decay is then

$$\begin{aligned} t\bar{t}\rightarrow W^+b,\, W^-\bar{b} \end{aligned}$$

(5.2)

with further decay of W

Fig. 5.22

Mass determination without/with vertex cut at CDF [204]. The c$\uptau$ cut reduces background drastically thus reducing the statistical error. This is especially important for a hadron collider environment

$$\begin{aligned} W\rightarrow \left\{ \begin{array}{ll} (u\bar{d}),(c\bar{s}) &{} \hbox {hadronic decay with branching ratio BR : 2/6}\\ (e \nu ,\upmu \nu , \tau \nu ) &{}\hbox {leptonic decay with branching ratio BR : 1/3}\\ \end{array}\right. \end{aligned}$$

(5.3)

The W decay products categorize the ${t\bar{t}}$ events into “full hadronic”, “di-lepton” or “lepton $+$ jet” channels, but there are always two additional b-quark decays which may be “tagged” by a displaced vertex and/or another lepton if the b or a secondary charm decay is semileptonic. In the initial “evidence” paper only “di-lepton” and “lepton $+$ jet $+$ b-tag” channels were analyzed.

The “lepton $+$ jet” channel has a high $p_T$ lepton, missing energy and two jets from the W decay plus two b jets. Initially, the kinematic cuts, number of jet cuts, plus jet mass cuts did not find enough events to significantly beat the background to claim “evidence”. The identified sample of 52 events can be further constrained by a SVX b-tag down to six events with W plus three or more jet events with a b-tag above expected background events. An alternative b-tagging method by identifying “soft” leptons from ($b\rightarrow l\nu _lX$ or $b\rightarrow c\rightarrow l\nu _lX)$ with the calorimeter and CTC will not be elaborated here. In summary the “lepton $+$ jet” event type, particularly with a b-tag, is considered the most powerful signature due to a combination of cleanliness and statistics. To improve this method a longer SVX is needed as realized in the RUN II upgrade. An event display is shown in Fig. 5.23  –  The Golden TOP event.

Fig. 5.23

A “Golden” t event. $\mathrm{t}{\bar{\mathrm{t}}}$ decaying into $\mathrm {W^{+}b,\ W^{-}}{\bar{\mathrm{b}}}$, where one W decays leptonically with the signature lepton ID plus missing energy, the second W decays into $\mathrm {q}{\bar{\mathrm{q}}}$ resulting in two jets together with the initial two tagged b-jets. In total one lepton, four jets, two tagged b jets and missing energy were reconstructed [332]

Thomas Müller said, when asked about the physics success of the CDF experiment

On a conference in 1983, the theorist John Ellis from CERN instructed us experimental particle physicists to find ways for identifying experimentally beauty quarks in particle jets. Ten years later, first evidence for top quark signals was obtained in the CDF experiment using the reconstruction of beauty hadron decays. Any claims for the observation of top quarks would have been very doubtful without the excellent performance of the silicon vertex detector.

There are many more exciting physics subjects like CP violation in the B sector to determine the CP violating phase $\beta _s$ or $B^{0}_{S}\hbox {--}\bar{B}_S^0$ oscillations [8, 289]. Spectroscopy (mass, lifetime , decays) of $B_c, B_s,\varLambda _b,\varXi _b,\varSigma _b$, orbitally excited B-mesons, etc. The SVT enhanced especially the B spectroscopy. It highly enriched the statistical sample on hadronic B-decays, which have an intrinsic good $p_T$ resolution (no neutrino). The SVT was the key for the $B_s$ measurement. The field is rich. First observation of charged $\varSigma _b$ and first direct observation of $\varXi _b$ at the TEVATRON plus some more examples are discussed in [245].

Additionally, for some topics a simple b flightpath tag is not enough, e.g. for all the CP and oscillation studies. The correct flavour must be known. To “tag” the true flavour of the B-meson the charge must be known. Two methods were developed: (1) The “opposite side tagging” where the jet charge or the lepton charge ($b\rightarrow l^-$ but $\bar{b}\rightarrow l^+$) is evaluated on the “other” B-hadron to determine the B-hadron flavour of interest. (2) The “same side tagging” method where the charges of the particle of associated production are determined, e.g. $\pi ^{+}(\pi ^{-})$ is associated with the formation of a $B (\bar{B})$ meson. The mechanisms were developed during RUN I and perfected in RUN II. As mentioned earlier, the purpose of vertex detectors is simply to measure precise tracks and tag the flavour of heavy quarks.