Introduction to Ultra-Low-Voltage Energy Harvesting

Abstract

This chapter presents the fundamental concepts of ultra-low-voltage energy harvesting. A brief introduction to energy-harvesting approaches and the models for some common transducers are provided. In addition, an overview of biomedical and Internet-of-Thing applications is presented, followed by a review of state-of-the-art energy-harvesting converters. At the end of this chapter, a physics-based MOSFET model used throughout the book to design ultra-low-voltage converters for energy harvesting is described.

1.1 Introduction

During the past century, advances in electronics have allowed the development of new consumer products, which have had a significant impact on the development of modern society as we know it today. Communication mechanisms, forms of entertainment, and the sharing of knowledge have been significantly modified with the availability of broadcast systems, notably radio, television, and the Internet. The introduction of several new types of biomedical equipment has enabled new approaches to diagnosis and treatments, contributing to the fast development of medicine. The industry has also evolved with the adoption of control systems and robotics, which allow faster production and the development of more complex products.

Similarly, more recent developments in electronics continue to alter diverse aspects of human life, with new applications that lead to the ever-growing computational capacity of devices. In the Internet-of-Things (IoT) scenario, connected devices, such as smart sensors, allow the acquisition of large amounts of data, which can be processed using machine learning techniques to perform more complex tasks [1].

The acquisition of data and intelligent decision-making capabilities have enabled several new approaches in the development of smart cities, such as the deployment of a smart grid, which can reduce energy consumption and allow distributed generation, intelligent management of waste, pollution monitoring, management of traffic congestion, smart parking, lighting control, etc. [2]. Homes and buildings can also benefit from IoT devices, which can help with reducing energy consumption, expanding entertainment options and quality-of-life applications, promoting intelligent automation, etc. Furthermore, the human body has a strong potential for several IoT applications to promote better life quality and health, such as aids for sports training, wearable health-monitoring devices, ambient assisted living, and real-time streaming [3].

With several applications in everyday life, the number of connected devices has been steadily increasing, and by 2010, it had already surpassed the human population [4]. An essential requirement for the connected devices is an autonomous energy supply for operation, which allows the device to be independent of any wiring needs or batteries, decreasing both maintenance needs and chemical waste generation and increasing device portability. In this context, energy harvesting has become a necessary solution to allow connected devices to better fit the requirements of uninterrupted autonomous operation [5], being a feasible solution for powering sensor nodes [6] while meeting the requirements of performance and lifetime for such devices.

Although the available power (P_AV) harvested by compact transducers is generally low, of the order of mW or less, it enables several autonomous low-power applications. From an application perspective, appropriate low-power design is essential to maximize the use of such restricted power levels. Circuit techniques such as V_DD scaling and power cycling are essential strategies to reduce power consumption and are suitable for many applications that do not require a fast and “always-on” response.

Along with the available power of common energy harvesters being low, the voltage provided by them is also low, typically being of the order of hundreds or tens of mV. Because, in general, this voltage is not sufficient to supply electronic circuits of current technologies, a step-up (boost) voltage converter is required to power the application circuit.

From the step-up converter design perspective, the ultra-low-power (ULP) and ultra-low-voltage (ULV) levels of energy-harvesting transducers impose challenging design constraints. To minimize the impact of such constraints, we have analyzed and modeled different types of voltage converters using physics-based MOSFET and diode models, which enable appropriate designs to be obtained for ULV converters.

1.2 Common Methods for Low-Power Energy Harvesting

In the energy scavenging scenario, the ambient energy can be exploited as a source to power electronic devices. Figure 1.1 shows a simplified energy-harvesting interface, where a transducer is employed to convert the ambient energy to electricity, enabling the powering of a load. Due to the ULV levels generated by the transducers, a converter is commonly employed between the transducer and the load to provide step-up voltage conversion and stabilization of the output voltage.

Fig. 1.1

A simplified representation of an energy-harvesting interface

The most common sources for energy harvesting, the amount of ambient power, and the power typically collected by the transducers are detailed in Table 1.1. As can be seen, the harvested power is generally a very small fraction of the source power due to the low efficiency of the transducer. In this section, we analyze the most common methods for energy harvesting and provide information on the transducers used in each approach. The equivalent electric circuit presented for each type of transducer aids in the search for different techniques for maximum power point tracking (MPPT).

Table 1.1 Energy-harvesting approaches and associated power levels [7]

1.2.1 Thermal Energy Harvesting

Thermal energy harvesting is a feasible approach to power on-body devices using human thermal energy. A thermoelectric generator (TEG) is employed to convert a temperature difference into electricity through a physical process known as the Seebeck effect, which occurs in both semiconductor and conductor materials. The basic structure of a TEG is a thermocouple (Fig. 1.2), which is comprised of two different semiconductor materials, a p-type material with a positive Seebeck coefficient (S_P) and an n-type material with a negative Seebeck coefficient (S_N). To realize a TEG, the thermocouples are joined by an electrically conductive material and sandwiched between two electrically insulated and thermally conductive plates, which form the cold and hot sides of the device [8].

Fig. 1.2

The basic structure of a thermocouple

Once a thermal gradient is applied between the hot and cold sides of the device, diffusion of charge carriers from the hot side (higher thermal energy) to the cold side (lower thermal energy) occurs, generating an electric field due to the gradient of charge carriers. Once the circuit is closed, the flow of electrical current is established.

The open-circuit voltage generated by a thermocouple (V_TC), which is proportional to the temperature difference between plates, is given by

$$ {V}_{TC}= S\varDelta T=\left({S}_P-{S}_N\right)\varDelta T. $$

(1.1)

Due to the low value of the Seebeck coefficient (S), TEGs are generally built with a series of thermocouples to increase the voltage (Fig. 1.3).

Fig. 1.3

Common TEG construction using thermocouples in series

Although higher voltages can be achieved with the series connection of thermocouples, the increase in the number of devices connected in series also causes the electrical resistance of the TEG and the total TEG area to increase. Standard commercial TEG devices of a few cm² (Tellurex, Kryotherm, Marlow, and TEGPro) deliver around 30–60 mV/K under the open-load condition and have a resistance of around 1 to 10 Ω. More recent thin-film technologies achieve a higher Seebeck coefficient for the same TEG area, although the electrical resistance is also increased to the range of some hundreds of ohms.

The electrical model of a TEG is comprised of a voltage source in series with a resistance, as shown in Fig. 1.4. To maximize the power that can be extracted from a TEG, the input impedance of the converter should be matched to the internal resistance of the TEG (R_S). Under this condition, the voltage obtained at the TEG terminals is one-half of the TEG open-circuit voltage (V_S), as represented in Fig. 1.4. Therefore, the power delivered to the converter (P_IN) equals the available power, which is given by

Fig. 1.4

The equivalent electrical circuit of a TEG connected to a step-up voltage converter and the condition for maximizing the extraction of the available power

$$ {P}_{AV}=\frac{V_S^2}{4{R}_S}. $$

(1.2)

1.2.1.1 Harvesting Thermal Energy from the Human Body

The voltage level of each thermocouple is a function of the temperature gradient between the hot and cold sides of the device (1.1). When scavenging thermal energy from the human body, this gradient is always lower than the difference between the ambient temperature and the human body temperature. As represented in the thermal circuit of Fig. 1.5 [9], the temperature gradient across the TEG is limited by the thermal resistance between the human body and the TEG as well as between the TEG and the air. The air resistance is dependent on the air flow, which is affected by wind conditions, body movement, etc., while the resistance of the human body can be reduced by choosing contact areas with lower thermal resistance, such as the chest, head, and wrist [10]. As demonstrated in [11], the integration of TEGs with clothes is also a feasible way to harvest energy from the human body.

Fig. 1.5

Equivalent thermal circuit of a TEG on the human body

1.2.2 Photovoltaic Energy Harvesting

Photovoltaic cells (Fig. 1.6) are p-n junctions that convert light radiation into electricity. Being built from a well-developed technology, photovoltaic cells are widely used as power supplies for many applications.

Fig. 1.6

Basic photovoltaic cell structure

Typical values of harvested power densities of photovoltaic cells range from 10 mW/cm² outdoors to values of the order of 10 μW/cm² indoors [7]. Despite the reduced harvested power under low illumination, its value is of interest for several ULP applications, such as sensor networks and biomedical circuits. An example of silicon-based small-area cells for a subcutaneous implant application presented in [12] operates with an efficiency of around 17%. In [13], photovoltaic cells implemented with different materials (GaAs, GaInP, and Si) were tested under low-irradiance conditions. Both GaAs and GaInP cells outperformed the more conventional Si-based photovoltaic cells. The highest measured conversion efficiency was close to 27% for the GaInP-based photovoltaic cells.

The equivalent electrical model of a photovoltaic cell is shown in Fig. 1.7 [14]. The current I_GEN is dependent on the light radiation. The resistances R_S and R_P model the ohmic losses and the internal leakage current, respectively, and the diode represents the p-n junction. Due to the nonlinear voltage-current relationship, an algorithm for MPPT is usually employed in the converter to maximize the extracted power.

Fig. 1.7

The equivalent electrical circuit of a photovoltaic cell and the dependence of the converter input power on its input voltage [14]

1.2.3 Vibrational Energy Harvesting

Vibrational energy either from the human body or from the environment can be converted into electrical energy. Electrostatic, piezoelectric, and electromagnetic transducers are the most common transducer types used to harvest vibrational energy [7].

Piezoelectric transducers (Fig. 1.8) are available as several commercial products for the specific purpose of energy harvesting. These transducers are based on the piezoelectric effect, a property of some crystals and ceramics in which electrical charges are accumulated in response to an applied mechanical strain due to the change in the crystalline structure of the material.

Fig. 1.8

Basic structure of a piezoelectric transducer

An equivalent electrical model of a piezoelectric transducer is shown in Fig. 1.9 [14], where I_PZ is the current generated when the piezoelectric material is submitted to a mechanical strain, and C_P models the capacitance between the electrodes. Assuming operation at the resonant frequency (ω₀), which is an intrinsic characteristic of the transducer, the piezoelectric transducer can be modeled by a voltage source and a series resistance, as in Fig. 1.9. Due to the nature of the vibration signals, the oscillatory output of the transducer is commonly connected to simple rectifier circuits, as shown in Fig. 1.9 [14].

Fig. 1.9

The equivalent electric circuit of a piezoelectric transducer combined with a rectifier and the condition for extraction of the available power [14]

1.2.4 Radiofrequency Energy Harvesting

The power density of radiofrequency (RF) signals is typically lower than that of other energy harvesters; however, it is still an attractive option, especially in densely populated areas, where wireless RF sources are widely available and can thus support several autonomous applications. In such a scenario, RF energy harvesting could be used to recharge batteries in situations where a battery replacement would be impractical. RF signals from cellular networks, Wi-Fi, and other types of wireless networks can be captured by small form-factor antennas and further converted into a usable DC voltage by RF/DC converters, generally through a matching network and a rectifier [15,16,17].

The equivalent electrical circuit of an antenna is presented in Fig. 1.10, where V_S, R_S, and L_S are the open-circuit peak voltage, internal series resistance, and inductance of the antenna, respectively. The matching network is employed between the antenna and the rectifier to provide impedance matching and maximize the power transfer between the antenna and the rectifier. When the input impedance of the matching network equals the complex conjugate of the antenna impedance, the available power, given by

Fig. 1.10

The equivalent electrical circuit of an antenna connected to an RF/DC converter

$$ {P}_{AV}=\frac{V_S^2}{8{R}_S}, $$

(1.3)

is delivered to the input of the converter.

1.3 Ultra-low-voltage Energy-Harvesting Applications

Energy harvesting is a feasible technology to power sensor networks [18] and IoT devices for several biomedical and quality-of-life applications. Due to the low power typically harvested, appropriate design techniques and efficient communication protocols must be employed to operate the connected devices.

For the communication between on-body devices, protocol standards such as the IEEE 802.15.6 have been developed, allowing the deployment of short-range wireless body area networks (WBANs) [3], for which low power consumption is an essential requirement. Furthermore, for the operation of sensor networks, new communication standards, such as ZigBee with the Green Power feature, have been developed, targeting the use of harvesters as a power source.

Several recent papers report the powering of sensor nodes from energy scavengers. In [10], a complete sensor node solution powered from a TEG connected to a human wrist was able to measure and transmit data every 2 s, with an average power consumption of 50–75 μW. A complete sensor node supplied by a photovoltaic cell is described in [19]. The complete prototype, designed with stacked integrated circuits and including the photovoltaic cell, occupies a total volume of only 1.0 mm³.

Small sensor nodes allow several quality-of-life and biomedical applications. The circuits described in [20] are specifically designed to be implanted in the anterior chamber of the eye, enabling both the measurement of the eye pressure and wireless communication to send the measurement results. The circuits are designed to occupy a total volume of 1.5 mm³, including a photovoltaic cell and a thin-film lithium battery. Targeting a subcutaneous implant, the system powered by the photovoltaic cell presented in [21] consists of a power management unit, a temperature sensor, a Bluetooth Low Energy (BLE) module, and a 7-mAh rechargeable battery. The long-term operation of the subcutaneous implant can be verified using ex-vivo experimental results. A wearable sensor node that measures body temperature and the heartbeat is described in [22]. The sensor node powered by a flexible photovoltaic transducer can perform autonomous 24-h operation. The sensor nodes use the BLE protocol for communication, enabling the implementation of an autonomous WBAN. In a study reported in [23], a body sensor node that acquires and transmits electrocardiogram, electromyogram, and electroencephalogram data was developed. The system is powered by a 30-mV input from a TEG and uses an RF kick-start.

Energy harvesting using ultrasound (US) [24, 25] and inductive links [26] is also a feasible approach for implantable devices, where an external source of energy is placed in a very close location to power the implantable device. A monolithic device that occupies a total volume of 0.065 mm³ is reported in [24]. The device is powered by an external US probe and uses an on-chip piezoelectric transducer to harvest the ultrasound waves. The system is employed as a temperature sensor and to transmit temperature data through acoustic backscattering. The implantable system described in [25] uses a piezoelectric transducer to harvest energy from an external US transceiver. The same piezoelectric transducer is used for the US data uplink. The system is designed to measure pressure through the adoption of a resistive bridge pressure transducer and is comprised of an analog-to-digital converter, a finite-state machine, and a power-management unit.

1.4 Ultra-low-voltage Energy-Harvesting Converters

The voltage level generated by miniature transducers is low and varies widely with the power in the environment. Voltage converters between the transducer (antenna, thermoelectric generator, solar panel, etc.) and the device being powered are required to provide a stable and appropriate voltage level under several conditions of available power. Hence, voltage converters capable of operation with ULV inputs are needed to enable harvesting from the environment even when the available ambient energy is low, as is the case of thermoelectric generators (TEG) operating under low temperature gradients or weak radiofrequency signals captured by small antennas. The most relevant figures of merit for such converters are as follows:

• Input voltage range—A wide range of input voltages is required to provide a stable and adequate output voltage when the level of the ambient power oscillates.

• End-to-end efficiency—The converter should be designed to maximize the extraction of the available power and provide high conversion efficiency.

• Startup voltage—Low startup voltages allow the converter startup and power cycling at typical low levels of ambient power.

• Device size—A compact form factor using a minimum number of off-chip components and chip area is desirable, increasing device portability and reducing implementation costs.

The most common types of converters used to achieve voltage boosting in energy-harvesting interfaces are the switched-inductor and switched-capacitor converters.

1.4.1 Switched-Capacitor Converters

Switched-capacitor converters [27,28,29,30,31] can be fully integrated, with minimal area requirements, although the minimum input voltage for operation of this type of converter is high (100 mV in [27]). Also, the efficiency is low compared with switched-inductor converters, especially at low input voltages (only 33% at 100 mV [27]).

1.4.2 Switched-Inductor Converters

Switched-inductor converters are largely employed as an efficient means of DC-DC conversion in energy-harvesting interfaces [32,33,34]. This type of converter provides high end-to-end efficiency (90.8% reported in [35]), but it is generally comprised of an off-chip inductor and two off-chip capacitors, as will be explained in Chap. 5. Also, this type of converter cannot self-start at low input voltages, requiring auxiliary cold-starter circuits, which can be fully integrated, or rely on off-chip components of large values and high-quality factors (Q). A converter topology including a cold starter and a main converter is shown in Fig. 1.11.

Fig. 1.11

An energy-harvesting interface comprised of a cold starter, the main inductive boost converter, and the load

1.4.2.1 On-Chip Startup Mechanisms

The startup voltages reported in [36, 37] are of the same order of magnitude achieved by switched-capacitor converters and are thus not appropriate when the aim is ULV startup. Several circuit techniques have been proposed for startup to find a trade-off between low-voltage startup and the device size and cost [38,39,40,41].

In [38], an oscillator comprised of Schmitt-trigger stages and a cross-coupled rectifier was used, starting up the converter from an input voltage of 70 mV. By means of a cross-coupled oscillator (XCO) with on-chip inductors and an 8-stage charge pump, the work reported in [39] achieved startup with an input voltage of 65 mV at the cost of 0.65 mm² of silicon area for the inductors. Using stacked inverters to implement an on-chip oscillator and cross-coupled complementary charge pumps, the circuit described in [40] achieves startup for voltages as low as 57 mV.

1.4.2.2 Off-Chip Startup Mechanisms

The minimum voltage for a system startup can be lowered by using off-chip components, such as inductors, capacitors, and/or transformers, rather than on-chip components. A common approach to designing a cold starter is the use of a transformer in an LC oscillator, which is reused in the boost converter topology as the main inductor, as reported in [42, 43] and implemented in off-the-shelf products [44, 45]. The startup voltages of this type of cold starter are very low (21 mV in [43]), but a complex optimization of the transformer is required to achieve low-voltage startup and high efficiency. To provide startup at low input voltages and, simultaneously, high efficiency during steady state, the work reported in [46] uses a purpose-built transformer with a third coil, providing independent optimization of the startup and efficiency. A three-stage voltage converter is described in [34, 47], where an additional auxiliary stage between the steady-state boost converter and the cold starter is introduced, aiming to reduce the loading effects on the cold starter at the cost of increased number of off-chip components and circuit complexity. In [48], a dual-stage converter is described, where the inductor used in the cold-starter Colpitts oscillator is reused by the boost converter in a steady state, achieving startup voltages lower than those of on-chip designs but still higher than those provided by transformer-based oscillators. In [33], an enhanced-swing cross-coupled oscillator (ES-XCO) and a Dickson charge pump (DCP) provide startup for voltage levels as low as 11 mV at the expense of four external inductors for the ES-XCO. In [49], the circuit achieves startup at 50 mV using a one-shot cold-start technique. Although no additional off-chip components are required, the startup circuit relies on an off-chip boost inductor.

1.5 MOS Transistor Modeling for Ultra-Low-Voltage Design

This section provides a concise model of the MOS transistor for the analysis and design of CMOS circuits that operate from reduced supply voltages of the order of some hundreds of mV or even less. The model provides a description of the current versus voltage characteristics of the MOS transistor from weak inversion to strong inversion, but emphasis will be placed on the former, since this is the most common region of operation of MOS circuits supplied by ULV sources.

1.5.1 DC Model of the MOS Transistor

In this subsection, we describe a MOS transistor model suitable for integrated circuit design. In this model, named the unified current control model (UICM), the drain current of the MOSFET is decomposed into its forward (I_F) and reverse (I_R) components [50,51,52]. In the UICM, I_F is dependent on both the gate (V_G) and source (V_S) voltages, while I_R is dependent on both the gate and drain (V_D) voltages, or, algebraically,

$$ {I}_D={I}_F-{I}_R=I\left({V}_G,{V}_S\right)-I\left({V}_G,{V}_D\right). $$

(1.4)

The voltages in (1.4), seen in Fig. 1.12, are referred to the substrate (B). Note that for a long-channel device, I_F is independent of the drain voltage, while I_R is independent of the source voltage.

Fig. 1.12

NMOS transistor symbol. The drain current is the algebraic sum of the forward and reverse currents

The forward and reverse currents can be expressed in terms of the normalized forward (i_f) and reverse (i_r) components of the drain current [50,51,52] as

$$ {I}_{F(R)}={I}_S{i}_{f(r)}, $$

(1.5)

where

$$ {I}_S={I}_{SH}\frac{W}{L} $$

(1.6)

is the specific (normalization) current, whereas W and L are the gate width and length, respectively, and

$$ {I}_{SH}=\mu {C}_{ox}n\frac{\phi_t^2}{2} $$

(1.7)

is the sheet specific current, μ is the carrier mobility, C_ox is the oxide capacitance per unit area, n is the slope factor, and ϕ_t is the thermal voltage. For a given technology, I_SH is slightly dependent on the gate voltage but, for first-order calculations, can be assumed to be independent of bias.

The dependences of the normalized forward (i_f) and reverse (i_r) currents in terms of the applied voltages are given by the UICM [50,51,52] as

$$ {V}_P-{V}_{S(D)}={\phi}_t\left[\sqrt{1+{i}_{f(r)}}-2+\ln \left(\sqrt{1+{i}_{f(r)}}-1\right)\right], $$

(1.8)

where V_P, the pinch-off voltage, is

$$ {V}_P\cong \frac{V_G-{V}_{T0}}{n}, $$

(1.9)

and V_T0 is the equilibrium threshold voltage [50,51,52].

In Fig. 1.13, the drain current of a long-channel MOSFET is plotted in terms of the drain voltage, for constant gate and source voltages. In the region generally referred to as saturation, the drain current is almost independent of V_D. This means that in saturation, I(V_G, V_D)≪I(V_G, V_S) or, equivalently, i_f≫i_r. Therefore, I(V_G, V_S) can be interpreted as the drain current in forward saturation. Similarly, in reverse saturation, I_D is independent of the source voltage. Even though the long-channel DC model is not accurate, it is a good approximation for first-order calculation of the DC current of any MOS transistor.

Fig. 1.13

Output characteristics of a long-channel NMOS transistor for constant V_S and V_G

Let us now show the simplified results for operation of the transistor either in strong inversion or in weak inversion. Roughly speaking, weak inversion (WI) is a condition for which both inversion levels i_f and i_r are much less than unity, say 0.1 or less. In this case, the drain current is approximated as

$$ {I}_D={I}_X\left[{e}^{\frac{\left({V}_P-{V}_{SB}\right)}{\phi_t}}-{e}^{\frac{\left({V}_P-{V}_{DB}\right)}{\phi_t}}\right]={I}_X{e}^{\left({V}_P-{V}_{SB}\right)/{\phi}_t}\left[1-{e}^{-{V}_{DS}/{\phi}_t}\right], $$

(1.10)

where

$$ {I}_X=\mu {C}_{ox}n{\phi}_t^2{e}^1\frac{W}{L}. $$

(1.11)

Note that for WI, we have V_P − V_S(D) ≪ − ϕ_t. From (1.10), we can see that the current saturates for V_DS > 4ϕ_t at a value equal to

$$ {I}_D={I}_X{e}^{\left({V}_P-{V}_{SB}\right)/{\phi}_t}\cong {I}_X{e}^{\frac{\left({V}_{GB}-{V}_{T0}\right)}{n{\phi}_t}}{e}^{-\frac{V_{SB}}{\phi_t}}. $$

(1.12)

Figure 1.14 shows the WI characteristics of a long-channel MOSFET [53]. The drain current increases one decade per 2.3nϕ_t of increase in the gate voltage and decreases one decade per 2.3ϕ_t (around 60 mV at 20 °C) increase in the source voltage. The output characteristics in weak inversion saturate for a drain-to-source voltage of around 4ϕ_t, or around 100 mV at 20 °C.

Fig. 1.14

Forward characteristics in weak inversion. (Adapted from [53])

For strong inversion (SI), V_P − V_S(D) ≫ ϕ_t. Thus, the drain current becomes approximately

$$ {I}_D=\mu {C}_{ox}n\frac{W}{2L}\left[{\left({V}_P-{V}_S\right)}^2-{\left({V}_P-{V}_D\right)}^2\right], $$

(1.13)

which for n = 1 (negligible body effect) coincides with the usual formula of the current of MOSFETs given in classical textbooks [5] and reproduced below:

$$ {I}_D=\mu {C}_{ox}\frac{W}{2L}\left[{\left({V}_{GS}-{V}_{T0}\right)}^2-{\left({V}_{GD}-{V}_{T0}\right)}^2\right]. $$

(1.14)

In this book, we place greater emphasis on the weak inversion region, because for low supply voltages, the MOSFETs will generally operate in this region.

1.5.2 Low-Frequency Small-Signal Model of the MOS Transistor

At low frequencies, the small-signal model of the MOSFET is characterized by four transconductances, as shown in Fig. 1.15.

Fig. 1.15

Low-frequency small-signal model of the MOSFET

The gate, source, drain, and bulk transconductances are given by

$$ {g}_{mg}=\frac{\partial {I}_D}{\partial {V}_G},\kern1.25em {g}_{ms}=-\frac{\partial {I}_D}{\partial {V}_S},\kern1.25em {g}_{md}=\frac{\partial {I}_D}{\partial {V}_D},\kern1.25em {g}_{mb}=\frac{\partial {I}_D}{\partial {V}_B}. $$

(1.15)

Using the UICM of expression (1.8), the source and drain transconductances can be expressed as

$$ {g}_{ms(d)}=\frac{2{I}_S}{\phi_t}\left(\sqrt{1+{i}_{f(r)}}-1\right). $$

(1.16)

Equation (1.16) for the transconductance is a universal expression that allows the source and drain transconductances of a long-channel MOSFET to be computed in terms of the inversion level i_f(r).

The gate transconductance can be written as

$$ {g}_{mg}=\frac{g_{ms}-{g}_{md}}{n}. $$

(1.17)

For a long-channel MOSFET in saturation, i_r ≪ i_f, and consequently g_mg ≅ g_ms/n. Lastly, the bulk transconductance g_mb can be calculated from

$$ {g}_{ms}={g}_{md}+{g}_{mg}+{g}_{mb}. $$

(1.18)

The small-signal transconductances, along with their dependence on the inversion levels, are instrumental for designing low-voltage oscillators, as we will see in Chap. 2.

1.5.3 Medium-Frequency Small-Signal Model of the MOS Transistor

A medium-frequency small-signal model of the MOSFET model, such as the one shown in the schematic in Fig. 1.16 [51, 52, 54], is suitable for the ULV applications covered in this book. Figure 1.16 includes five intrinsic capacitances, each of them defined as follows:

Fig. 1.16

Intrinsic small-signal MOSFET model. The complete small-signal model must include the extrinsic capacitances

$$ {C}_{jk}=-\frac{\partial {Q}_j}{\partial {V}_k}, $$

(1.19)

where Q_j is the electrical charge associated with terminal j. The dependence of the capacitances on the operating point can be found in [51, 52, 54].

In addition to the intrinsic capacitances, the charge storage in the extrinsic parts of the MOS transistor must be incorporated into the model of Fig. 1.16. The overlap between the gate and the source and drain diffusions originates the overlap capacitances. In parallel with the overlap capacitance, the outer fringing and top capacitances must be included. The substrate-source and substrate-drain junctions must also be modeled by the nonlinear diode capacitances. Lastly, the extrinsic gate-to-bulk capacitance must be incorporated into the medium-frequency model [52, 54].

1.5.4 Diode-Connected MOS Transistors

Diodes are essential components for application in rectifier and charge-pump circuits. In this subsection, we examine some possible realizations of diodes.

We start with the Shockley equation of the p-n junction diode, which expresses the current I_D through the diode in terms of the diode voltage V_D as

$$ {I}_D={I}_{SAT}\left({e}^{\frac{V_D}{{n\phi}_t}}-1\right), $$

(1.20)

where I_SAT is the saturation current and n is the ideality factor, typically a number between 1 and 2. The p-n junction diodes of CMOS technologies are, in general, not appropriate for ULV applications due to the extremely low value of the saturation current per unit area along with its strong dependence on the temperature. However, for ULV applications, we can configure MOS transistors to operate as diodes, as we will see next.

Figure 1.17 shows two possible topologies for the MOS transistor connected as a diode. Note that the current through the device is composed of the transistor channel current plus the current through the p-n junction diode. The disadvantage of the MOS transistor in the usual connection, with the substrate (B) connected to the source (S) (Fig. 1.17a), is that the MOS diode and the p-n junction diode are connected in antiparallel. Consequently, when the MOS diode is reverse-biased, the p-n junction is forward-biased. As a result, we have a current that increases exponentially with the reverse voltage. To avoid the antiparallel connection of the MOS diode and the p-n junction, the dynamic threshold voltage MOSFET (DTMOS) configuration shown in Fig. 1.17b can be used. In this case, the channel and junction diodes are in parallel. The DTMOS can be used for p-channel transistors in an n-well process or for n-channel transistors in a p-well process or in triple-well processes. To model the MOS diodes, let us use, for simplicity, the WI model.

Fig. 1.17

MOSFET connections as a diode: (a) MOS transistor with the bulk connected to the source and (b) MOS transistor with the bulk connected to the gate and drain terminals

According to (1.10), the drain current for the MOS diode in Fig. 1.17a is

$$ {I}_{DS}={I}_X{e}^{-\frac{V_{T0}}{n{\phi}_t}}\left[{e}^{\frac{V}{n{\phi}_t}}-{e}^{\frac{-\left(n-1\right)V}{n{\phi}_t}}\right]. $$

(1.21)

Equation (1.21) shows that the reverse current of the MOS diode increases exponentially with the reverse voltage applied to the device. Note that the extrinsic p-n junction also contributes to the increase in the reverse current.

For the DTMOS connection, using Eq. (1.10) with V_GB = 0, −V_SB = −V, and V_DB = 0 yields

$$ {I}_{DS}={I}_X{e}^{-\frac{V_{T0}}{n{\phi}_t}}\left[{e}^{\frac{V}{\phi_t}}-1\right]. $$

(1.22)

As Eq. (1.22) shows, the DTMOS diode behaves as an ideal diode with ideality factor n = 1 for low-voltage operation (weak inversion). As is clear from Eqs. (1.21) and (1.22), the requirements for a high saturation current of the DTMOS are a low V_T0 and a high aspect ratio.

1.6 Transistor Selection and Characterization

Selecting an appropriate technology is of utmost importance for ULV circuits. Enhancement-mode devices , such as MOS transistors with threshold voltage in the range of 0.3–0.5 V, operate with very low current density for supply voltages below 100 mV and are, thus, of very limited practical utility [55]. MOS transistors with low or near-zero threshold voltages are particularly suitable for ULV circuits due to their current drive capability and sufficient voltage gain at very low supply voltages. As can be seen in the experimental plot of I_D vs. V_DS for the zero-VT transistor in Fig. 1.18, the device presents a current capability of some hundreds of micro-amperes, for low or negative values of V_GS.

Fig. 1.18

Output characteristics of a zero-VT transistor with W/L = 2500 μm/420 nm

The intrinsic voltage gains of the common-gate and common-source amplifiers, Av,cg and Av,cs, respectively, of a zero-VT transistor are shown in Fig. 1.18. Assuming the operation of the transistor in weak inversion in the triode region [55], we have

$$ Av, cg=\frac{g_{ms}}{g_{md}}={e}^{\frac{V_{DS}}{\phi_t}}, $$

(1.23)

and

$$ Av, cs=\frac{g_m}{g_{md}}=\frac{g_{ms}-{g}_{md}}{n{g}_{md}}=\frac{e^{\frac{V_{DS}}{\phi_t}}-1}{n}. $$

(1.24)

For the common-source amplifier, the voltage gain equals unity for V_DS = (kT/q)ln(1 + n). On the other hand, the common-gate amplifier provides a voltage gain of greater than unity for V_DS > 0. This property of the common-gate amplifier is very useful for lowering the supply voltage limit for the operation of oscillators.

1.6.1 Extraction of the Main MOSFET Parameters

The main parameters of the MOS transistor (V_T, I_S, and n) used in calculations throughout this book were extracted using a procedure based on the transconductance-to-current ratio (g_m/I_D) [50]. Briefly, V_T, I_S, and n are extracted from I_D − V_G measurements in the circuit shown in the lower part of Fig. 1.19. For V_DS = ϕ_t/2, V_T is the gate voltage at which the condition g_m/I_D = 0.53.(g_m/I_D)_max holds. Also, the specific current I_S = 1.63${I}_D^{\ast }$, ${I}_D^{\ast }$ being the drain current determined when V_G = V_T. Because (g_m/I_D)_max = 1/nϕ_t, the slope factor n is easily extracted from the peak of the g_m/I_D curve and the temperature. Even though n decreases slightly with the increasing gate voltage, it is assumed to be independent of V_G for the calculations in this book.

Fig. 1.19

Experimental g_m/I_D curve of a zero-VT transistor with W/L = 1500 μm/420 nm and the circuit configuration for extracting the main static MOSFET parameters

1.6.2 Comparison Between Zero-VT and Standard Transistors Operating as Diodes

A comparison between the zero-VT and the standard transistors, both connected as diodes, is shown in Fig. 1.20. As can be seen in the graphs, for low V_D, the zero-VT MOSFET presents a saturation current more than two orders of magnitude higher than that of a conventional transistor of the same area available in a 130-nm process.

Fig. 1.20

Simulated I_D vs. V_D characteristics of the standard and zero-VT transistors available in the 130-nm technology, both connected as diodes with W/L = 4.2 μm/420 nm. The dashed line represents the ideal Shockley behavior given by (1.20) with n = 1.4 for both devices