Abstract
Compiler-directed dynamic voltage scaling (DVS) is one of the effective low-power techniques for real-time applications. Using the technique, compiler inserts voltage scaling points into a real-time application, and supply voltage and clock frequency are adjusted to the relationship between the remaining time and the remaining workload at each voltage scaling point. In this paper, based on the WCET (the worst case execution time) analysis tool HEPTANE and the performance/power simulator Sim-Panalyzer, we present a DVS-enabled simulation environment RTLPower (Real-Time Low Power), which integrates static WCET estimation, performance/power simulation, automatically inserting the DVS code into a real-time application, and profile-guided energy optimization. By simulations of some benchmark applications, we prove that the DVS technique and the profile-guided optimization technique significantly reduce energy consumption.
Supported by the National High Technology Development 863 Program of China under Grant No. 2004AA1Z2210 and Server OS Kernel under Grant No. 2002AA1Z2101.
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Huizhan, Y., Juan, C., Xuejun, Y. (2006). Static WCET Analysis Based Compiler-Directed DVS Energy Optimization in Real-Time Applications. In: Jesshope, C., Egan, C. (eds) Advances in Computer Systems Architecture. ACSAC 2006. Lecture Notes in Computer Science, vol 4186. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11859802_11
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DOI: https://doi.org/10.1007/11859802_11
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