1 Introduction

Metabolic monitoring of various human physiological parameters such as glucose, lactate, pH, CO2, O2, etc., has been a burgeoning research area for the past few decades. Continuous in vivo monitoring and long term reliability are the required key features of any implantable sensor system. Various cost effective, miniature, and energy efficient biomedical sensors have been developed as a result of technological breakthroughs of micro- and nano-fabrication processes. Figure 1 shows the block diagram of an implantable sensor system. Varying sensor signals require electronic circuitry to convert the changing signal into digital data to be transmitted outside of the biological environment for further diagnostics and processing.

Fig. 1
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Implantable sensor and sensor electronics

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Supplying power to the sensor and the data generator unit is a critical design issue. Power transfer using tethered cables can result in skin infections and irritation [1]. Biohazard due to potential leakage of hazardous battery fluid makes the usage of battery powered operation undesirable. Power transfer to the implanted unit using inductive power link shows greater promise and does not demonstrate any of the aforementioned problems [2]. However, the inductive power link is suitable only for low-voltage, low-power operation. Therefore, the inductively-powered implant unit must work with low-power and low-voltage for long term reliable operation of the sensor system.

The demand for energy efficient, implantable medical devices has emphasized circuit design with low supply voltages and low power consumption. The use of a cascode structure yields high output impedance and therefore it is an attractive design choice. However, for a supply voltage of less than 2 V, the cascode circuits are often not feasible due to the reduced voltage headroom. In this sub-micron CMOS era, supply voltages are decreasing with each technological leap, but the threshold voltage and the drain-source saturation voltage are not scaling down at the same rate due to the subthreshold current considerations for the digital circuitry in a mixed-signal environment [3]. This limits the supply voltage headroom and causes many difficulties and challenges in the design of analog and RF circuits. To overcome these problems several techniques have been reported [4] such as the use of (a) bulk driven MOSFET (b) floating gate MOSFET, and (c) self-cascode structure. Another excellent choice for the design of low-power circuits is the use of subthreshold MOSFET biasing [5]. MOSFETs working in subthreshold region enable extremely low-power operation. The subthreshold current of a MOSFET exhibits exponential behavior with variation in the gate bias voltage and offers higher transconductance efficiency (gm/Id). A higher gm/Id allows the circuit to achieve desired performance at low power.

Wireless telemetry of the sensor data poses another design challenge for low-power wireless sensor network (WSN) or wireless body area network (WBAN). Typically, the transmitter unit consumes a significant fraction of the power in a WSN. The power consumption of each node in an energy harvested WSN must be less than 100 μW for long term, maintenance-free operation. Conventional narrowband continuous carrier-based communication systems incur steady power loss making reduced power consumption quite difficult below a certain limit. On the other hand, impulse radio architectures work on narrow pulses with a wide band frequency spectrum. As a result, static power consumption can be significantly reduced. Additionally, impulse radio systems can operate in the same spectrum as narrowband technology without causing excessive interference because the power spectral density of the impulse signals is extremely low.

In this work, a low-power sensor signal processing and impulse radio based wireless telemetry scheme is presented. The proposed Data Generator Block, converts an electrochemically generated DC current ranging from 0.2 to 2 μA to digital data. The circuit consists of current mirrors employing a self-cascode structure and a ring oscillator circuit to periodically charge or discharge three capacitors to generate frequency-modulated digital pulses. All MOSFETs are biased in the subthreshold region for low power operation. Unlike conventional cascode structures which require higher supply voltages, the self-cascode structure assists in achieving low-power operation by introducing higher resistance in the conducting path without substantially intensifying the supply voltage requirement. The Wilson current mirror topology provides better regulation and higher output resistance. The circuit operates with a 1 V supply voltage and consumes 2.575–4.29 μW of power depending on the sensed current and the corresponding digital pulse frequency indicating superior performance over the previously reported work [6].

The impulse radio architecture has been implemented using an Impulse Generator Block and a Buffer Block. The Impulse Generator Block utilizes an RC network to generate impulses of approximately 55 ns duration. Finally, a Buffer circuit is used to drive a standard 50 Ω load such as an external antenna. The Buffer block works with a 2 V power supply while the peak output power of the impulse train is about of −54 dBm which satisfies the FCC standard [7]. The peak current consumption of each impulse is 2.11 mA with a peak output voltage of 72 mV making it extremely suitable for short range wireless communication. The proposed system has been designed and fabricated using a 90 nm standard CMOS process. The average power consumption of the entire system is only 22.10 μW.

The organization of the paper is as follows. Section 2 gives a short description on the proposed impulse radio architecture. Section 3 describes different blocks of the proposed system. Simulation results are presented in Sect. 4 and finally, conclusions are drawn in Sect. 5.

2 Impulse radio architecture for biomedical application

The impulse radio architecture works on narrow pulses instead of continuous carrier signals. Due to impulse signals having the characteristic of extremely low power spectral density, the impulse radio architecture can work in the same spectrum with existing narrowband architectures without causing unwanted interference [8]. Usually, infrared or ultrasonic signals, which require line-of-sight transmission, are used for indoor applications. These signals can easily be obstructed by objects or other interfering factors. However, the impulse radio architecture resolves multipath fading and can easily penetrate through walls [9]. Another salient feature of the impulse radio is its low and high data rate handling capability making it viable in numerous applications. Interference-free operation between multiple devices within a sensor network is ensured by the small amount of energy dissipated at a specific frequency by the narrow pulses. Due to low average power and bandwidth spreading, the receiver for the impulse radio architecture needs to be close to the transmitter. In addition, prior knowledge of the time of arrival of the data is required for detection of the information. Thus, it is very hard to breach the security of the ultra wideband communication system [10] which provides a safeguard against the growing concern of medical identity theft [11]. A pro-active WBAN can easily be constructed using the impulse radio architecture to monitor various vital information of a human object. In this scheme, various implantable or transdermal sensing elements with impulse radio telemetry will be placed inside or on the surface of the human body. The system will continuously monitor various physiological parameters and wirelessly send the signals to a nearby hub station such as a smart phone or a PDA. Afterwards using existing communication technologies the sensor data will be sent to a remote hospital, nurse, or healthcare provider for further diagnostics and necessary actions will be initiated. In the near future, WBAN is expected to co-exist with the installed infrastructure to help augment data collection and provide real-time response amongst patients and healthcare providers.

A wireless sensor or body area network consists of many distributed sensor nodes which are expected to operate for years with little to no maintenance. Therefore, each sensor node requires a highly integrated, low-cost, energy efficient transceiver with low-power consumption. The average power consumption of a radio interface in a WBAN must be less than 100 μW [12]. A WBAN utilizes a one-hop star topology where each tiny sensor node works on a limited power budget while the network hub works with adequate power budget. As a result, most of the network handling complexity is shifted to the hub device rather than the individual sensor node [13]. Each sensor node contains only a transmitter unit which transmits data based on some beacon signals from the hub unit. In an impulse radio based transmitter system, the transmitter structure is kept simple and most of the circuit complexity is shifted towards the receiver unit [14]. In addition, power hungry circuits necessary for narrowband communication systems such as mixers, RF oscillators, or phase-locked loops can be omitted in impulse radio systems [15]. As a result, the impulse radio architecture makes it relatively easy to reduce the average power consumption of each sensor node to less than 100 μW and ensure extended lifetime. The considerable complexity reduction of the impulse radio transmitter unit and the noise-like impulse based communication make the impulse radio architecture a highly secure and reliable candidate for biomedical applications.

3 System architecture

Figure 2 shows the block diagram of the proposed system. It manifests a Data Generator Block, an Impulse Generator Block, and a Buffer Block. The detail descriptions of the blocks are as follows.

Fig. 2
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Block diagram of the proposed system (rectangle box)

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3.1 Data Generator Block

For any implantable electrochemical sensor embedded inside a human body, the sensor current needs to be processed and converted to a digital data with minimal energy consumption. CMOS circuit design using strong inversion MOSFET offers high speed and high data rate handling capabilities. But at the same time it consumes a large amount of power from the supply source. Taking advantage of low data-rate (usually <250 Kbps) requirement for biomedical applications, one can design a circuit using subthreshold region of operation of MOSFETs. MOSFETs operating in subthreshold region offer higher transconductance efficiency (gm/ID) and help achieve low-power operation.

The proposed Data Generator Block has been designed using subthreshold MOSFET configuration. The circuit schematic of the block is shown in Fig. 3. At the first stage, a self-cascode structure based current mirror has been used to draw the sensor current as an input and isolate the sensor unit from rest of the Data Generator Block. Self-cascode structure helps achieve higher output impedance in the signal path without degrading the voltage headroom appreciably. The mirror current is then used to control the source and the sink currents of a three-stage inverter based ring oscillator. Wilson current mirror structure at the top and self-cascode structure at the bottom of the ring oscillator provide better control of the bias currents in each stage and facilitate symmetric swing of the ring oscillator output. The output frequency of the ring oscillator is defined by,

$$ f_{osc} = \frac{1}{T} = \frac{1}{{2N\tau_{d} }} $$
(1)

where N is the number of stages and τd is the delay of an individual stage. However τd is related to the sensor current by the following equation,

$$ \tau_{d} \, = \,\frac{{V_{osc} \,C}}{{I_{sensor} }} $$
(2)

where C is the capacitance of the individual stage, V osc is the oscillation amplitude and I sensor is the sensor current. Now combining Eqs. (1) and (2), we get,

$$ f_{osc} = \frac{{I_{sensor} }}{{2N \cdot V_{osc} C}} $$
(3)
Fig. 3
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Circuit schematic of data generator block

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From Eq. (3), it is obvious that the frequency of oscillation of the ring oscillator is directly proportional to the sensor current.

3.2 Impulse Generator Block

The block diagram of the Impulse Generator unit is shown in Fig. 4. It consists of two inverters, one capacitor, one PMOS resistor and one diode-connected NMOS transistor. The main purpose of the Impulse Generator Block is to generate narrow pulses corresponding to each data pulse. The first inverter (INV1) isolates the data signal from the RC network formed by the capacitor (C) and the PMOS resistor (M2). It also provides reverse isolation of the data signal from any unwanted switching. Whenever the output of INV1 is zero, the capacitor C starts charging through the PMOS resistor M2. As long as the voltage across the capacitor is less than the threshold level of the second inverter INV2, a positive pulse is generated at the output of the inverter INV2. By fine tuning the values of the capacitor C and the PMOS resistor M2, the pulse duration of the INV2 can be made extremely small so that the output pulse behaves like an impulse. The pulse width of the generated impulse signal is defined by,

$$ t_{pw} = RC\,{\text{In}}\,\left( 2 \right) $$
(4)

where the threshold voltage of the INV2 is considered to be half of the supply voltage. The value of R can be found from the following equation,

$$ R = \left( \frac{L}{W} \right)_{p} \cdot \frac{1}{{\mu_{p} C_{ox} \left( {V_{DD} - |V_{thp} |} \right)}} $$
(5)

where (L/W) is the inverse aspect ratio, μ p is the PMOS hole mobility, C ox is the oxide capacitance per unit area, V DD is the supply voltage and V thp is the threshold voltage of the PMOS transistor M2. The Impulse Generator Block can generate an impulse signal of approximately 55 ns duration. The diode connected NMOS M1 is used in this structure to ensure the generation of only one pulse for each data period.

Fig. 4
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Impulse generator schematic

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3.2.1 Buffer Block

The Buffer Block is used to drive any standard 50 Ω load. The circuit diagram of the unit is shown in Fig. 5. It takes the impulse as an input and generates a current for the current mirror formed by M2-Mp. Large current mirror ratio of the Mp transistor drives a large amount of current to drive the standard 50 Ω load. Relatively smaller dimension of the M1 transistor does not load the Impulse Generator Block and the generated impulse signals.

Fig. 5
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Schematic of the buffer

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4 Results

The Data and the Impulse Generator Blocks operate with a supply voltage of 1 V. The Data Generator Block takes an electrochemical sensor current in the range of 0.2–2 μA and consumes a power in the range of 2.575–4.29 μW which indicates superior performance than the previously reported work [6] where the system designed in 0.35-μm CMOS process works with 1.5 V supply and consumes 100 μW of power.

Figure 6 shows the generated square wave signal from the Data Generator Block and impulses after the Buffer Block for a sensor current of 2 μA. The square wave signals have almost 50 % duty cycle without the aid of additional pulse shaping circuitry thereby greatly reducing the power consumption.

Fig. 6
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Data output (top) of frequency 117.273 kHz and impulses (bottom) for a sensor current of 2 μA

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Figure 7 is a closer view of the signals for further inspection of the generated impulse signal. The Buffer Block works with a supply voltage of 2 V and the peak current consumption of the impulses is 2.11 mA with peak output voltage of 72 mV and pulse duration of 55 ns. This makes it extremely suitable for short range wireless communication. The measurements were taken while driving a 50 Ω load and the total power consumption of the entire unit is only 22.10 μW.

Fig. 7
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Zoomed view (top) of impulse (bottom) for a sensor current of 2 μA

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Table 1 depicts the variation of data frequency and power consumption for different sensor current levels. Figure 8 shows the linearity performance of the data signal with different sensor current levels. The R2 values of 0.9965 and 0.9961 indicate the high degree of linearity of the circuit blocks.

Table 1 Variation of data frequency and power consumption with different sensor current level
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Fig. 8
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Linearity performance of the Data Generator Block

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Finally Fig. 9 shows the power spectrum of the generated impulse signals. The peak output power of the power spectrum is in the range of −54 dBm which complies with the FCC standard of −40 dBm in this frequency range. The first lobe of the power spectra contains frequency contents ranging from data frequency to 9 MHz. Literature review shows that any frequency in the range of 1–10 MHz penetrates the body tissue efficiently without significant loss of the signal strength. As a result the generated power spectrum is best suited for low-power short distance (~2 cm) inter-body implant communication. The microphotograph of the fabricated IC showing the Data Generator Block, the Impulse Generator Block, and the Buffer Block are included in Fig. 10.

Fig. 9
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Power spectrum of the generated impulse signal

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Fig. 10
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Chip microphotograph of the Impulse Radio blocks

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5 Conclusion

An ultra low-power signal processing and impulse radio architecture based telemetry unit has been designed and simulated using standard 90-nm CMOS process. Subthreshold region operation of MOSFETs and self-cascode structure within the signal processing unit facilitate low-voltage and extreme low-power operation. The signal procesing unit can work with 1 V power supply and consume only 2.575 μW of power for a sensor current of 0.2 μA. The Buffer Block works with 2 V supply to drive sufficient amount of current to any external 50 Ω load. The peak current consumption of the impulses is 2.11 mA with peak output voltage of 72 mV. The pulse width of each impulse is 55 ns and the generated peak power spectra satisfies the FCC standard.