1 Introduction

Thin-film technology has been widely used in the production from past to present and characterization of variety of devices derived from traditional metal–semiconductor (MS) with Schottky barrier (SB) formation between metal and semiconductor [1, 2]. Recent experimental results have shown that addition of an interface layer in this structure by different methods affects significantly the electronic characteristics and capacitive behavior of this type of diodes. Thus, the demands in a wide variety of electronic applications have triggered the use of interface layers where different deposition methods have been point of interest to reach feasible regions of interest. In this field, the presence of this interlayer can change the electrical characteristics of MS diode. The layer intentionally formed or self-generated oxide layer on the semiconductor surface can affect ideality of the diode behavior. It is a well-known fact that oxide/dielectric/insulator layers behave different than native oxide layer on the active semiconductor layer [3,4,5]. Most of the works on this SiO2 layer have been retained its popularity with external deposition by different methods since it can provide inherent chemical and thermal stability on active semiconducting layer where it is commonly chosen as n- or p-type Si wafers [6,7,8]. Because of suffering from high leakage currents with SiO2 interface layer, high-dielectric materials such as TiO2, HfO2 and ZrO2 have been a point of interest in the diode applications as a potential candidate for SiO2 [9,10,11,12,13,14,15]. At this point HfO2 has attracted great interest as being a high-dielectric layer at the interfacial layer in which the reported studies on the use of this layer indicate reducing effect in the leakage current and being thermodynamically stable in contact with the surface of semiconductor substrate [16,17,18,19,20]. It is popular with the material characteristics of large band gap, high dielectric constant and resistivity [21,22,23]. At the interface, the high dielectric behavior of HfO2 offers variety of advantageous, especially low leakage current and high barrier height to limit tunneling conduction in the diode [24, 25].

The surface properties and high-quality of HfO2 layer strongly depend on deposition techniques and conditions of the interfacial layer and the preparation conditions of the HfO2 surface before deposition of rectifying contact [26,27,28]. In literature, several deposition techniques, mainly atomic layer deposition (ALD), molecular-beam epitaxy (MBE), sputtering and meal-organic chemical vapor deposition (MOCVD), have been used to grow HfO2 on semiconductor [29,30,31,32]. Among them, ALD technique with its submonolayer-by-submonolayer deposition mode characteristic has been preferred in thin-film deposition to achieve conform and uniform film thickness with monolayer precision and it is one of the feasible techniques for depositing oxide materials in the fabrication of MIS structures [33,34,35,36]. The oxide materials play significant roles in the forming of the barrier height (BH) in these structures. The addition of an oxide layer between semiconductor and metal has been widely used to modify the capacitance–voltage (C–V), conductance–voltage (G–V) and current–voltage (I-V) characteristics of the diode where it generally results in increasing the BH of the structure [1]. Analysis of these behaviors of the MIS structures in the narrow voltage range and at only room temperature does not give detailed information about the nature of barrier formed at metal/semiconductor interface and the conduction process. The characteristic plots of G–V, C–V and I–V have been ensured to achieve correct and certain knowledge concerning electrical properties of the MIS diodes.

In literature, there are several works on metal/GaAs and metal/insulator/GaAs diodes [10, 36,37,38,39,40,41]. Among them, Ozdemir et al. have studied the effects of the time-dependent and exposure time to air on Au/n-GaAs diode where n values were reported in between 1.089 and 1.46 at room temperature [37]. On the other hand, Biber et al. have studied BH enhancement in Au–Ge/n-GaAs diode with anodization process. The values of BH and n were found in a range of 0.730 to 0.667 eV and 1.09 to 1.46, respectively [38]. With different rectifying contact, Biyikli et al. have studied electrical characteristics of Au/Ti/n-GaAs diode and the value of BH was presented in an interval of 0.75–0.76 eV and n values were in between 1.07 and 1.08 [36]. As an MIS diode interlayered with HfO2, Budhraja et al. have fabricated the Ti/Au/HfO2/GaAs annealed structure and interface density for this diode structure was determined 6.48 × 1013 cm−2 eV−1 and the Be/Au/HfO2/GaAs as-deposited 2.28 × 1013 cm−2 eV−1[41]. In addition, Karabulut has investigated conduction mechanisms of Au/Ti/n-GaAs with HfO2 layer in the temperature range of 60–400 K and in this work, barrier of the Au/Ti/HfO2/n-GaAs diode has modeled by double-Gaussian distribution (GD) [10].

In the present study, the electrical characteristics of the Al/Ti/HfO2/GaAs diode structure were investigated where HfO2 layer was deposited by ALD technique on chemically cleaned polished GaAs wafer, and the Au/Ti top-ohmic contact was obtained with elemental evaporation. The main diode parameters as saturation current (Io), ΦBo and n were derived from the conventional thermionic emission (TE) model applied to the I–V values measured over the temperature range of 60–320 K under dark. Besides, the results of G–V and C–V measurements of Al/Ti/HfO2/GaAs MIS diode were studied to determine Rs, Z and phase angle at 1000 kHz over temperature range of 60–320 K. In addition, the Dit of Al/Ti/HfO2/GaAs diode were calculated from C–V and I–V measurements. In addition, the Qeff and Neff values were evaluated.

2 Experimental procedure

An Au/Ti/HfO2/n-GaAs MIS diode was fabricated on an n-type GaAs sample with the carrier concentration of 6.8 × 1015 cm−3, the (100) crystal orientation, diameter of 2 in. and having a thickness of 300 µm, 7.43 × 1015 cm−3 carrier concentration and 1.2 Ω cm resistivity (given by the manufacturer). Initially, the GaAs substrate was cleaned [10, 36] and the optimized deposition procedure to form back contact (ohmic contact) for the GaAs semiconductor was applied as given in Ref. [35]. Ohmic contacts with low resistance are necessary for high performance in many III–V devices. In fact, the efficiency of light-emitting diodes (LEDs) and lasers is strongly influenced by contact resistance, and the noise behavior and the gain of a field-effect transistor (FET) are significantly affected by the electrical response of ohmic contacts. Therefore, depending on its contact resistance, pure In metal has been used to form a low-resistance contact to n-type GaAs and an alloy of In-Zn has been presented as being a best choice for contacting p-type GaAs [42,43,44,45,46]. However, In-ohmic contact resistance can be tuned to 1.5 × 10–5 Ω cm2 at annealing temperature of 380 °C [42]. The similar results can be seen in the specific contact resistance of In/GaN where the contact resistivity of the In-contact on GaN was as low as 2.2 × 10–5 Ω cm2 after annealing at 300 °C [43]. In the current work, the resistivity of In-metal contact on n-GaAs was determined using ohmic J–V curve of In/n-GaAs structure and it was found as about 3 × 10–4 Ω cm. This value can be used to verify the ohmic nature of this metal contact on GaAs substrate. In addition, the contact resistivity of the In-contact was calculated as 1.5 × 10–4 Ω cm which is similar with literature [42,43,44]. To construct MIS diode structure, HfO2 interfacial layer was deposited on the GaAs sample by an ALD system (Savannah S100 ALD). Deposition was performed at 200 °C [10, 47,48,49] and after this deposition step, Au/Ti rectifier front contacts were formed on HfO2 layer. In this process, Ti (10 nm) and Au (90 nm) contacts were sequentially evaporated on HfO2/n-GaAs structure by the magnetron DC sputtering technique in a high-vacuum system of 10−6 Torr [10, 36]. Au/Ti contact was preferred to obtain low barrier formation, since work function of Au/Ti is smaller than Au. At this point, there are some works to analyze BH of Ti and Au/Ti Schottky contacts on n-InAlAs and these values were reported 0.64 and 0.55 eV, respectively [50, 51]. In the current MIS structure, the Au thin film was used as a top layer to protect the Ti metallic layer on the GaAs substrate. In other words, Au was selected as the second layer to prevent oxidation and also to promote current spreading, and to provide good smoothness to the contact [36, 49]. It is a common technique that Au overlayer is deposited on top to enhance conductivity and prevents resistance problems [52]. Therefore, Au/Ti layer was preferred instead of one-type metal contact such as Au or Ti. Figure 1a, b shows the schematic model and energy band diagram of the MIS, respectively.

Fig. 1
figure 1

(Color online) a Schematic model and b energy band diagram of the Au/Ti/HfO2/n-GaAs diode

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After the fabrication process, I–V, C–V and G–V measurements of the MIS diodes were performed in a wide temperature range of 60–320 K. To investigate the surface morphology of the GaAs substrate and HfO2 layer, atomic force microscopy (AFM) images were obtained by PARK system XE 100E AFM. The electrical measurements were carried out by a Leybold Heraeus closed-cycle helium cryostat, a Keithley 487 Picoammeter voltage source and a HP model 4192A LF impedance analyzer under dark conditions.

3 Result and discussion

The 2D and 3D images AFM images of the GaAs substrate are shown in Fig. 2a, b, respectively. From 2D planar view, root-mean-square (RMS) roughness value of the GaAs substrate was obtained as 895 pm. In addition, the 2D and 3D AFM images of the HfO2 are presented in Fig. 3a, b, respectively. The HfO2 layer exhibited uniform and homogenous surface and the RMS roughness value of this film layer was obtained 1.2 nm.

Fig. 2
figure 2

(Color online) a 2D and b 3D for the surface morphology of GaAs substrate, the RMS value is 895 pm

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Fig. 3
figure 3

(Color online) a 2D and b 3D for the surface morphology of deposited 5 nm HfO2 on substrate, the RMS value is 1.20 nm

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Figure 4a shows the measured I–V characteristics for Au/Ti/HfO2/n-GaAs MIS diode in the temperature range of 60–320 K. The main electrical parameters were determined from the linear part of these I–V curves at each temperature according to TE equation [10, 26, 36, 38, 40, 53]:

$$I = I_{{\text{o}}} \left[ {\exp \left( {\frac{{q(V - IR_{{\text{s}}} }}{nkT}} \right) - 1 } \right]$$
(1)
Fig. 4
figure 4

(Color online) a Experimental forward bias current versus voltage characteristics with the sample temperature as a parameter for the Au/Ti/HfO2/n-GaAs diode, b\(\Phi_{{{\text{Bo}}}}\) versus (2kT)−1 Gaussian plot

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where \(I_{{\text{o}}}\) is the saturation current in a relation with temperature as

$$I_{{\text{o}}} = AA^{*} T^{2} \exp \left( { - \frac{{e\Phi_{{{\text{Bo}}}} }}{kT}} \right)$$
(2)

and \(\Phi_{{{\text{Bo}}}}\) is the zero bias effective BH, A is the rectifying contact area of the diode, A* is the effective Richardson constant, n is the ideality factor and T is the absolute temperature. Using the intercept of the linear I–V relation for each temperature step in Fig. 4a, the values of \(\Phi_{{{\text{Bo}}}}\) were extracted and tabulated in this figure.

From Eq. (1), the n can be determined from

$$n = \frac{q}{kT}\frac{{{\text{d}}V}}{{{\text{d}}\left( {{\text{In}}\left( I \right)} \right)}}.$$
(3)

The results of n for each temperature were deduced from the linear region of Fig. 4a using Eq. (3) and listed in the figure. Thus, the values of n for this MIS diode were determined as 1.08 and 2.58 at 320 and 60 K, respectively. These results derived for Au/Ti/HfO2/n-GaAs MIS diode are higher than n of Au/Ti/n-GaAs MS diode [36] and it indicates that the presence of the HfO2 interfacial layer triggers deviation from ideality. As seen from the Table inset in Fig. 4a, n values decrease with increasing temperature and it is the similar with literature where Biyikli et al. [36] reported that n of Au/Ti/n-GaAs MS diode is between 1.074 and 2.221 in the temperature range of 300–60 K. The higher than unity value of n was the indication of laterally inhomogeneity in the MIS diode [10, 26, 38].

The barrier height at zero bias point \(\Phi_{{{\text{Bo}}}}\) could be obtained from the \(I_{0}\) value as

$$\Phi_{{{\text{Bo}}}} = \frac{kT}{q} \ln \left( {\frac{{AA^{*} T^{2} }}{{I_{{\text{o}}} }}} \right) .$$
(4)

Using Eq. 4, \(\Phi_{{{\text{Bo}}}}\) values were found as 0.35 and 0.94 eV at 60 and 320 K, respectively. In Au/Ti/n-GaAs MS diode form, it was reported in between 0.770 and 0.475 eV in the temperature range of 300–60 K [36]. Some researchers [10, 38, 40] have obtained an approximate \(\Phi_{{{\text{Bo}}}}\) value of 0.76 eV at 300 K for Au/Ti/n-GaAs MS diode. At room temperature, Au/Ti/HfO2/n-GaAs MIS diode gives higher \(\Phi_{{{\text{Bo}}}}\) values than Au/Ti/n-GaAs MS diode. Thus, it is an obvious fact that HfO2 interfacial layer causes the modification and increase of the \(\Phi_{{{\text{Bo}}}}\) and the rise in \(\Phi_{{{\text{Bo}}}}\) could be related to the free carriers having enough energy to pass over the barriers so they have the additive to the conduction with increasing T [10, 54]. As seen Fig. 4b, the temperature-dependent data of \(\Phi_{{{\text{Bo}}}}\) vs. (2kT)−1 plot obey the Gaussian Distribution (GD) of the BHs for the Au/Ti/HfO2/n-GaAs MIS diodes in the 60–320 K range. The intercepts and slopes of the straight lines of the \(\Phi_{{{\text{Bo}}}}\) vs. (2kT)−1 plot for MIS diodes give the average \(\Phi_{{{\text{Bo}}}}\)and \(\sigma_{{{\text{so}}}}\) values of 1.19 eV and 105 mV in the 135–320 K region and 0.80 eV and 62 mV in the 60–135 K region, respectively.

As seen Fig. 4a, the downward curvature in the I–V plots is attributed to a continuum of Dit at high forward bias values, which are in equilibrium with the semiconductor, apart from the effect of Rs. It is an important factor especially in the downward curvature of the forward bias I–V plots [55]. In addition, Rs impresses performance of the MIS diodes. Therefore, initially parasitic resistances (Ri) were investigated. To estimate this effect of Ri in the MIS diode, Rs and Rsh were calculated. In the case of Au/Ti/HfO2/n-GaAs MIS diode performance, to obtain high power and high speed of diodes, Rs is expected to be in low values due to the fact that it is attributed to the resistance effects of both diode and structure and contact regions, and interface state effects in the junction [56,57,58,59]. On the other hand, Rsh values are expected to be high and it can be associated with high leakage current due to the contacts and the surface inhomogeneities in the Au/Ti/HfO2/n-GaAs MIS diode structure as a result of current component affected by localized states and an accumulation layer at the surface [60]. According to Ri relation as Ri = dVi/dIi, the obtained Ri are plotted in Fig. 5. As given in this figure, Ri increases with decreasing the bias voltage and the low voltage region (0.2–0.4 V) Ri = Rsh (about 108–107 Ω). At this time, the high-voltage region (1.6–2 V) Ri = Rs and Rs values for the MIS diodes approach to constant values as about 7.2 Ω at high-voltage region.

Fig. 5
figure 5

(Color online) Voltage-dependent resistance from the current–voltage characteristics at some temperatures in Fig. 2

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Then, second, the Rs of the diode was determined using the technique proposed by Cheung [61]. Cheung’s function can be expressed as

$$\frac{{{\text{d}}V}}{{{\text{d}}\left( {\ln \left( I \right)} \right)}} = IR_{{\text{s}}} + n\left( \frac{kT}{q} \right)$$
(5)

where the term IRs is the voltage drop across Rs in the diodes. As seen from Fig. 6, \({\text{d}}V/{\text{d}}\left( {{\ln}\left( I \right)} \right)\) vs \(I\) plots are in linear characteristics and according to Eq. (5), \(R_{{\text{s}}}\) were determined for the MIS diode from the slope of Fig. 6 as 7.57 Ω and 7.12 Ω at 320 K and 60 K, respectively and all values are given in Fig. 6. As listed in this figure, these values are in close good agreement with each parasitic resistance at high forward bias voltage region.

Fig. 6
figure 6

(Color online) dV/d(ln(I)) versus I plots from the current–voltage characteristics using Cheung and Cheung method at same temperatures in Fig. 1

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The variation of \(R_{{\text{s}}}\) with temperature, from 7.57 to 7.12 Ω at 320 K and 60 K, depicts a decrease in its value with increase in temperature. The reason for this, the \(R_{s}\) value change from 7.57 to 7.12 Ω with temperature with no great influence from the change in temperature can be explained the diffusion of GaAs atoms into the metal oxide layer, HfO2. Furthermore, the origin of the oxide charges in the HfO2 thin layer can be ascribed to high density of defects induced by the presence of the oxygen vacancies and broken bonds. In general, the oxygen vacancies take place in the oxide film and/or at the oxide/GaAs interface [45, 62,63,64,65]. The n values of diode are in a narrow range and it can be associated to \(R_{{\text{s}}}\) [66]. In addition, to determine these values, Chengs’ method was applied only to downward curvature region of lnI–V characteristic. On the other hand, Norde and generalized Norde functions were applied to the full forward bias region of the lnI–V characteristic plots. Therefore, \(R_{{\text{s}}}\) values obtained by Norde plots are larger than those determined from Cheung functions [67].

The origin of the oxide charges in the HfO2 thin layer is ascribed to the high density of defects induced by the presence of the oxygen vacancies and broken bonds. In general, the oxygen vacancies take place in the oxide film and/or at the oxide/GaAs interface. The non-ideal behavior as obtained of I–V, C–V and G–V characteristics dominantly depends on Rs, Dit, Qeff and Neff, and their variations as a result of changing applied voltage and temperature of the Au/Ti/HfO2/n-GaAs MIS diode. The Dit of MIS diode is affected from the nature of Qeff and Neff in the diodes. Therefore, together with Dit, these values were obtained for the Au/Ti/HfO2/n-GaAs MIS diode. The Dit (I–V), Dit (C–V), and Neff values of the Au/Ti/HfO2/n-GaAs diode can be seen in Fig. 7.

Fig. 7
figure 7

(Color online) The Dit (I−V), Dit (C–V), and Neff for the Au/Ti/HfO2/n-GaAs diode

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For MIS diode having Dit in equilibrium with the semiconductor, the values of n become greater than unity, as proposed by Card and Rhoderick [68, 69], and it is given by

$$n = 1 + \frac{\delta }{{\varepsilon_{i} }}\left( {\frac{{\varepsilon_{{\text{s}}} }}{{w_{{\text{D}}} }} + qD_{it} } \right)$$
(6)

where εs and εi are the permittivity of semiconductor and interfacial layer, respectively, wD is the space charge width. For each temperature, the values of n were determined from I–V plot and the variation of wD was extracted from C−2–V characteristics. In addition, the values of Dit were obtained from Eq. (6) and the results are given in Fig. 7. As presented in this figure, the Dit decreases with increasing temperature where the values at 60 and 320 K are 1.179 × 1014 and 2.05 × 1013 eV−1 cm−2, respectively.

In addition, at high frequencies (f > 500 kHz) the interface states do not contribute to the capacitance since they are in equilibrium with the semiconductor. The relation of the theoretical carrier density N′D and the experimental carrier doping density ND is known.

$$C_{2} = \frac{{ N^{\prime}_{{\text{D}}} }}{{N_{{\text{D}}} }}$$
(7)

The density of interface state density Dit was calculated at different temperature using

$$C_{2 } = \frac{1}{1 + \beta }$$
(8)

where \(\beta = \frac{{q\delta D_{it} }}{{\varepsilon_{i} }}\) [68,69,70,71]. The Dit were derived at different temperatures from Eq. (8), by taking the δ value as 5 nm. The obtained Dit values are 2.21 × 1013 eV−1 cm−2 at 320 K and 4.37 × 1014 eV−1 cm−2 at 60 K. The obtained values of Dit (C–V) at temperature are presented in Fig. 7. As shown in Fig. 7, the obtained Dit value decreases with increasing temperature and it is in a close agreement with Dit calculated from I–V characteristics (Fig. 7).

Using the flat band voltage (VFB) values caused by the non-ideal effects, Neff and Qeff were calculated for Au/Ti/HfO2/n-GaAs MIS diode [72]. The flat band voltage, VFB, can be expressed as

$$V_{{{\text{FB}}}} = V_{{{\text{FB}}}}^{{\text{o}}} - \Delta V$$
(9)

where \(V_{{{\text{FB}}}}^{{\text{o}}}\) for the MOS capacitor without oxide or interface charge as

$$V_{{{\text{FB}}}}^{{\text{o}}} = \Phi _{{\text{m}}} - \Phi_{{\text{s}}} = \left( {\Phi_{{\text{m}}} - \frac{{q\chi + E_{{\text{g}}} - \left( {E_{{\text{F}}} - E_{{\text{v}}} } \right)}}{q}} \right)$$
(10)

where qχ is the semiconductor electron affinity, qΦm the semiconductor work function, Egthe semiconductor energy gap, and qΦm the metal gate work function and is the position of the semiconductor Fermi level above the valance band in the neutral semiconductor bulk [72].

The measure of VFB using high-frequency C–V method provides an information about the level of charges present inside the oxide layer and \(V_{{{\text{FB}}}}\) is directly obtained from the experimental and theoretical C–V curves and from the intercept of experimental 1/C2 vs. VGcurve as explained in the previous section. Once the flat band voltage \(V_{{{\text{FB}}}}\) is determined using one of the methods explained, its value is used to calculate the Qeffand Neff using the following equation [72],

$$N_{{\text{eff }}} = \frac{{Q_{{{\text{eff}}}} }}{q} = \frac{{C^{\prime}_{{\text{ox }}} \left( {V_{{{\text{FB}}}}^{{\text{o}}} - V_{{{\text{FB}}}} } \right)}}{q}$$
(11)

where C'ox is the oxide capacitance per unit area measured at strong accumulation.

The Qeff, of Au/Ti/HfO2/n-GaAs MIS diode was determined 1.46 × 104 cm−2 and 7.24 × 10–6 cm−2 for 60 K and 320 K, respectively, which shows a significant decrease in Qeff depending on increase in temperature. At this time, the Neff of Au/Ti/HfO2/n-GaAs MIS diode was calculated for 9.11 × 1014 cm−2 and 3.52 × 1013 cm−2 for 60 K and 320 K, respectively, which shows a significant decrease in Neff due to increasing temperature as seen from Fig. 7. The Dit values for Au/Ti/HfO2/n-GaAs diode were around 2 × 1013 cm−2 eV−1 at 300 K, which are much lower than that of the Ti/Au/ /HfO2/GaAs (Dit = 6.48 × 1013 cm−2 eV−1) and the Be-Au/HfO2/GaAs (Dit = 2.28 × 1013 cm−2 eV−1). In addition, the interface states and the effective oxide charges were affected by increasing temperature. It can be seen from the results, the Qeff, Neff and Dit decrease with the increasing temperature.

The Dit cannot follow the ac signal at enough high frequencies (f ≥ 1 MHz) and consequently, the contribution of Dit capacitance to the total capacitance can be ignored [73, 74]. For that reason, the G–V and C–V measurements of the MIS diodes were performed at 1000 kHz. The temperature-dependent C–V and the G–V measurements for the MIS diodes are given in Fig. 8a, b, respectively. As seen from Fig. 8a, the values of C give a peak in each temperature, shifting to forward voltage region with decreasing temperature. This peak behavior of C was investigated for MIS structures by some researchers [27, 75,76,77,78]. Such a behavior is usually referred to the Rs, and reordering of the interface state density Dit. G–V characteristics of the MIS diode are shown in Fig. 8b. As given in Fig. 8b, the G values of the MIS diode increase rapidly in the interval of 0.25 and 1 V, whereas there is a slow increase in behavior between − 3 and 0.25 V. In addition, the crossing of the G–V plots appears at about 1 V and this is an abnormal behavior for ideal SD. The Rs keeps this intersection unobservable in homogeneous SDs [75]. In Fig. 8a, the capacitance value increases from − 3.0 V to 0.54 V in the temperature range of 60–320 K.

Fig. 8
figure 8

(Color online) Experimental reverse and forward bias a capacitance–voltage and b conductance–voltage characteristics with the sample temperature as a parameter for the Au/Ti/HfO2/n-GaAs structure at 1000 kHz frequency

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The \(R_{{\text{s}}}\) profile was evaluated from the results in \(C - V\) and \(G - V\) measurements in the strong accumulation region [79,80,81,82],

$$R_{s} = \frac{{G_{m} }}{{\left( {G_{m} } \right)^{2} + \left( {\omega C_{m} } \right)^{2} }}$$
(12)

and the Rs is determined according to Eq. (12) and demonstrated in Figs. 9 and 10 for each temperature, and the temperature dependence of Rs for different voltages at 1000 kHz is also plotted in Fig. 11. It is clearly seen in Fig. 10 that the Rs is constant in the voltage range of − 1.0–0.3 V for each temperature. Then, the Rs values of the MIS diodes increase rapidly in the interval of 0.3 and 0.55 V. As seen in Fig. 10, the series resistance gives a peak in the voltage range of 0.55–0.9 V depending on temperature. In addition, the temperature dependence of Rs in Fig. 11 indicates that there is an increase with increasing voltage in the voltage range of 0.33–0.72 V.

Fig. 9
figure 9

(Color online) Experimental capacitance versus sample temperature characteristics with the bias voltage as a parameter for the Au/Ti/HfO2/n-GaAs structure at 1000 kHz frequency

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Fig. 10
figure 10

(Color online) Experimental reverse and forward bias series resistance–voltage characteristics with the sample temperature as a parameter for the Au/Ti/HfO2/n-GaAs structure at 1000 kHz frequency

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Fig. 11
figure 11

(Color online) Experimental forward bias series resistance versus sample temperature characteristics with the bias voltage as a parameter for the Au/Ti/HfO2/n-GaAs structure in the bias voltage range of 0.33–0.72 V

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The Z is the ratio of the phasor voltage to the phasor current in an equivalent circuit of Schottky diodes [81, 83]. The total impedance can be expressed as

$$Z = Z_{{\text{Re}}} + jZ_{{\text{Im}}} = \frac{1}{{\left( \frac{1}{R} \right) + jwC}}$$
(13)

where ZIm is its imaginary part and ZRe the real part of the total impedance. Thus, from this relation, the imaginary and real parts for the impedance of a circuit with capacitance (C) and resistance (R) can be recomposed by

$$Z = \frac{R}{{1 + \left( {wRC} \right)^{2} }} - \frac{{jwR^{2} C}}{{1 + \left( {wRC} \right)^{2} }} .$$
(14)

As seen from Eqs. (13) and (14), while \(w \to \infty\), ZIm goes to zero and ZRe approaches R. Figure 12 exhibits the voltage-dependent plots of the impedance of the MIS diodes in the temperature range of 60 K. This figure also indicates that the impedance value of the MIS diodes decreases with increasing temperature at a given voltage. It is obvious from Fig. 12, the total impedance curves behave independent of voltage in high-voltage region and the voltage-dependent at low voltages. The voltage range of the voltage-independent part of the MIS diodes decreases with increasing temperature. Figure 13 shows the phase angle versus voltage plots for the MIS diode at different temperatures at 1000 kHz. As seen from these plots in Fig. 13, the phase angle has the same value in the voltage range − 3.0 to 0.4 V as being temperature-independent; and at the forward bias voltages above 0.4 V, the phase angle sharply reduces at each temperature, and decreases with increasing temperature at a given bias voltage. However, an intersection point at phase angle curves was observed as independent of temperature and the phase angle increases with increasing temperature at a given bias voltage.

Fig. 12
figure 12

(Color online) Experimental reverse and forward bias impedance–voltage characteristics with the sample temperature as a parameter for the Au/Ti/HfO2/n-GaAs structure at 1000 kHz frequency

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Fig. 13
figure 13

(Color online) Experimental reverse and forward bias phase angle versus voltage characteristics with the sample temperature as a parameter for the Au/Ti/HfO2/n-GaAs structures at 1000 kHz frequency

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4 Conclusions

The MIS diodes were fabricated using ALD technique, which provides as an effective technique for HfO2 deposition. This fact was verified from the AFM images that the uniform and smooth morphology was achieved on the surface of this layer. Investigation of electrical properties revealed that n, ΦBo, Rs, Z and phase angle of the MIS diode depend on both applied voltage and temperature. The decrease in n value with increasing temperature was found to be in a direct relation with particular distribution of interface states and insulator layer between metal and semiconductor. Incremental ΦBo values with increasing temperature and reduction in n values with increasing temperature can be evaluated as an indication of deviation from TE theory. In addition, C, G and Rs were observed in decreasing behavior with decreasing temperature. At this point, Z decreases with increasing temperature. The MIS diode behaves more capacitive in the bias voltage range of − 3 V and about 0.4 V. In addition, Dit, Qeff and Neff values of the MIS diodes were decreasing with increasing temperature over temperature range 60–320 K.