4.1 Introduction

As discussed in the earlier chapters, Negative Bias Temperature Instability (NBTI) became an important reliability concern with the migration from Silicon Dioxide (SiO2) to Silicon Oxynitride (SiON) gate insulator MOSFETs [1,2,3,4,5,6,7]. It continues to remain as a concern for dual layer (SiO2 or SiON Interlayer (IL) and Hafnium Dioxide (HfO2) High-K layer) High-K Metal Gate (HKMG) gate insulator-based bulk [8,9,10,11,12,13] and Fully Depleted Silicon On Insulator (FDSOI) [14, 15] planar MOSFETs, bulk and SOI FinFETs [15,16,17,18,19,20,21,22,23,24,25,26,27,28], as well as Gate All Around Stacked Nanosheet FETs [29,30,31,32], with either Silicon (Si) or Silicon Germanium (SiGe) channel. The key features of NBTI are summarized hereinafter (reproduced from Chap. 3, Sect. 3.1).

As described in Chap. 1, Sect. 1.3, NBTI results in gradual buildup of positive charges in a p-MOSFET gate insulator and causes threshold voltage (∆VT) in time under the application of a negative gate bias (VG). ∆VT accelerates at higher magnitude of VG during stress (VG = VGSTR) and higher temperature (T), governed by the Voltage Acceleration Factor (VAF) and Arrhenius T activation energy (EA) respectively. The parametric shift accrued during stress partially recovers after stress when the magnitude of VG is reduced or removed (VG = VGREC or 0 V), and therefore, AC stress results in lower ∆VT than DC. The AC to DC ratio depends on the Pulse Duty Cycle (PDC) and pulse low bias (VGLOW); however, it may or may not depend on the frequency (f) of the gate pulse (depends on AC stress mode). On the other hand, NBTI recovery necessitates the use of ultra-fast methods for artifact free measurements, which is discussed in Chap. 1, Sect. 1.2.

As described in Chap. 2, the time kinetics of measured ∆VT and related parameters, such as the power law slope (n) at longer stress time (tSTR), VAF, EA, T dependence of VAF during stress and Fraction Remaining (FR) during recovery after stress (FR is defined as ∆VT at t = tREC after stress to that at t = tSTR at the end of stress) depend on different transistor processes. In modern HKMG gate insulator-based p-MOSFETs, some of the key processes that influence NBTI are Nitrogen content (N%) in the gate insulator and Germanium content (Ge%) in the channel. The magnitude of ∆VT increases, while the associated n, VAF, EA, T dependence of VAF and FR reduce with higher N%. On the other hand, the magnitude of ∆VT reduces, while the associated n, VAF, EA, T dependence of VAF and FR increase with higher Ge%. Moreover, NBTI reduces with fin length and fin width scaling in FinFETs, sheet length scaling in GAA-SNS FETs and larger spacing (SA) between the Shallow Trench Isolation (STI) and device active in FDSOI MOSFETs; however, it increases with sheet width scaling in GAA-SNS FETs.

Any practical and technologically relevant modeling framework should be able to explain the experimental features listed in Chap. 3, Sect. 3.1. The BTI Analysis Tool (BAT) framework described in this book models NBTI parametric drift using uncorrelated contributions from generated interface traps (density ∆NIT) and bulk gate insulator traps (density ∆NOT), and hole trapping in preexisting bulk gate insulator traps (density ∆NHT). Several independent experimental evidences regarding the impact of these underlying subcomponents are demonstrated in Chap. 3. In this chapter, the Reaction Diffusion (RD) model is explained to calculate the time kinetics of ∆NIT. Other subcomponents are modeled in Chaps. 5 and 6.

4.2 BTI Analysis Tool (BAT) Framework

Figure 4.1 illustrates the BAT framework used throughout this book and the underlying subcomponents of NBTI degradation [12]. The time kinetics of measured ∆VT is due to uncorrelated contributions from generated interface (∆VIT) and bulk gate insulator (∆VOT) traps, and hole trapping in preexisting bulk gate insulator defects (∆VHT). Note that the electrically active gate insulator defects are denoted as traps, and these terms would be interchangeably used in this book.

Fig. 4.1
figure 1

Schematic of the BTI Analysis Tool (BAT) framework used in this book to model measured ∆VT kinetics during and after DC and AC NBTI stress

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Figure 4.2 illustrates the double interface Reaction Diffusion (RD) model [12, 33, 34], which is used to calculate the generation and passivation of interface traps in this book. The RD model calculates the depassivation and re-passivation of Hydrogen (H) passivated defects at the channel/interlayer (IL) interface and inside the bulk of the HKMG gate stack. For simplicity, all bulk defects are lumped into a suitable “second interface” which is assigned to the IL/High-K interface for HKMG gate insulator, as illustrated in this example. The “second interface” can be defined at the center of the gate insulator for a single-layer SiO2 or SiON gate stack. The RD model is discussed in Sect. 4.3.

Fig. 4.2
figure 2

Schematic of the Reaction Diffusion (RD) model with defect-assisted dimerization and reverse process to calculate the time kinetics of trap generation and passivation respectively (a) during and (b) after NBTI stress, example is shown for (c) HKMG gate insulator. The RD model equations are described in Sect. 4.3

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Figure 4.3 illustrates the energy band diagram of a dual layer HKMG stack (a) during and (b) after stress. RD model calculates trap kinetics at the channel/IL and IL/High-K interfaces. The traps are presumed donor type, and therefore, only the ones energetically located above the Fermi level of the substrate would be positively charged and contribute (∆VIT) to ∆VT during stress (any generated traps located below the Fermi level is not shown). During recovery, some of these traps would go below the Fermi level and would capture electrons to neutralize. Therefore, they would not contribute to ∆VT, although they can physically exist (and at a later time can get re-passivated). Trap occupancy is calculated by the Transient Trap Occupancy Model (TTOM) [12], which is discussed in Chap. 5.

Fig. 4.3
figure 3

Transient Trap Occupancy Model (TTOM) for the calculation of interface trap occupancy (a) during and (b) after stress; the example is shown for a HKMG gate insulator. The TTOM equations are described in Chap. 5

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Trapping (and detrapping) of holes into (and out of) preexisting gate insulator defects give rise to hole trapping contribution (∆VHT) to ∆VT as shown in Fig. 4.1. This is calculated by the Activated Barrier Double Well Thermionic (ABDWT) model [35], which is discussed in Chap. 5. Contribution due to generated bulk gate insulator traps (∆VOT) also contributes, Fig. 4.1. This is calculated by the Reaction Diffusion Drift (RDD) model [36] and is discussed in Chap. 6.

Note that the bulk trap generation is possibly due to breaking of Si-O-Si bonds (Si: Silicon, O: Oxygen) or other (different) H passivated defects to create Si-Si dimer or other forms of Oxygen vacancy (OV) [37] (note that the chemical nature of defects is discussed in Sect. 4.6). The bulk trap generation is related to hot holes generated by the Anode Hole Injection (AHI) mechanism [38], which is discussed in Chap. 6. However, the interface trap generation is triggered by the tunneling of inversion layer (cold) holes, which is discussed in this chapter.

4.3 Reaction Diffusion (RD) Model

Figure 4.4 illustrates different versions of the RD model proposed in the literature. The time kinetics of interface traps has been modeled first using the conventional RD framework [39, 40], which suggests the depassivation (during stress) and re-passivation (after stress) of H passivated defects at the channel/gate insulator interface. The released H atoms diffuse into the oxide (and beyond) during stress, as illustrated in Fig. 4.4 (a), and diffuse back toward the interface after stress. The framework is reaction limited at short time and atomic H diffusion limited at long time during stress [40]. Note, this basic version of the RD model could explain the power law time dependence of measured NBTI kinetics during stress with a time slope n ~ 1/4, which has been reported in older publications [1, 2, 5, 7]. It could also explain the frequency independence of NBTI during AC stress [41], reported in early experiments [42] (see Chap. 1, Sect. 1.3 and Chap. 14 for a discussion on the f dependence or independence of NBTI).

Fig. 4.4
figure 4

Different versions of RD model: (a) basic with only H diffusion, (b) dimerization of H into H2 and diffusion of H2, and (c) defect-assisted dimerization of H into H2 and diffusion of H2 (also shown in Fig. 4.2 where the bulk defects are lumped into an effective second interface for simplicity)

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However, all the direct methods to measure interface trap generation are intrinsically slow and suffer from recovery-related artifacts (lower magnitude and higher time slope n) as the stress is interrupted for measurement. As shown in Chap. 3, Sect. 3.2, measured time kinetics of ∆NIT after delay correction results in n ~ 1/6, which is universally observed across different stress conditions.

Therefore, the RD model has been suitably modified by adding dimerization of atomic H into molecular H2 as illustrated in Fig. 4.4 (b) [3, 33, 34, 43]. This model is reaction limited at shorter time, governed by the conversion of H to H2 at moderate time and H2 diffusion limited at longer time during stress; the opposite processes occur during recovery after stress. The model can explain the measured and delay corrected n ~ 1/6 time slope at long-time stress and frequency independence for AC stress [33]. However, it is shown later that the dimerization of two H atoms into H2 is stochastically less probable in small area devices [44], and moreover, the reverse dissociation of H2 into H requires a very large T activation energy of EA = 4.5 eV [45]. Therefore, the defect-assisted dimerization model is preferred, Fig. 4.4 (c), which is discussed next. The defect-assisted version is consistent between the deterministic and stochastic implementations, as demonstrated in [46]. The interested reader may refer to [34] for further details on various versions of the RD model.

4.3.1 RD Model with Defect-Assisted Dimerization

Figure 4.2 illustrates the RD model with defect-assisted (a) dimerization of H into H2 during stress and (b) reverse conversion of H2 to H during recovery after stress for a (c) HKMG gate insulator stack. During stress, inversion layer holes break the H passivated defects (X-H) at the channel/IL interface, and the detailed mechanism is discussed later in this section. The released H atoms from broken X-H bonds diffuse into the gate insulator and react with other H passivated defects (Y-H bonds, lumped at the IL/High-K interface for simplicity) to produce H2 molecules (defect-assisted dimerization). The generated H2 molecules diffuse into the gate insulator bulk and backend. During recovery, H2 molecules diffuse back and passivate the bulk insulator defects, and the generated H atoms subsequently diffuse and passivate the defects at the channel/gate insulator interface. The chemical nature of defect precursors is discussed in Sect. 4.6, and due to uncertainties, they are denoted as X-H and Y-H bonds in this book. The model remains valid for single-layer SiO2 or SiON gate insulators, where the bulk defects can be lumped into an imaginary interface at the center of the gate insulator stack.

The RD model with defect-assisted dimerization is explained by the following chemical reactions:

$${\text{X}} - {\text{H}} + \left( {{\text{hole}}} \right) \leftrightarrow {\text{X}} - + \ {\text{H}}$$
(4.1)
$${\text{Y}} - {\text{H}} + {\text{H}} \leftrightarrow {\text{Y}}- + \ {\text{H}}_{2}$$
(4.2)

The charged state (occupancy) of X—at the channel/gate insulator interface and of Y—inside the gate insulator bulk is determined by whether these defects, presumed donor like, are energetically located above (positively charged) or below (neutral) the Fermi level (of the substrate) during stress and post-stress phases, see Fig. 4.3. As mentioned before, this aspect is handled using the TTOM framework and is discussed in Chap. 5. Total ∆VIT is calculated by summing the contributions from ∆VIT1 at the channel/IL and ∆VIT2 at the IL/High-K interfaces, by using appropriate capacitance ratios, and counting only traps that are energetically above the Fermi level during or after stress from the TTOM framework.

Note that during stress, the released H atoms have to find H passivated defects in the gate insulator bulk to initiate the depassivation reactions, and during recovery, the returning H2 molecules have to find the un-passivated defects to initiate the re-passivation reactions. However, the diffusivity of H atoms is much larger than that of H2 molecules [3]. Therefore, the H atoms can quickly find the required precursors during stress, Fig. 4.2 (a), but the H2 molecules would need to hop till they can find the un-passivated defects during recovery, Fig. 4.2 (b), before the respective forward and reverse reactions can proceed [33]. The H2 molecules would hop more when the difference between the stress and recovery time is large (relatively shorter stress time and longer recovery time), due to limited availability of the un-passivated defects that can take part in the reverse reaction. Furthermore, a fraction of the H atoms and/or H2 molecules can get temporarily locked out of the diffusion domain, due to trapping/bonding or otherwise, and become unavailable for the reaction and/or diffusion processes [39, 47]. The H2 hopping and lock-in processes have been simulated and their roles in slowing down the recovery kinetics have been verified in the stochastic simulation domain [46]. However, in the continuum (deterministic) simulation domain, these effects are handled by slowing down the diffusivity of H2 molecules with the passage of time only during recovery after stress [33, 48].

The forward and reverse reactions at the channel/IL (first) and IL/High-K (second) interfaces, as per the chemical reactions shown in Eq. 4.1 and Eq. 4.2 respectively, are given by the following equations [12]:

$$\frac{{{{d\it N}}_{{{\text{IT}}\left( 1 \right)}} }}{{{\text{d}}t}} = K_{{{\text{F1}} }} \left( {{{\it N}}_{0\left( 1 \right)} - {{\it N}}_{IT\left( 1 \right)} } \right) - K_{R1} {{\it N}}_{{{\text{IT}}\left( 1 \right)}} {\it {N}}_{{{\text{H}}\left( 1 \right)}}$$
(4.3)
$$\frac{{{\text{d}N}_{{{\text{IT}}\left( 2 \right)}} }}{{{\text{d}}t}} = K_{{{\text{F2}} }} \left( {{{N}}_{0\left( 2 \right)} - {{N}}_{{{\text{IT}}\left( 2 \right)}} } \right){{N}}_{{{\text{H}}\left( 2 \right)}} - K_{R2} {{N}}_{{{\text{IT}}\left( 2 \right)}} {{N}}_{{{\text{H2}} \left( 2 \right)}}$$
(4.4)

where N0, NIT, NH and NH2, respectively, are the H passivated defect, trap (after H depassivation), atomic and molecular Hydrogen densities at the first (1) and second (2) interfaces, while KF1, KF2 and KR1, KR2 are the corresponding forward and reverse reaction rates. The flux balance is done by the following equations:

$$\frac{\delta }{2}\frac{{{\text{d}N}_{{{\text{H}}\left( 1 \right)}} }}{{{\text{d}}t}} = D_{{\text{H}}} \frac{{{\text{d}N}_{{{\text{H}}\left( 1 \right)}} }}{{{\text{d}}x}} + \frac{{{\text{d}N}_{{{\text{IT}}\left( 1 \right)}} }}{{{\text{d}}t}}$$
(4.5)
$$\frac{\delta }{2}\frac{{{\text{d}N}_{{{\text{H2}} \left( 2 \right)}} }}{{{\text{d}}t}} = D_{{{\text{H2}} }} \frac{{{\text{d}N}_{{{\text{H2}} \left( 2 \right)}} }}{{{\text{d}}x}}$$
(4.6)

where δ is the interfacial layer thickness (=1.5 Å), and DH and DH2 are the diffusivities of atomic and molecular Hydrogen respectively. The diffusion of H and H2 species is governed by the following equations:

$$\frac{{{\text{d}N}_{{\text{H}}} }}{{{\text{d}t}}} = D_\text{H} \frac{{{\text{d}}^{2} {{N}}_{{\text{H}}} }}{{{\text{d}}x^{2} }}$$
(4.7)
$$\frac{{{\text{d}N}_{{{\text{H2}} }} }}{{{\text{d}}t}} = D_{{\text H2 }} \frac{{{\text{d}}^{2} {{N}}_{{{\text{H2}} }} }}{{{\text{d}}x^{2} }}$$
(4.8)

The hopping and lock-in related slowing down of H2 diffusion during recovery is handled by the following equation:

$$D_{{{\text{H2}} }} \left( t \right) = \frac{{D_{{{\text{H2}} \_{\text{STRESS}}}} }}{{\left( {1 + A*\left( {\frac{\text{t}}{{t_{{{\text{STR}}}} }}} \right)} \right)}}$$
(4.9)

where t is the recovery time, tSTR is stress time and DH2_STRESS is the diffusivity value used during stress and A is the diffusivity reduction parameter.

The first interface forward reaction rate (KF1) depends on VGSTR, T and transistor process and materials, and is explained below. All other forward (second interface) and reverse (first and second interfaces) reaction rates and diffusivities of H and H2 are only Arrhenius T activated and are process independent. The diffusivity reduction parameter only depends on the device architecture (A = 7 is used for planar MOSFETs and A = 35 for FinFETs and GAA-SNS FETs). The process-independent RD model parameters is listed in Table 4.1, and same values are used to analyze different devices throughout this book.

Table 4.1 Process (or technology)-independent RD model parameters used throughout this book. These parameters are Arrhenius T activated: X = X0 exp(–EA/kT), where X0 is the pre-factor and EA is the T activation energy of the parameter of interest (X). The diffusivity pre-factors are mentioned for IL//High-K and beyond
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4.3.2 Physical Mechanism of Interfacial Defect Dissociation

Figure 4.5 illustrates the H passivated defect dissociation process at the first interface and lists the equations governing KF1 [12, 33, 34]. During stress, the inversion layer holes aided by oxide electric field (EOX) tunnel to the interfacial X-H bonds. These bonds are already polarized (by factor p) in the presence of EOX, and upon hole capture they become weak and are subsequently dissociated by thermal activation. The forward reaction rate KF1 depends on the pre-factor KF10 (which is proportional to hole density, pH, tunneling coefficient, TH, and capture cross section, σ), field acceleration (\(\Gamma_{\text E}\)) and T activation of bond dissociation (EAKF1). The field acceleration factor (\(\Gamma_{\text E}\)) is a sum of the T-independent (\(\Gamma_{0}\)) and T-dependent (α/kT) terms, where α is the polarization coefficient of the X-H bond.

Fig. 4.5
figure 5

Schematic of the inversion layer hole and oxide electric field induced dissociation of H passivated defects at the channel/gate insulator interface [34]

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The process-dependent RD model parameters are KF10, \(\Gamma_{0}\), α and EAKF1, among which, the parameters KF10 and \(\Gamma_{0}\) depend on the effective mass (mT) and barrier (φB) of the hole tunneling process (and can be determined using bandstructure calculations). Different processes such as Ge% in the channel, N% in the gate insulator stack (near the channel/IL interface) and mechanical strain in the channel can impact the bandstructure and hence mT and φB. These in turn impact the parameters KF10 and \(\Gamma_{0}\). It is important to note that the pre-factor KF10 would also depend on the capture cross section and the quality of the gate insulator. Therefore, when the capture cross section and quality of the gate insulator stay similar, bandstructure calculations can be used to determine the relative KF10 changes across different processes. The other two (α and EAKF1) are pure fitting parameters.

The following process-dependent trends have been observed for the RD model parameters (discussed in detail in Sect. 4.5 and also in later chapters):

  • Higher Ge% in the channel increases the valence band offset and hence φB with no significant impact on mT, obtained from bandstructure calculations using the tight binding method [26, 49]. Therefore, both KF10 and \(\Gamma_{0}\) reduces, although the overall \(\Gamma_{\text E}\) (and hence VAF) often increases due to the increase in α at higher Ge%. This remains valid for both (100) and (110) interfaces and also across different devices (bulk and FDSOI planar MOSFETs and FinFET), provided the N% is kept identical between different Ge% devices. Moreover, EAKF1 increases at higher Ge%, but the reason for this is not yet identified. The impact of Ge% changes on NBTI is analyzed and modeled in Chap. 8, Chap. 9 and Chap. 11, respectively, for bulk and FDSOI planar MOSFETs and FinFETs.

  • Higher N% in the gate insulator near the channel/IL interface reduces the valence band offset (note that SiON has smaller bandgap than SiO2) and hence reduces φB. Lower φB results in higher \(\Gamma_{0}\), unless mT also reduces at higher N%. Analysis of different devices indicates reduction in \(\Gamma_{0}\) for the Si (100) surface but slight increase in \(\Gamma_{0}\) for the SiGe (100) and (110) surfaces at higher N%. The relative changes in φB (always reduces) and mT (reduces for the Si (100) surface but likely remains unchanged for the SiGe (100) and (110) surfaces) impact the overall change in \(\Gamma_{0}\) at higher N%. Since α does not change, the variation in \(\Gamma_{\text E}\) with N% depends only on that of \(\Gamma_{0}\). However, KF10 would always increase at higher N%, due to reduction in φB and also in mT when applicable. The T activation EAKF1 reduces at higher N% and has been verified using atomistic calculations [50]. Note that the Equivalent Oxide Thickness (EOT) of the gate insulator reduces at higher N%, due to higher dielectric constant of the IL (εIL) and/or High-K (εHK), depending on the N profile in the gate stack. Therefore, a device having higher N% in the gate stack shows higher EOX when compared to a lower N% device at iso-VGSTR. Higher EOX results in higher ∆VIT; however, the resultant increase would be lower than expected, since higher ∆VIT in turn would also reduce the effective NBTI stress at fixed VGSTR, due to reduction in the channel electric field and inversion hole density. Therefore, even if \(\Gamma_{\text E}\) stays constant (due to the balancing of φB and mT), the stress reduction effect results in lower VAF in higher N% devices (as the magnitude of ∆VIT is higher due to higher KF10). The impact of N% changes on NBTI is analyzed and modeled in Chap. 7, Chap. 9 and Chap. 11, for bulk and FDSOI planar MOSFETs and FinFETs respectively.

  • Higher uniaxial compressive stress increases φB but does not significantly impact mT for the (100) surface (relevant for planar, FDSOI, GAA-SNS FET top sheet), while it increases mT but does not significantly impact φB for the (110) surface (relevant for FinFET sidewalls and GAA-SNS FET sheet sides), as obtained from bandstructure calculations. Therefore, both KF10 and \(\Gamma_{0}\) are appropriately changed, if strain is changed due to changes in the layout or device dimensions. However, no noticeable strain impact is noted for α and EAKF1. The impact of mechanical strain on NBTI is analyzed and modeled for layout changes in FDSOI MOSFETs in Chap. 9, and for dimension changes in FinFETs and GAA-SNS FETs in Chaps. 12 and 13.

4.4 Experimental Validation of RD model

The RD model is validated using DCIV measured and delay corrected ∆NIT time kinetics from planar MOSFETs and FinFETs, see Chap. 3, Sect. 3.2 for measurement and other details. Table 4.2 lists the four process-dependent RD model parameters for the Gate First (GF) HKMG planar p-MOSFETs (D1 and D2, different N% in the gate insulator) and Replacement Metal Gate (RMG) HKMG p-FinFETs (D3 and D4, different Ge% in the channel and N% in the gate insulator) used in this work. The process-independent parameters are listed in Table 4.1.

Table 4.2 Process-dependent RD model parameters for different devices having Silicon (Si) and Silicon Germanium (SiGe) channels. The KF10 parameter is not listed for the D3 and D4 FinFETs to maintain confidentiality. The parameters for SiGe devices are strongly dependent on the details of the IL formation process (see Chap. 11 for further details)
Full size table

The X-H defect density at the channel/IL interface (N0(1)) would be different for different devices, and it depends on channel orientation, gate stack thermal budget and Ge% in the channel. Note that N0(1) (in /cm2-) values of 5 × 1012 and 7 × 1012 are, respectively, used for thermal and low T Chemical Oxide IL in (100) surface, and 1 × 1013 is used for Chemical Oxide IL in (110) surface for Si channel throughout the book. Moreover, the values are suitably reduced for SiGe channel depending on Ge%. On the other hand, the Y-H defect density at the second interface (N0(2)) is taken as 5 × 1013 /cm2 for all cases.

Figure 4.6 shows the time evolution of measured and modeled ∆NIT in D1 (left panels) and D2 (right panels) GF planar devices at different VGSTR and T during DC stress. As DCIV is a slow method, the measured data can be obtained only at longer stress time (tSTR > 1 s), while RD model simulation is shown from short to long time. Note that measured ∆NIT increases with more negative VGSTR and larger T as expected, increases with higher N% in the gate insulator (e.g., for D2 compared to D1, see Table 4.2), and shows power law time dependence with long-time slope of n ~ 1/6. It is important to remark that this characteristic time slope is ubiquitously observed across stress conditions and devices.

Fig. 4.6
figure 6

Time evolution of DCIV measured (and delay corrected) and RD model simulated ∆NIT at different VGSTR and T (VGSTR × T matrix) for DC stress in GF HKMG Si channel p-MOSFETs with low N% (left panels) and high N% (right panels) in the gate insulator stack. Symbols: experiment, lines: model calculation. Data from [12]

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The simulated ∆NIT time kinetics evolves rapidly at the initiation of stress and asymptotically settles into a power law dependence with identical n ~ 1/6 slope at different VGSTR, T and for both devices. As mentioned before, simulated ∆NIT time kinetics using RD model with defect-assisted dimerization is governed by the first interface reaction at shorter time, by defect-assisted dimerization at the second interface at intermediate time, while the long-time part is governed by molecular H2 diffusion in the gate oxide and beyond. Note that the long-time slope of n ~ 1/6 is a parameter agnostic feature of the RD model, driven purely by molecular H2 diffusion [34].

Figure 4.7 shows the time evolution of measured and modeled ∆NIT in RMG HKMG D3 and D4 FinFETs under DC stress at different VGSTR and T (left panels) and under AC stress at different PDC (right panels). The measured and modeled time kinetics of ∆NIT show power law dependence with slope n ~ 1/6 across devices (only the long-time data can be obtained for measurement and are plotted for the simulation), for different VGSTR and T during DC stress and different PDC for AC stress. Note that the ∆NIT magnitude reduces at higher Ge%. Identical model parameters are used to explain the DC and AC stress for a particular device.

Fig. 4.7
figure 7

Time evolution of DCIV measured (and delay corrected) and RD model simulated ∆NIT at different (a, c) VGSTR and T for DC stress and (b, d) PDC for AC stress in RMG HKMG (a, b) Si and (c, d) SiGe channel p-FinFETs. Symbols: experiment, lines: model calculation. Data from [23, 24]

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The measured and modeled ∆NIT at fixed tSTR of 1Ks as a function of VGSTR at different T are shown for DC stress in devices D1 and D2 in Fig. 4.8 and in devices D3 and D4 in Fig. 4.9, and also for AC stress in device D4 in Fig. 4.9, see Table 4.2 for device details. The magnitude of ∆NIT increases with VGSTR and T as expected. The VAF reduces at higher N% but increases at higher Ge% at a given T. Note that the VAF for a particular device reduces at higher T, and the T dependence of VAF is larger (i.e., larger VAF reduction at higher T) for SiGe compared to Si devices, while no significant impact is observed for changes in N%. The reduction in VAF at higher T is due to the bond polarization effect, although the stress reduction effect (i.e., reduction in the effective stress at longer time due to higher degradation-related electrostatic effect) also contributes. The model can explain the T and process dependence of measured VAF. Note that the ∆NIT kinetics during stress depends on EOX and not VGSTR. Therefore, the process dependencies of \(\Gamma_{\text E}\) (see Fig. 4.5) and EOX in the IL are responsible for the process dependence of VAF when ∆NIT is plotted as a function of VGSTR. This is discussed in the following section.

Fig. 4.8
figure 8

DCIV measured (and delay corrected) and RD model simulated ∆NIT at fixed tSTR of 1Ks as a function of VGSTR at different T for DC stress in (a) D1 and (b) D2 devices listed in Table 4.2. Symbols: experiment, lines: model calculation. Data from [12]

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Fig. 4.9
figure 9

DCIV measured (and delay corrected) and RD model simulated ∆NIT at fixed tSTR of 1Ks as a function of VGSTR at different T, for (a, b) DC stress in D3 and D4 devices and (c) AC stress in D4 device listed in Table 4.2. Symbols: experiment, lines: model calculation. Data from [23, 24]

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Figure 4.10 shows the measured and modeled ∆NIT at fixed tSTR of 1Ks as a function of (a) PDC and (b) frequency of the AC pulse in different devices. Note that identical AC to DC ratio (all data are normalized to DC stress), PDC-dependent shape and f independence are observed for all devices. One interesting aspect to note is the absence of a large jump or “kink” in the PDC dependence of ∆NIT near DC, which is unlike that of the ultra-fast measured PDC dependence of ∆VT shown in Chap. 1, Sect. 1.4 (also see Chap.14). This aspect is related to occupancy of generated interface traps and is explained in Chap. 5. The RD model can explain the measured AC to DC ratio at various PDC and f as shown. The remarkable universality of the ∆NIT time kinetics during DC and AC stress (see Fig. 4.6 and Fig. 4.7), as well as the PDC and f dependence during AC stress (see Fig. 4.10), suggests universality of the underlying trap generation mechanism. The f independence is another parameter agnostic feature of the RD model.

Fig. 4.10
figure 10

DCIV measured (delay corrected) and RD model simulated ∆NIT at fixed tSTR of 1Ks as a function of (a) PDC and (b) frequency. All AC data are normalized to the DC data of the particular device under consideration. Symbols: experiment, lines: model calculation. Data from [12, 24]

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4.5 Explanation of Process (Ge%, N%) Impact

As shown above, the time kinetics (n ~ 1/6 power law dependence) during DC and AC stress, as well as the PDC-dependent shape and f independence of AC to DC ratio are universal across different devices/processes. However, the magnitude of ∆NIT reduces, while VAF (at a fixed T) and the T sensitivity of VAF (reduction of VAF at higher T) increase with higher Ge% in the channel. On the other hand, ∆NIT increases while VAF slightly reduces with higher N% in the gate stack, and there is no noticeable impact on the T sensitivity of VAF.

As also shown above, except the parameters governing the forward reaction of X-H bond dissociation at the channel/IL interface listed in Table 4.2, all other RD model parameters are process independent as shown in Table 4.1. The EOX and T during stress and the parameters KF10, EAKF1 and \(\Gamma_{\text E}\) control the bond dissociation rate F1, where \(\Gamma_{\text E}\) is due to \(\Gamma_{0}\) and α, see Fig. 4..4.5. Note, EOX is determined by the thickness (TIL and THK) and dielectric constant (εIL and εHK) of the IL and High-K layers in HKMG gate insulators (or TOX and εOX for a single-layer gate insulator). KF10 and \(\Gamma_{0}\) depend on mT and φB, and these can be obtained from bandstructure calculations using the tight binding approach [49] as discussed below.

Figure 4.11 shows the simulated bandstructure, i.e., the light hole (LH) and the heavy hole (HH) sub-bands of the valence band for different Ge% in the channel. Both the LH and HH bands are lifted up at higher Ge%, which indicate increase in φB. However, there is negligible change in the curvature of the bands and hence mT remains unchanged. Higher φB reduces both KF10 (via the tunneling coefficient TH) and \(\Gamma_{0}\), see Fig. 4.5. The reduction in KF10 would result in reduction in ∆NIT at higher Ge%. It is important to remark that above discussion on the impact of φB on KF10 is valid only if EAKF1 remains constant across different Ge%. Since EAKF1 is higher at higher Ge%, the relative KF10 value is also higher, see Table 2.2. However, the product of KF10 and exp (–EAKF1/kT) is lower at higher Ge%, and hence explains the reduction of ∆NIT at higher Ge% shown in Figs. 4.7 and 4.9. Moreover, the above discussion on φB on \(\Gamma_{0}\) is valid only if N% is kept same across different devices (more on this in Chaps. 8, 9 and 11).

Fig. 4.11
figure 11

Tight binding model [49] calculated E-k diagrams for valence bands for different Ge% in the channel. Calculations are done for the (110) surface relevant for FinFET sidewalls

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For a particular type of channel (Si or SiGe), higher N% increases KF10 due to the reduction in φB and mT when applicable (see Fig. 4.5), while EAKF1 reduces, see Table 4.2. The product of F10 and exp (–EAKF1/kT) is higher at higher N% and hence explains the increase of ∆NIT at higher N% shown in Figs. 4.6 and 4.8. As mentioned before, the impact of N% on \(\Gamma_{0}\) depends on the relative changes in φB (always reduces at higher N%) and mT (reduces for (100) but likely increases for (110) surface at higher N%), more on this in Chap.7, 9 and 11.

Figure 4.12 shows the Arrhenius T dependence of \(\Gamma_{\text E}\), calculated using the T-dependent VAF data for (a) GF devices having different N% and (b) RMG devices having different Ge% and N%. The intercept \(\Gamma_{0}\) reduces at higher N% but the slope (~polarization term α) does not change for GF Si channel devices (D2 versus D1). As mentioned before, the barrier φB reduces as the bandgap of IL reduces at higher N% near the channel/IL interface. This would imply increase in \(\Gamma_{0}\), but the opposite is observed. This is possible if mT also reduces at higher N%. Reduction in φB and mT result in higher KF10 for D2 compared to D1 device (as also mentioned before, due to difference in EAKF1, the term KF10*exp(–EAKF1/kT) is higher at higher N%). Moreover, note that εIL increases at higher N% in the IL, resulting in lower EOX at a particular VGSTR and can further reduce the VAF. EAKF1 reduces with increase in N%, and this is addressed by atomistic calculations [50].

Fig. 4.12
figure 12

Measured T dependence of the field acceleration factor (\(\Gamma_{\text E}\)), using data from (a) GF HKMG MOSFETs at different N% and (b) RMG HKMG FinFETs at different Ge% (the N% is different between D3 and D4). The intercept (\(\Gamma_{0}\)) and slope (~α) are shown. Symbols: experiment, lines: model calculation. Data from [12, 23]

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Interestingly, the intercept \(\Gamma_{0}\) increases at higher Ge% (D4 versus D3), which is not expected if only changes (increase) in φB is considered. Due to differences in N% for the Si and SiGe devices, the mT is different (higher for SiGe in this case), resulting in higher \(\Gamma_{0}\). Note that \(\Gamma_{0}\) indeed reduce at higher Ge% if N% is kept low for all devices, see Chaps. 8, 9 and 11. However, the slope increases at higher Ge% and indicates increase in the polarization factor α. Moreover, EAKF1 also increases with Ge%. First principles calculation is needed to explain the impact of Ge% on EAKF1 and α, which is beyond the scope of this analysis. Note that the term KF10*exp(–EAKF1/kT) is lower at higher Ge% and explains the reduction of ∆NIT. Note that besides surface orientation, Ge% and N%, the parameters for the SiGe devices are strongly dependent on the details of the IL formation process during gate stack formation.

4.6 Discussion on RD model

The chemical nature of H passivated gate insulator defects, validity of the inversion hole-assisted X-H defect dissociation mechanism at the channel/IL (gate insulator) interface, and the parameters used in RD model are debated in the literature [51] and hence are discussed in this section.

4.6.1 Nature of H Passivated Defects (Defect Precursors)

The H passivated defects at the channel/gate insulator interface are usually presumed to be Si-H bonds, which has been identified as Pb centers in Si (111)/SiO2 interface and as Pb0 and Pb1 centers in Si (100)/SiO2 interface by using the Electron Spin Resonance (ESR) and Electron Paramagnetic Resonance (EPR) studies [45, 52,53,54]. However, it has been suggested that not all electrically active defects are paramagnetic and detectable by ESR or EPR; rather the electrically active defects can indeed have much larger density than the spin active defects [53, 55]. Similar conclusions were also drawn from Spin-Dependent Recombination (SDR) studies [56]. Moreover, other (not Pb like) defects were suggested to be more important in technologically relevant gate insulators containing Nitrogen (which is always the case for modern gate insulators) [51,52,53,54,55,56,57,58,59,60]. Therefore, due to these uncertainties, the H passivated channel/gate insulator interfacial defects are denoted as X-H bonds in this book, Eq. 4.1.

Moreover, the H passivated bulk insulator defects for defect-assisted dimerization (and reverse reaction) can be H passivated Si-H, N-H, O-H, Oxygen vacancy (Ov-H) defects [61], different H passivated E’ centers [62], and/or other complex H-related defects (Hydrogen bridge, Hydroxyl E’ centers) [37]. Therefore, they are collectively denoted as Y-H bonds for simplicity, Eq. 4.2, to distinguish them from the interfacial defects (although it should be noted that the difference between interface and bulk becomes blurry in ultrathin HKMG stacks).

Note that the RD model with defect dissociation (at some rate) and subsequent H/H2 diffusion is agnostic to the nature of H passivated defects at the channel/gate insulator interface and inside the gate insulator bulk. As long as there are H passivated defects, the RD model is applicable and would provide n ~ 1/6 power law time dependence during DC and AC stress and f independence during AC stress as discussed earlier in Sect. 4.4.

4.6.2 Dissociation of H Passivated Defects

Although a generic X-H defect is used in Sect. 4.3 due to the uncertainties listed in Sect. 4.6.1, the original reports suggested that inversion layer holes during NBTI stress tunnel to the interfacial Si-H defect precursors, get captured to make them weak, and the weak bonds can subsequently get broken by thermal activation [34, 43]. However, the charge neutrality level (0/ + ) of Si-H bond was shown at ~4 eV below the Si valence band [63], and therefore, it is suggested that Si-H bonds cannot capture holes via tunneling [51].

As discussed above, there exists a strong possibility that the dominant electrically active defects are something other than the usual paramagnetic Si-H bonds. Moreover, the Si-H charge neutrality level is determined using Density Functional Theory (DFT) calculations in bulk amorphous Si (a-Si) in [63] and not in SiO2 (or more appropriately, SiON). Moreover, while DFT calculations presumably work well for thicker and bulk material systems, it faces challenges when a thin amorphous layer is sandwiched between two interfaces, e.g., a thin SiO2 (or SiON) layer between Si/SiO2 and SiO2/poly-Si interfaces for conventional single-layer gate insulator, and even thinner SiO2 (or SiON) IL between Si/IL and IL/High-K interfaces for HKMG gate insulators. DFT also faces challenges in the presence of different species, e.g., the presence of Hf in IL due to penetration from HfO2 High-K and also the presence of N in IL due to penetration from spacer or gate material [9], and in the presence of defects (e.g., Ov− [61]). Therefore, DFT simulations are challenging in realistic gate insulator stacks.

The thermal dissociation of Si-H bonds requires very high energy (EA = 2.6 eV) [45, 64] and therefore is presumed to be impossible under normal NBTI experimental conditions [65]. However, the chemical reaction Si-H + H → Si + H2 is suggested to have very low barrier [45], and hence, it is presumed that the release of H atoms bonded with channel acceptors initiate the H dissociation from interfacial Si-H bonds [65]. However, note that the NBTI degradation magnitude is similar between planar (high channel doping) and FinFET (negligible channel doping) devices for similar VGSTR and T [16, 17], which is inconsistent with the concept of released H from the channel acceptors being responsible for bond dissociation (this theory would imply negligible NBTI in FinFETs). Another recent report has suggested the release of H atoms from the gate and subsequent diffusion toward the channel initiate the Si-H bond dissociation near the channel/gate insulator interface (the Gate Side Hydrogen Release model) [66]. However, this framework is rate limited by H release from the gate and therefore cannot explain the impact of higher Ge% in the channel (reduction in NBTI magnitude and increase in VAF at higher Ge%) as discussed before and later in Chaps. 8, 9 and 11.

On the other hand, the mechanism discussed in Sect. 4.3 can explain measured data under wide range of experimental conditions and channel/gate insulator process changes as discussed in Sect. 4.4 and also in later chapters of this book.

4.6.3 Model Parameters

The Si-H bond dissociation energy has been found to be ~2.6 eV using Electron Paramagnetic Resonance (EPR) studies [45], which is much larger than the EAKF1 values listed in Table 4.2. Note that the bond dissociation studied in [45] is under vacuum thermal anneal in Si (111)/SiO2 (50 nm thickness) samples and is unlikely to represent NBTI defects in Si (100) or Si (110) interfaces with thinner gate insulators as mentioned above. Moreover, as discussed above, the electrically active defects exposed to NBTI in modern devices are not necessarily the standard Pb centers that were studied using EPR in [45].

The Arrhenius T activation values used in Table 4.1 are similar for the forward and reverse reactions governed by Eq. 4.4 (corresponding to the chemical reaction of Eq. 4.2). However, they are respectively found to be exothermic and have very large thermal barrier from EPR studies in Si (111)/SiO2 system [45, 67]. Therefore, the choice of these RD model parameter values seems questionable [51]. It is important to note that Eq. 4.4 (or Eq. 4.2) and the corresponding parameter values are for H passivate defects inside the SiO2 (or SiON) bulk or at the IL/High-K interface, and therefore, identical values as [45, 67] are not expected.

Finally, the H2 diffusivity values listed in Table 4.1 are presumably different as compared to those in other reports [51]. It is noteworthy that modern gate stacks containing Nitrogen can have significantly lower H2 diffusion and hence, reduced diffusivity values are expected [3].

It is noteworthy that although the objections raised in [51] seem plausible at the face value, none of them can be justified under a rigorous inspection. On the other hand, the RD model with fixed and adjustable parameters listed in Table 4.1 and Table 4.2, respectively, can quantitatively model the DCIV measured ∆NIT time kinetics during DC and AC stress under different experimental conditions, and on various types of devices. The RD model can also explain a variety of other process dependence as discussed in later chapters.

4.7 Summary

According to the BAT-NBTI framework, device parametric drift is due to uncorrelated sum of different underlying processes, e.g., ∆VT = ∆VIT + ∆VHT + ∆VOT, where ∆VIT is calculated by the TTOM-enabled RD model. RD model with defect-assisted dimerization remains consistent between the deterministic and stochastic implementations and is used throughout this book. RD model calculates the time kinetics of ∆NIT during and after stress, while TTOM computes their contribution (∆VIT) to overall ∆VT. The ∆NIT kinetics simulated by the RD model shows power law time dependence at longer time with exponent n ~ 1/6 for both DC and AC stress and f independence for AC stress. The model uses an inversion layer hole-assisted defect dissociation mechanism at the channel/gate insulator interface, with four parameters to quantify process changes. The model is validated using DCIV measured ∆NIT time kinetics during DC and AC stress, in planar and FinFET devices having different processes (Ge% in the channel and N% in the gate stack), and for different experimental conditions. Two of the process-dependent parameters can be obtained by bandstructure calculations, and so the other two are truly adjustable across process changes. The validity of the physical mechanisms governing RD model and the model parameter values are also discussed.

Other components of the BAT framework for NBTI, i.e., TTOM, hole trapping and bulk trap generation, are described in Chaps. 5 and 6.