1 Introduction

Most of the modern symbolic circuit analysis techniques are based on matrix calculus [1,2,3,4,5,6,7,8,9,10] or operations with circuit graph [3, 4, 10,11,12,13,14,15]. However, the usage of matrix representation or graph model may lead to the terms cancellations and produces some pseudo-dependencies in functions. In this chapter, we introduce the basics and advances of circuit analysis by parameter extraction approach which provides the effective symbolic calculation without constructing the circuit equations. Parameter extraction method was developed at the beginning of the XX century by Friedrich Wilhelm Feussner, one of the Kirchhoff’s pupils. The formulae presented in [16, 17] provide the calculation of circuit determinant and doesn’t need the circuit description as the matrix or topological graph. The determinant of Z-circuit (y-circuit) is defined by Feussner as the determinant of the corresponding loop impedance (nodal admittance) matrix. The diacoptic formulae for bisection of the circuit by one or two nodes were also proposed in [16] to improve the computational efficiency of parameter extraction method.

The parameter extraction approach was used in the various symbolic analysis techniques [5, 18,19,20,21,22,23,24,25,26]. Several researches were based on Feussner’s publications [19, 23, 25,26,27]. M. E. Parten and R. H. Seacat proposed the method of network functions calculation of nullor-based circuit by extraction of all elements parameters until the residual circuits that contain only the norators and nullators is derived [23, 25, 26]. However, this method can be used only for active circuits with ideal operational amplifiers. The formula for extraction of controlled sources parameters was proposed by R. Hashemian in [19], but it deals with combinatorial enumeration. The Feussner’s diacoptic formulae were used by S. M. Chang and G. M Wierzba for symbolic analysis of networks with nullors. However, the decomposition method proposed in [28, 29] is based on matrix manipulations and suffers from the tedious algorithm of determinant sign calculation. Also, some additional transformations of equivalent circuit are needed to use the bisection formulae in a matrix form.

The advantages of techniques of Feussner and his successors were implemented in GPEM [30,31,32,33,34,35,36,37,38,39,40]. GPEM is an effective tool for symbolic analysis, diagnosis, and synthesis of analog circuits. The parameter extraction cancellation-free method for symbolic analysis of switched capacitor circuits has been developed in [37]. The techniques of computation of the symbolic circuit functions sensitivities in Bode’s form and in Hoang’s form are described in [36]. The implementation of parameter extraction approach for symbolic circuit analysis by means of the Middlebrook’s extra element theorem was proposed in [33]. The symbolic technique for analog fault diagnosis was introduced in [38]. Several GPEM-based circuit synthesis algorithms were developed: (1) an algorithm of automated synthesis of all existing equivalent pathological element-based circuits that correspond to the given polynomial network function [34]; (2) a design algorithm of OTA-based circuits [32]; (3) an algorithm of circuit synthesis using transformation of trees with pathological elements [39]. Several GPEM-based computer programs for automated circuit analysis and synthesis were developed. The symbolic analyzer CirSym developed by V. Filaretov is available online: http://intersyn.net/en/cirsym.html.

GPEM can be successfully used for symbolic analysis of active circuits with pathological mirror elements. However, the technique proposed in [35] deals with the big amount of special cases of elements connections which complicate the symbolic analysis of large circuits. In this chapter, the new approach to the calculation of pathological element-based circuits by GPEM is presented.

The decomposition procedures can significantly increase the efficiency of symbolic analysis [4, 14, 15, 41,42,43,44]. In this chapter, we also present the hierarchical decomposition techniques of upward analysis and downward analysis of large-scale circuits by GPEM.

The chapter comprises three main sections. Section 2 introduces the basics of GPEM. The usage of parameter extraction formulae for circuit determinant expansion is discussed. The rules of degeneracy and simplification of the pathological element-based circuits are considered. Section 3 gives the application of GPEM to the generation of symbolic circuit functions in the case of Single-Input-Single-Output (SISO) and Multiple-Input-Single-Output (MISO) circuits. In Sect. 4 the extension of the method of residual circuits [23] by usage of GPEM and the concept of HOSC [22, 45] is presented. Section 5 focuses on hierarchical decomposition approaches to circuit analysis. The techniques of upward analysis and downward analysis by GPEM are proposed. The illustrative examples of usage of GPEM and its applications are included in this chapter. Conclusions summarize the results of the chapter.

2 The Basics of GPEM

2.1 Feussner’s Formulae for Determinant Expansion of the Passive Circuit

Classic Feussner’s formulae for extraction of impedance or admittance parameters are presented below [16, 17]:

$$\Delta = Z\Delta (Z \to \infty ) + \Delta (Z = 0),$$
(1)
$$\Delta = y\Delta (y \to \infty ) + \Delta (y = 0),$$
(2)

where Δ is a circuit determinant; Δ(z → ∞) and Δ(y = 0) are the determinants of subcircuits in which extracted element is deleted; Δ(y → ∞) and Δ(z = 0) are the determinants of subcircuits in which extracted element is short-circuited.

Recursive usage of the formulae (1) and (2) provides the reduction of an initial circuit to several residual topologies shown in Fig. 1 which determinants can be calculated by Ohm’s Law. GPEM using the complex impedance of the inductors and the complex admittance of capacitors in the Laplace domain: Z L  = sL and y c  = sC correspondingly.

Fig. 1
figure 1

The residual circuits and their determinants

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The circuit-algebraic expressions that contain the parameters symbols, mathematical signs and derived subexpressions in the form of subcircuits, can be useful for illustration of the process of determinant expansion by parameters extraction [28]. For example, the Feussner’s formulae can be expressed in the circuit-algebraic form as following:

(3)
(4)

The diacoptic approach to circuit analysis was discussed by Feussner long before the publications of G. Kron [46]. He proposed the technique of circuit decomposition (bisection) based on following formulae for bisection of the circuit by one or two nodes correspondingly:

$$\Delta = \Delta_{1} \Delta_{2}$$
(5)
$$\Delta = \Delta_{1} \Delta_{2} (a,b) + \Delta_{1} (a,b)\Delta_{2} ,$$
(6)

where Δ1 and Δ2 are determinants of the first and second subcircuits in which the node a in (5) and nodes a and b in (6) are opened, Δ1(a,b) and Δ2(a,b) are determinants of subcircuits in which the nodes a and b are shorted.

In the circuit-algebraic form the bisection formulae by one or two nodes are shown below correspondingly:

(7)
(8)

Example 1

Let’s consider the determinant calculation procedure in the case of the simple two-section LC-ladder circuit shown in Fig. 2 to illustrate the usage of Feussner’s formulae.

Fig. 2
figure 2

LC-ladder circuit

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The bisection of the ladder by two nodes a and b by usage of (6) leads to the following circuit algebraic expression:

(9)

The parameter extraction procedures for determinants calculation of four subcircuits in (9) are shown below:

(10)
(11)
(12)
(13)

The result of the substitution of (10)–(13) into (9) can be expressed as:

$$\Delta = (y_{1} (Z_{1} ) + 1)(Z_{2} (y_{2} ) + 1) + Z_{1} y_{2} .$$
(14)

The Feussner’s formulae provide quite efficient symbolic determinant calculation of passive circuit. M. E. Parten and R. H. Seacat implemented (1) and (2) to the analysis of nullor-based circuits by extraction of all elements parameters until the residual circuits which contain only the norators and nullators [23]. The well-known equivalent transformations of parallel or series connection of norator and nullator were used for determinants computation of residual nullor circuits. However, this method can be used only for active circuits with ideal operational amplifiers. The new formula for extraction of parameters of controlled sources (CS) was needed to extend the Feussner’s approach.

2.2 Extraction of Controlled Sources Parameters

The formula for the extraction of CS parameter was proposed by R. Hashemian in 1977 [19]:

$$\Delta = \chi \Delta (\chi \to {\text{nullor}}) + \Delta (\chi = 0),$$
(15)

where χ is a parameter of arbitrary CS, Δ(χ → nullor) is a determinant of the circuit in which a CS element is replaced by nullor, Δ(χ = 0) is a determinant of the circuit in which the parameter of CS is equal to zero.

Hashemian has used formula (15) for simultaneous expansion of determinant by parameters of all n CS which circuit contains. Such technique leads to the enumeration of 2n summands and cannot provides the generation of expression in the compact size.

The formula (15) was developed by V. Filaretov in 1998 irrespective of Hashemian’s publication [19]. The recursive extraction of CS parameters by (15) was proposed. Also instead of original Carlin’s nullor shown in Fig. 3a [47] the concept of oriented nullor, introduced in network theory by A.G. Davies [48] and J. Braun [49], is used in GPEM. The orientation of nullor provides simpler computation of the determinant expression sign of the residual nullor-based circuit as shown in Fig. 4a and b.

Fig. 3
figure 3

Nullor symbol a, oriented nullor symbol b, the equivalent nullor circuits of pathological mirrors: VM c and CM d

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Fig. 4
figure 4

The residual circuits consists of nullor a–b, controlled sources c–f

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The oriented nullor is successfully used for calculation of network functions [49], as well as for active devices simulation [35]. For example, the equivalent circuits of voltage mirror (VM) and current mirror (CM) in which g = 1 are shown in Fig. 3c and Fig. 3d correspondingly. The pathological mirrors are useful ideal circuit elements for modeling active devices with voltage and current reversing [2, 7,8,9, 50,51,52,53].

The subcircuits may include more than one oriented nullor. There are several simple rules that can help to deal with such cases: (1) enumerate the nullator-norator pairs; (2) invert the sign of determinant in the case of inversion of the norator or nullator orientation; (3) invert the sign of determinant in the case of the pair numbers interchanging between two norators or two nullators.

The circuit-algebraic expressions for the parameter extraction cases for each of the four depended sources, using formula (15), are shown below:

(16)
(17)
(18)
(19)

where K is a control parameter of voltage controlled voltage source (VCVS), G is a control parameter of voltage controlled current sources (VCCS), H is a control parameter of current controlled voltage source (CCVS) and B is a control parameter of current controlled current source (CCCS).

The determinant of the circuit with pathological elements can be equal to zero [28, 29, 54, 55]. Such circuits are called the degenerated circuits. The check for the degeneracy of subcircuits derived by usage of formulae (1), (2), (5), (6) and (15) is very important part of the process of symbolic analysis by GPEM.

2.3 Degeneracy and Simplification of Circuits Containing Pathological Elements

Although topological conditions of circuit degeneracy were introduced for the first time in the mid-1970s [54, 55] the degeneracy check still can be confusing for circuit designers in the certain cases [56]. Therefore in GPEM, the generalized topological conditions are used. The determinant of circuit is equal to zero in following cases: (1) the circuit consists of several not connected subcircuits; (2) the circuit contains at least one loop consisting only of voltage sources and norators or controlling currents of CS and nullators; (3) the circuit contains at least one cross-section consisting only of the current sources and norators or controlling voltages of CS and nullators. Note that the voltage sources and current sources mentioned in topological conditions can be the input sources or depended sources as well.

The determinant of the circuit consisting only of nullors is nonzero if there is a tree which includes all of the norators while the collection of remaining branches (nullators) is the complement of such a tree and vice versa.

The degenerated circuits cannot be equivalent to each other because responses of the signal in such circuits are indeterminate. Therefore the equivalent transformation of the parallel connection of voltage source and norator into voltage source as shown in [53, 56], the transformation of the series connection of the current source and norator into current source as shown in [56], and the short-circuiting of the current source and nullator connected in series as shown in [53], are not correct.

In Tables 1 and 2 we present the special cases of elements connections derived by usage of parameter extraction formulae and topological conditions which considered above.

Table 1 The circuit elements in short-circuit and in open loop
Full size table
Table 2 The equivalent transformations of circuits containing pathological elements
Full size table

3 Symbolic Circuit Analysis by GPEM

3.1 Symbolic Analysis of SISO Circuits

The network function of a linear circuit can be expressed as a ratio of two rational symbolic expressions. The numerator is the determinant of the circuit, in which the input source and response are replaced by an oriented norator and nullator correspondingly [49]. The denominator is the determinant of the circuit, in which the input and output signals are equal to zero.

The circuit-algebraic expressions for the circuit functions calculation are shown in the Fig. 5. For determinants calculation of network that contains any linear models of active circuit elements, including the controlled sources and pathological elements, the parameter extraction formulae (1), (2), (15) and bisection formulae (5)–(6) are recursively used. Each of the derived subcircuits must be checked by topological conditions for the solvability and degeneracy. As result, the residual circuits presented in Fig. 1 and Fig. 4 is obtained.

Fig. 5
figure 5

The circuit-algebraic expressions of the circuit functions

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The order of parameter extraction can be chosen arbitrarily. So the calculated determinant can be presented as the rational polynomial expression if the reactive elements is extracted first.

The GPEM-based symbolic analyzer CirSym is developed by V. Filaretov. The program is freeware available in two versions: offline and online http://intersyn.net/en/cirsym.html. The input data is a slightly modified Spice-compatible netlist, which can be entered online or loaded as a cir-file. Circuit nodes should be numbered as integers. The passive impedance and admittance elements are identified by uppercase and lowercase characters correspondingly: R, L, C and g, l, c. Controlled sources are identified by following symbols: K is a parameter of VCVS, G is a parameter of VCCS, H is a parameter of CCVS and B is a parameter of CCCS. Pathological elements are identified as follows: N is a nullor, M is a VM-CM pair, T is a CM-nullator pair and Q is a norator-VM pair. Note that the input voltage source should be defined as EMF source and described by symbol E. CirSym-online provides the calculation of several circuits at once. The end of the netlist for each circuit and the end of the whole of input data are notified by strings « .end » and « .total » correspondingly.

Example 2

Let’s consider the simple high-pass filter circuit containing the non-ideal OpAmp that modeled by VCVS as shown in Fig. 6. For the sake of clarity, we calculate the numerator and denominator of voltage transfer function separately.

Fig. 6
figure 6

VSSC-based equivalent circuit of high-pass filter

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Numerator calculation. The parameter sC1 can be extracted from the numerator subcircuit in accordance with Table 2 due to the series connection of admittance and norator:

(20)

Parallel connection of voltage source of VCVS also provides simplified extraction of parameter K1. There are two nullors in the circuit now and they must be enumerated. The interchanging of numbers between two norators leads to inversion of expression sign and provides the usage of the equivalent transformation of nullor as shown in Fig. 4a. The admittance g2 is deleted in accordance with Table 2. The sign of determinant is changed again in the consequence of the equivalent transformation of norator and nullator which are labeled by « 2 » in accordance with Fig. 4b.

(21)

Denominator calculation. Two subcircuits that correspond to the determinants Δ(K1 → nullor) and Δ(K1 = 0) is derived as result of the VCVS parameter extraction by formula (15). The first subcircuit can be easily reduced to expression –K1g2sC2 by usage of Tables 1 and 2. Note that the negative sign is the consequence of orientation of norator and nullator as shown in Fig. 4b. The second subcircuit can be expanded by extraction of the multibranch parameter (sC1 + g2).

(22)

The resulting transfer function can be expressed as follows:

$$H = \frac{{\Delta_{3} }}{\Delta } = \frac{{s_{{}}^{2} C_{1} C_{2} K_{1} }}{{ - K_{1} g_{2} sC_{2} + (sC_{1} + g_{2} )(sC_{2} + g_{1} ) + sC_{2} g_{1} }}.$$
(23)

3.2 Symbolic Circuit Analysis of MISO Circuits

The nullator controlled multidimensional source [31] can be used for calculation of response function V out of arbitrary MISO circuit that consists of n voltage sources and m current sources as shown in Fig. 7a. In that case, all of the input sources is transformed into controlled sources which will be oriented opposite [18]. All of the sources is controlled by the same nullator as shown in Fig. 7b. Parameters of input sources V1, V2, …, V n and I1, I2, …, I n is used as parameters of the nullator controlled multidimensional source. The properties of a nullator of a multidimensional source are the same as the properties of a standard nullator. Thus, all known operations with nullators are still valid. Obviously, the network can include only one nullator controlled multidimensional source.

Fig. 7
figure 7

The circuit with n input voltage sources and m input current sources a, circuit with nullator controlled multidimensional source b

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The following recursive formula was proposed in [31] to calculate the numerator of k-th voltage or current function of MISO circuit:

$$\Delta_{k} = p_{i} \Delta_{1} + \Delta_{2} .$$
(24)

where p i is a source parameter V i or I i , Δ1 is the determinant of network in which the source with parameter p i corresponding to V i or I i is replaced by a norator, the nullator of the multidimensional source is replaced by a standard nullator, and parameters of all other sources are equal to zero; Δ2 is the determinant of network in which the parameter of extracted source is equal to zero. Note that Δ2 is equal to zero if all m + n parameters of sources have been extracted.

Let’s use the formula (15) to extract parameter V1 in numerator circuit which is presented in Fig. 7b. As result we obtained the circuit-algebraic expression that shown below:

(25)

As can be seen from (25), the extracted voltage source in the first subcircuit is transformed into norator while parameters of others sources are equal to null. Therefore the first subcircuit contains only one nullor and can be calculated by formulae (1), (2), (15). Others sources parameters can be extracted from the second subcircuit in a similar way.

Example 3

The usage of the concept of nullator controlled multidimensional source can be explained by means of the symbolic analysis example of the summing amplifier circuit with V out  = Δ k /Δ shown in Fig. 8a.

Fig. 8
figure 8

a The summing amplifier circuit, b equivalent circuit with nullator controlled multidimensional source

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Numerator calculation. The equivalent circuit shown in Fig. 8b is used for calculation of voltage function numerator Δ k by formula (24). There are two nullor-based subcircuits as result of the extraction of parameters V1 and V2. The determinant expressions can be easily derived by using simplification conditions in Table 2 as follows:

(26)

Denominator calculation. The voltages of both sources V1 and V2 are equal to null. There is only one regular nullor in the subcircuit. The determinant expansion by using Table 2 is trivial:

(27)

4 The Technique of Determinant Expansion of Pathological Element-Based Residual Circuits

As seen from examples in previous subsections, the usage of formulae (1), (2), (5), (6) and (15) along with the conditions of circuit degradation and simplification from Tables 1 and 2 is easy, intuitive and effective especially in the case of relatively small circuits. However, the big amount of special connections of elements complicates the symbolic analysis of large subcircuits that contain only of pathological elements which are the result of extraction of all impedances, admittances, and CS. A more simple technique of determinants computation of the pathological element-based residual circuits is needed.

4.1 Expansion of Determinants of Pathological Element-Based Residual Circuits

The main idea of the new approach is that the determinant of the residual circuit, which contains only the pathological elements, can be calculated by usage of matrix algebra operations instead of simplification by conditions presented in Tables 1 and 2. The connection of norator or nullator (VM or CM) to the circuit leads to the summation (subtraction) of rows or columns in circuit the admittance matrix. The rows or columns numbers correspond to the nodes numbers of the circuit. The concept of HOSC [22, 45] can be useful to represent the matrices in such operations.

The higher order cofactor is a cofactor of a cofactor. The n-th order cofactor can be identified by a symbol Δr1,k1,r2,k2,…rn, kn, where r1, r2, …, r n and k1, k2,…, k n are the numbers of deleted rows and columns respectively. If at least one deletion in the higher order cofactor has a summative form, then cofactor is called a higher order summative cofactor.

For example, the first-order HOSC can be described as ∆(a±b)(c±d), where a and b are the numbers of rows, c and d are the numbers of columns. In the case of summation of numbers (a + b) or (c + d) the row a is added to row b or the column c is added to column d. In the case of subtraction of numbers (a–b) or (c–d) the entries of the row a or the column c is inverted before addition to the row b or to the column d correspondingly. Note, that the added row a or column c is deleted from the matrix. The following notation Δ(a+0)(c+0), where zero is the number of grounded node in the circuit, means the deletion  operation of the row a and column c. Obviously, ∆(a–0)(c–0) = ∆(a+0)(c+0).

The matrices of pathological elements are presented in Table 3, where N is a symbol of the norator-nullator pair, Q is a symbol of the VM-norator pair, T is a symbol of the nullator-CM pair, M is a symbol of the VM-CM pair. If one of the matrix entries is null the determinant of pathological element matrix is equal to zero. In Table 3 the matrix identities for all four pathological elements in the form of HOSC are proposed. To prove the matrix identities presented in Table 3 one can apply the Laplace’s cofactor expansion.

Table 3 The equivalent HOSC and matrices of pathological elements
Full size table

Matrix representation of pathological elements provides the way to reduce the matrix of the residual circuit by extraction of virtual parameters that are equal in absolute values:

$$\Delta = \left\{ \begin{aligned} X \cdot \Delta_{(a \pm b)(c \pm d)} ,\,\,\,\,\,\,\,a = c \hfill \\ - X \cdot \Delta_{(a \pm b)(c \pm d)} ,\,\,\,\,a \ne c \hfill \\ \end{aligned} \right.,$$
(28)

where X is a symbol of pathological element written at the intersection of rows a and b and columns c and d of the circuit matrix, Δ(a±b)(c±d) is the circuit matrix transformed in accordance with Table 3.

The recursive usage of the formula (28) provides the calculation of determinant of the matrix of the residual circuit. The determinant of the non-degenerated nullor-based residual circuit can take on values Δ = 1 or Δ = –1. The determinant value of non-degenerated residual circuit containing pathological mirrors can be multiple of 2.

Example 4

Suppose that the pathologic element-based circuit shown in Fig. 9a is a residual circuit of a certain network in which all of the impedances, admittances, and CS were extracted.

Fig. 9
figure 9

The pathologic element-based residual circuits

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The HOSC list and its representation in the form of circuit matrix can be expressed as follows:

$$\Delta_{(1 - 2)(2 + 1),(1 - 3)(0 + 1),(1 + 3)(1 + 3),}$$
(29)
(30)

Let’s extract T1 from the matrix by formula (28). The symbol of the first nullator-CM pair is deleted as shown below:

(31)

The subtraction of entries at rows 1 and 2 leads to inversion of the entries of row 1:

(32)

The result of the addition of entries in columns 2 and 1 is shown below:

(33)

Now let’s rearrange the numbers of columns and rows as follows:

(34)

The number of the row a is not equal to the number of the column c (1 ≠ 2), so in accordance with (28):

(35)

As seen from (35), the types of non-extracted pathological elements is changed as following T2 → N2 and N1 → T3:

(36)

Now let’s extract the symbol of nullor N2:

(37)

The result of the addition of the entries in rows 2 and 3 is shown below:

(38)

The last step is the addition of columns 0 and 2 which leads to deletion of column 2:

(39)

The value of the determinant is Δ = –2.

4.2 The Algorithm of Determinant Expansion Directly from HOSC of Residual Circuits

The HOCS pairs (a ± b)(c ± d) can be extracted instead of the pathological elements symbols. The determinant expansion of residual circuits directly from HOSC is more appropriate for automatic calculation. The algorithm proposed is shown in Fig. 10. The input data is the HOSC list of a certain circuit in which all of the elements except the pathological mirrors and nullors were extracted by formulae (1), (2) and (15).

Fig. 10
figure 10

The flow chart of algorithm

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The individual aspects of analysis stages are detailed below:

  1. 1.

    The netlist of the residual circuit is transformed into the HOSC list.

  2. 2.

    At the beginning of computation process and after every extraction iteration the HOSC list must be checked for circuit degeneracy conditions. If the HOSC list includes more than one element then determinant is equal to zero in following cases:

$$(\text{a} + \text{a}) \to \Delta = 0;$$
(40)
$$(\text{c} + \text{c}) \to \Delta = 0.$$
(41)

If the HOSC list includes only one element that differs from ∆(a+b)(a+b) = 1 and ∆(a+b)(b+a) = –1, then determinant is equal to zero. For example: ∆(a+b)(c+d) = 0.

  1. 3.

    Several equivalent transformations must be performed in the HOSC list:

  1. I.

    Determinant doubling (2Δ):

$$({\text{a}} - {\text{a}}) \to ({\text{a}} + 0),$$
(42)
$$({\text{c}} - {\text{c}}) \to ({\text{c}} + 0).$$
(43)
  1. II.

    The transformations of the HOSC list elements with null summand:

$$({\text{a}} - 0) \to ({\text{a}} + 0);$$
(44)
$$({\text{c}} - 0) \to ({\text{c}} + 0);$$
(45)
$$(0 - {\text{a}}) \to ({\text{a}} + 0);$$
(46)
$$(0 + {\text{a}}) \to - ({\text{a}} + 0);$$
(47)
$$(0 - {\text{c}}) \to ({\text{c}} + 0);$$
(48)
$$(0 + {\text{c}}) \to - ({\text{c}} + 0).$$
(49)
  1. III.

    The transformations of the HOSC list elements with the first negative number:

$$(( - a) + b) \to - (b + ( - a)) \to - (b - a) \to - (a - b),$$
(50)
$$\left( {\left( {{-}a} \right){-}b} \right) \to \left( {b{-}\left( {{-}a} \right)} \right) \to \left( {b + a} \right) \to {-}\left( {a + b} \right),$$
(51)
$$\left( {\left( {{-}c} \right) + d} \right) \to {-}\left( {d + \left( {{-}c} \right)} \right) \to {-}\left( {d{-}c} \right) \to {-}\left( {c{-}d} \right),$$
(52)
$$\left( {\left( {{-}c} \right){-}d} \right) \to \left( {d{-}\left( {{-}c} \right)} \right) \to \left( {d + c} \right) \to {-}\left( {c + d} \right).$$
(53)
  1. 4.

    The default positive sign of determinant must be inverted in the case of transformations (47), (49), (50)–(53) or extraction of the HOCS pair (a + b)(c + d) in which a ≠ c (see step 7).

  2. 5.

    The extraction of arbitrary HOSC pair (a + b)(c + d) decreases HOSC list by one.

  3. 6.

    After extraction of HOCS pair (a ± b)(c ± d) the numbers of rows of non-extracted HOSC pairs will be replaced as follow: a → b. The numbers of columns is replaced in a similar way: c → d. If a = c the analysis procedure repeats from degeneracy checking. In the opposite case, the next step must be performed.

  4. 7.

    If a ≠ c the rows and columns numbers of non-extracted HOSC pairs is replaced as follows: a → c. This operation is inverting of the sign of the determinant.

The algorithm of calculation of determinant of the residual circuit consisting of pathological elements only is implemented in circuit analyzer CirSym.

Example 5

The sequence of operations of determinant calculation of the pathologic element-based residual circuit which is shown in Fig. 9a is presented in Table 4 in accordance with the algorithm proposed.

Table 4 The expansion of HOSC list (29)
Full size table

As can be seen, the result of calculation by the expansion of HOSC list is the same as result of matrix expansion in Example 4.

Example 6

Suppose that pathologic element-based circuit shown in Fig. 9b is a residual circuit of a certain active network in which all of the impedances, admittances, and CS were extracted. The HOSC list of pathological elements is written below in the following order: N1, M1, M2, M3, M4, Q1, T1.

$$\Delta_{{\left( { 1+ 3} \right)\left( { 1+ 4} \right),\left( { 2{-} 3} \right)\left( { 3{-} 5} \right),\left( { 3{-} 4} \right)\left( { 4{-} 5} \right),\left( { 4{-} 5} \right)\left( { 2{-} 6} \right),\left( { 5{-} 6} \right)\left( { 3{-} 7} \right),\left( { 7+ 3} \right)\left( { 5{-} 7} \right),\left( { 7{-} 1} \right)( 6+ 4)}} .$$
(54)

The sequence of operations of determinant calculation is presented in Table 5.

Table 5 The expansion of HOSC list (54)
Full size table

The obtained results of examples which considered above are confirmed by usage of CirSym.

5 Circuit Decomposition in GPEM

There are two hierarchical decomposition approaches to circuit analysis. The first one is called upward analysis and it is based on the combination of subcircuits [44]. The downward analysis deals with recursive usage of circuit bisection. Both of decomposition approaches are implemented in GPEM. The upward analysis provides the generation of circuit function in the form of sequence of expressions (SoE). Many symbolic circuit analysis techniques provide the solution in the form of SoE [1, 5, 6, 44, 57,58,59] and the sequence can be made very compact [59]. The single nested expression of circuit function can be obtained by downward analysis.

5.1 The Downward Analysis

In this section, we present the generalized topological approach to circuit bisection which can be explained by matrix decomposition procedures. Let’s consider the arbitrary fully populated matrices A, B, and C = A+B of the same order n = 3. The determinant of C can be expressed as shown below:

$$\det ({\mathbf{C}}) = \left| {\begin{array}{*{20}c} {c_{11} } & {c_{ 1 2} } & {c_{13} } \\ {c_{ 2 1} } & {c_{ 2 2} } & {c_{ 2 3} } \\ {c_{ 3 1} } & {c_{ 3 2} } & {c_{ 3 3} } \\ \end{array} } \right| = \left| {\begin{array}{*{20}c} {a_{11} + b_{11} } & {a_{12} + b_{12} } & {a_{13} + b_{13} } \\ {a_{21} + b_{21} } & {a_{22} + b_{22} } & {a_{23} + b_{23} } \\ {a_{31} + b_{31} } & {a_{32} + b_{32} } & {a_{33} + b_{33} } \\ \end{array} } \right|.$$
(55)

The expression (55) can be transformed in consequence of linearity of the determinant as follows:

$$\begin{aligned} \det ({\mathbf{C}}) & = \left| {\begin{array}{*{20}c} {a_{11} } & {a_{ 1 2} } & {a_{13} } \\ {a_{ 2 1} } & {a_{ 2 2} } & {a_{ 2 3} } \\ {a_{ 3 1} } & {a_{ 3 2} } & {a_{ 3 3} } \\ \end{array} } \right| + \left| {\begin{array}{*{20}c} {a_{11} } & {a_{ 1 2} } & {b_{13} } \\ {a_{ 2 1} } & {a_{ 2 2} } & {b_{ 2 3} } \\ {a_{ 3 1} } & {a_{ 3 2} } & {b_{ 3 3} } \\ \end{array} } \right| + \left| {\begin{array}{*{20}c} {a_{11} } & {b_{ 1 2} } & {a_{13} } \\ {a_{ 2 1} } & {b_{ 2 2} } & {a_{ 2 3} } \\ {a_{ 3 1} } & {b_{ 3 2} } & {a_{ 3 3} } \\ \end{array} } \right| + \left| {\begin{array}{*{20}c} {b_{11} } & {a_{ 1 2} } & {a_{13} } \\ {b_{ 2 1} } & {a_{ 2 2} } & {a_{ 2 3} } \\ {b_{ 3 1} } & {a_{ 3 2} } & {a_{ 3 3} } \\ \end{array} } \right| + . \\ & + \left| {\begin{array}{*{20}c} {a_{11} } & {b_{ 1 2} } & {b_{13} } \\ {a_{ 2 1} } & {b_{ 2 2} } & {b_{ 2 3} } \\ {a_{ 3 1} } & {b_{ 3 2} } & {b_{ 3 3} } \\ \end{array} } \right| + \left| {\begin{array}{*{20}c} {b_{11} } & {a_{ 1 2} } & {b_{13} } \\ {b_{ 2 1} } & {a_{ 2 2} } & {b_{ 2 3} } \\ {b_{ 3 1} } & {a_{ 3 2} } & {b_{ 3 3} } \\ \end{array} } \right| + \left| {\begin{array}{*{20}c} {b_{11} } & {b_{ 1 2} } & {a_{13} } \\ {b_{ 2 1} } & {b_{ 2 2} } & {a_{ 2 3} } \\ {b_{ 3 1} } & {b_{ 3 2} } & {a_{ 3 3} } \\ \end{array} } \right| + \left| {\begin{array}{*{20}c} {b_{11} } & {b_{ 1 2} } & {b_{13} } \\ {b_{ 2 1} } & {b_{ 2 2} } & {b_{ 2 3} } \\ {b_{ 3 1} } & {b_{ 3 2} } & {b_{ 3 3} } \\ \end{array} } \right|, \\ \end{aligned}$$
(56)

or more briefly as

$$\det ({\mathbf{C}}) = \det ({\mathbf{A}} + {\mathbf{B}}) = \det {\mathbf{A}} + \sum {\Delta (1)} + \sum {\Delta (2) + \ldots + \sum {\Delta (k) + \ldots + \sum {\Delta (n - 1) + \det {\mathbf{B}}} } } ,$$
(57)

where Δ(k) is the determinant derived by operation of replacement of all the entries of k columns of matrix A by the entries of corresponding columns of matrix B. The sum in (57) is the sum over all possible combinations of k columns in A and B.

In accordance with Laplace theorem if we are given a selection of k rows i1, i2, …, i k of a square n-order matrix M the determinant can be characterized as the sum [60]:

$$\Delta = \left( { - 1} \right)^{{\sum\nolimits_{z = 0}^{k} {i_{z} + \sum\nolimits_{z = 0}^{k} {j_{z} } } }} M_{{j_{1} ,j_{2} , \ldots ,j_{k} }}^{{i_{1} ,i_{2} , \ldots ,i_{k} }} \overline{M\,}_{{j_{1} ,j_{2} , \ldots ,j_{k} }}^{{i_{1} ,i_{2} , \ldots ,i_{k} }} ,$$
(58)

where j1, j2, …, j k specify the columns of M, \(\overline{M\,}_{{j_{1} ,j_{2} , \ldots ,j_{k} }}^{{i_{1} ,i_{2} , \ldots ,i_{k} }}\) is the complementary minor of the minor \(M_{{j_{1} ,j_{2} , \ldots ,j_{k} }}^{{i_{1} ,i_{2} , \ldots ,i_{k} }}\). Note that the columns vary over all possible combinations of k columns.

The Eq. (57) can be expressed by usage of (58) as following [61]:

$$\det ({\mathbf{C}}) = \det ({\mathbf{A}} + {\mathbf{B}}) = \det {\mathbf{A}} + \sum\limits_{k = 1}^{n - 1} {\sum {( - 1)^{{\sum\nolimits_{z = 0}^{k} {i_{z} + \sum\nolimits_{z = 0}^{k} {j_{z} } } }} B_{k} \overline{{A_{k} }} } } + \det {\mathbf{B}},$$
(59)

where B k is the minor of order k of matrix B, \(\overline{A}_{k}\) is the complementary minor of (n–k) order formed by the determinant of the matrix A from which k rows and columns associated with minor B k have been removed.

The expression (59) seems not quite effective for determinant expansion of the fully populated matrix. But the circuit matrix usually is sparse. Thereby the formula (59) can be quite useful for the symbolic circuit analysis by hierarchical decomposition. Let’s consider the graphical models of arbitrary circuit matrices A, B, and C = A+B of the same order n which are presented in Fig. 11. The parameters of circuits’ elements are written in the entries in the shaded areas of matrices A and B. The values of the entries in the non-shaded areas are equal to null. The intersection of the rows and columns, which corresponds to the common nodes of circuits is shown as the double-shaded area in matrix C. Suppose that the set of common nodes includes the grounded node. Thereby for determinant calculation of circuit matrix C by (59), we can use only the minors and cofactors that correspond to the common nodes of subcircuits. The other minors and cofactors are equal to zero.

Fig. 11
figure 11

The graphical models of arbitrary circuit matrices A, B, and C = A+B

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The Feussner’s diacoptic formulae (5) and (6) represent the particular cases of circuit bisection. The operation of short-circuiting of the nodes a and b in bisection formula (6) is equivalent to a parallel connection of norator and nullator into those nodes, which causes the deletion of the correspondent column and the row of subcircuit matrix [62]. Therefore, the derived subcircuit may be called a «minor of circuit» by analogy with the term «minor of matrix». The symbolic expression of minor of the circuit can be calculated using formulae (1), (2) and (15).

The binary arrays represent the minors of the circuit with m number of external nodes; one of which is considered as a grounded node. The dimension of an array is 2n, where n = (m–1). The first n elements of the binary array form the norator vector and the last n elements form the nullator vector. There are two possible values for each element of vector: 0 or 1. The unity value of some entry of norator (nullator) vector means that norator (nullator) is inserted into the circuit between the correspondent node and grounded node. The norator and nullator of the inserted nullor are oriented in the same direction. In the case of zero value, the node is in open loop. The positions of entries in the vector can be presented by the tuple that consists of labels of a subcircuit external nodes excluding the basic node.

The number of binary arrays for an arbitrary subcircuit can be calculated by the formula:

$$v = \sum\limits_{i = 0}^{n} {\left( {_{n}^{i} } \right)^{2} } ,$$
(60)

where \(\left( {_{n}^{i} } \right)\) is a binomial coefficient.

The bisection formula (59) can be transformed by usage of the binary arrays concept for decomposition of the circuit by m nodes as follows:

$$\sum\limits_{i = 1}^{v} {\delta_{i} \Delta_{1} (b_{i} )\Delta_{2} (\overline{{b_{i} }} )} ,$$
(61)

where Δ1(b i ) is a first subcircuit minor which corresponds to the binary array b i ; Δ2(\(\overline{b}_{i}\)) is a second subcircuit minor which corresponds to the binary array \(\overline{b}_{i}\).

The norators and nullators that are inserted into the circuit minors can be enumerated in accordance with the values of the entries in the corresponding binary array. The binary array that corresponds to the circuit minors with enumerated nullors is called the enumerated binary array. Instead of nullator and norator connection information, this array contains nullor number which particular nullator and norator belong to. For example, the binary array b = 110101 of some circuit minor includes the two nullors labeled by « 1 » and « 2»; using those numbers binary array can be transformed into the following enumerated binary array: b’ = 120102.

The nullor circuit that corresponds to the sum of two enumerated binary arrays, is consist of n norator-nullator pairs, connected in parallel. Norator-nullator pairs must be labeled by the same number to use the nullor simplification. If the labels of a norator and nullator of certain nullor are different the permutation of labels in the sum result of two enumerated binary arrays is needed. The determinant of nullor circuit is δ = 1 if the amount of such permutations is even. In the opposite case, the sign of the product of Δ1(b i ) and Δ2(\(\overline{b}_{i}\)) in (61) is negative.

In the case of circuit bisection by three nodes (n = 2) the dimension of binary arrays is 2n = 4. The six binary arrays which are presented in Fig. 12 can be derived as the result of bisection. They are corresponding to the circuit minors of the first subcircuit in (61). The binary arrays of the second subcircuit can be obtained by operation of the one’s complement of the binary number. The tuple of common (or external) nodes of subcircuits can be written as 1212. The binary arrays, their enumerated forms, the sum results of two enumerated binary arrays and the determinants values of corresponding nullor circuits are presented in Table 6.

Fig. 12
figure 12

The circuit minors and binary arrays of three-node subcircuit

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Table 6 The binary arrays, the enumerated binary arrays, the sum results of enumerated binary arrays and the determinants values in the case of circuit bisection by 3 nodes
Full size table

The decomposition formula (61) in the case of bisection by three nodes can be expressed as follows:

$$\begin{aligned} \Delta = & \Delta_{ 1} \left( {b_{ 1} } \right)\Delta_{ 2} (\overline{b}_{ 1} ) + \Delta_{ 1} \left( {b_{ 2} } \right)\Delta_{ 2} (\overline{b}_{2} ){-}\Delta_{ 1} \left( {b_{ 3} } \right)\Delta_{ 2} (\overline{b}_{3} ){-} \\ & {-}\Delta_{ 1} \left( {b_{ 4} } \right)\Delta_{ 2} (\overline{b}_{ 4} ) + \Delta_{ 1} \left( {b_{ 5} } \right)\Delta_{ 2} (\overline{b}_{5} ) + \Delta_{ 1} \left( {b_{ 6} } \right)\Delta_{ 2} (\overline{b}_{6} ). \\ \end{aligned}$$
(62)

The circuit-algebraic form of (62) is presented below:

(63)

Let’s consider the case of circuit bisection by four nodes (n = 3) as shown in Fig. 13a. The dimension of binary arrays is 2n = 6. The binary arrays in which the number of unities in norator vector differs from a number of unities in nullator vector are excluded from search space 000000 to 111111 in accordance with (60). Thereby twenty binary arrays for each of subcircuit are presented in Table 7, as well as their enumerated forms, the sum results of two enumerated binary arrays and the determinants values of corresponding nullor circuits.

Fig. 13
figure 13

The model of circuit bisection by four nodes a, the model of combination of two subcircuits b

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Table 7 The binary arrays, the enumerated binary arrays, the sum results of enumerated binary arrays and the determinants values in the case of circuit bisection by 4 nodes
Full size table

The decomposition formula (61) in the case of bisection by four nodes can be expressed as follows:

$$\begin{array}{*{20}c} {\Delta = \Delta_{ 1} \left( {b_{ 1} } \right)\Delta_{ 2} (\overline{b}_{ 1} ) + \Delta_{ 1} \left( {b_{ 2} } \right)\Delta_{ 2} (\overline{b}_{2} ){-}\Delta_{ 1} \left( {b_{ 3} } \right)\Delta_{ 2} (\overline{b}_{3} ) + \Delta_{ 1} \left( {b_{ 4} } \right)\Delta_{ 2} (\overline{b}_{4} ){-}\Delta_{ 1} \left( {b_{ 5} } \right)\Delta_{ 2} (\overline{b}_{5} ) + } \\ {\Delta_{ 1} \left( {b_{ 6} } \right)\Delta_{ 2} (\overline{b}_{ 6} ){-}\Delta_{ 1} \left( {b_{ 7} } \right)\Delta_{ 2} (\overline{b}_{7} ) + \Delta_{ 1} \left( {b_{ 8} } \right)\Delta_{ 2} (\overline{b}_{8} ){-}\Delta_{ 1} \left( {b_{ 9} } \right)\Delta_{ 2} (\overline{b}_{9} ) + \Delta_{ 1} \left( {b_{ 10} } \right)\Delta_{ 2} (\overline{b}_{10} ) + } \\ {\Delta_{ 1} \left( {b_{ 1 1} } \right)\Delta_{ 2} (\overline{b}_{ 1 1} ){-}\Delta_{ 1} \left( {b_{ 1 2} } \right)\Delta_{ 2} (\overline{b}_{12} ) + \Delta_{ 1} \left( {b_{ 1 3} } \right)\Delta_{ 2} (\overline{b}_{13} ){-}\Delta_{ 1} \left( {b_{ 1 4} } \right)\Delta_{ 2} () + \Delta_{ 1} \left( {b_{ 1 5} } \right)\Delta_{ 2} (\overline{b}_{15} ){-}} \\ {\Delta_{ 1} \left( {b_{ 1 6} } \right)\Delta_{ 2} (\overline{b}_{ 1 6} ) + \Delta_{ 1} \left( {b_{ 1 7} } \right)\Delta_{ 2} (\overline{b}_{17} ){-}\Delta_{ 1} \left( {b_{ 1 8} } \right)\Delta_{ 2} (\overline{b}_{18} ) + \Delta_{ 1} \left( {b_{ 1 9} } \right)\Delta_{ 2} (\overline{b}_{19} ) + \Delta_{ 1} \left( {b_{ 20} } \right)\Delta_{ 2} (\overline{b}_{20} ).} \\ \end{array}$$
(64)

The bisection operation by the proposed formula (61) can be used for every derived circuit minors provides the downward hierarchical decomposition of the circuit for closed-form determinant expressions calculation. Note, that the input-port and output-port of certain CS, nullor or pathological mirrors pair, cannot be included separately in different subcircuits.

5.2 The Upward Hierarchical Analysis

The upward hierarchical analysis by GPEM starts from the decomposition of the circuit by bisection formula (61) and follows by the pairwise combination of subcircuits. The binary arrays and corresponding circuit minors are used for the representation of subcircuits. Suppose two n-port circuits combined into one circuit by m ports, which may be called the common nodes. Let’s consider the input and output ports of the circuit as external nodes. Some of the common nodes of the combined circuit can be also the external nodes.

The following algorithm is used for the combination of two subcircuits:

  1. 1.

    Generate the set of binary arrays for each of subcircuits.

  2. 2.

    Perform the pairwise comparison of binary arrays using the entries that correspond to common nodes of subcircuits to find the pairs of joint binary arrays. Two binary arrays are called jointed if the entries values that correspond to the common nodes are complementary and the sum of those values is not equal to zero.

  3. 3.

    Generate the set of binary arrays of the combined circuit using joint binary arrays. The values of binary arrays must be written in accordance with circuit tuple in the following order: firstly, the values of binary arrays which correspond to the non-common external nodes of the first subcircuit, next, the values of the binary arrays which correspond to the common nodes, and, finally, the values of the binary arrays which correspond to the non-common external nodes of the second subcircuit. The unity must be written into binary array entries that correspond to the common external nodes of the combined circuit if there are the unity values in the corresponding entries of the joint binary arrays.

  4. 4.

    Calculate the sign of circuit minors product represented by joint binary arrays according to (61). The sign is positive if the number of permutations in the enumerated joint binary arrays is even and vice versa. If the values of entries that correspond to the common external nodes are equal to unity in both joint binary arrays then the unity values of such entries in one of the binary arrays must be replaced by zero.

  5. 5.

    Summarize the circuit minors products that correspond to the pairs of joint binary arrays for each of combined circuit minors.

Let’s consider the following example to illustrate the usage of the proposed algorithm. The circuit with three nodes labeled by 3, 4 and 0 shown in Fig. 13b is obtained by combining two subcircuits 1 and 2 with four external nodes. Thereby the dimension of binary arrays is equal to 6 in the case of the separated subcircuits and to 4 in the case of the combined circuit.

A number of external nodes is the same in both subcircuits, therefore we can use the set of binary arrays from the second column in Table 7. The tuples of binary arrays of first and second subcircuits can be expressed as 312312 and 124124 correspondingly. Obviously, we need to take into account only the entries 1212 that correspond to the common nodes of subcircuits to find the set of joint binary arrays pairs and their signs. For example, two binary arrays b2 = 001001 and b13 = 100100 are jointed because their values at the entries 1212 are mutually complementary: 0101 and 1010. The sign can be calculated by summation of values at the entries of the binary arrays 1212 in the enumerated form: 0101 + 2020 = 2121. Thereby the sign of the product of two circuit minors D1(b2)∙D2(b13) is positive.

Let’s consider another pair of joint binary arrays b5 = 010001 and b9 = 011101. The values at the entries 1212 are 1001 and 0110 correspondingly. The sum result of entries in the enumerated form is 1221, therefore the sign of the product of two circuit minors D1(b5)∙D2(b9) is negative.

The tuple of binary arrays of the combined circuit consists of labels of non-common external nodes: 3434. The values at such entries in the joint binary arrays are used to generate the combined circuit binary arrays. For example, the values of b2 and b13 at the entries 3434 are 0000. The binary array 0101 of the combined circuit corresponds to the combination of the pair: b5 and b9. The binary arrays of combined circuit and corresponding joint binary arrays are presented in Table 8.

Table 8 The joint binary arrays of subcircuits 1 and 2 and binary arrays of combined circuit
Full size table

The circuit minors of combined circuit can be calculated in accordance with Table 8 as following:

$$\begin{array}{*{20}c} {\Delta \left( {0000} \right) = \Delta_{ 1} \left( {b_{ 1} } \right)\Delta_{ 2} \left( {b_{ 1 9} } \right) + \Delta_{ 1} \left( {b_{ 2} } \right)\Delta_{ 2} \left( {b_{ 1 3} } \right){-}\Delta_{ 1} \left( {b_{ 3} } \right)\Delta_{ 2} \left( {b_{ 1 2} } \right){-}\Delta_{ 1} \left( {b_{ 5} } \right)\Delta_{ 2} \left( {b_{ 9} } \right) + \Delta_{ 1} \left( {b_{ 6} } \right)\Delta_{ 2} \left( {b_{ 8} } \right) + \Delta_{ 1} \left( {b_{ 8} } \right)\Delta_{ 2} \left( {b_{ 2} } \right),} \\ {\Delta \left( {0 10 1} \right) = \Delta_{ 1} \left( {b_{ 1} } \right)\Delta_{ 2} \left( {b_{ 20} } \right) + \Delta_{ 1} \left( {b_{ 2} } \right)\Delta_{ 2} \left( {b_{ 1 5} } \right){-}\Delta_{ 1} \left( {b_{ 3} } \right)\Delta_{ 2} \left( {b_{ 1 4} } \right){-}\Delta_{ 1} \left( {b_{ 5} } \right)\Delta_{ 2} \left( {b_{ 9} } \right) + \Delta_{ 1} \left( {b_{ 6} } \right)\Delta_{ 2} \left( {b_{ 8} } \right) + \Delta_{ 1} \left( {b_{ 8} } \right)\Delta_{ 2} \left( {b_{ 2} } \right),} \\ {\Delta \left( {0 1 10} \right) = \Delta_{ 1} \left( {b_{ 4} } \right)\Delta_{ 2} \left( {b_{ 1 6} } \right){-}\Delta_{ 1} \left( {b_{ 7} } \right)\Delta_{ 2} \left( {b_{ 10} } \right) + \Delta_{ 1} \left( {b_{ 9} } \right)\Delta_{ 2} \left( {b_{ 4} } \right){-}\Delta_{ 1} \left( {b_{ 10} } \right)\Delta_{ 2} \left( {b_{ 3} } \right),} \\ {\Delta \left( { 100 1} \right) = \Delta_{ 1} \left( {b_{ 1 1} } \right)\Delta_{ 2} \left( {b_{ 1 8} } \right){-}\Delta_{ 1} \left( {b_{ 1 2} } \right)\Delta_{ 2} \left( {b_{ 1 7} } \right) + \Delta_{ 1} \left( {b_{ 1 4} } \right)\Delta_{ 2} \left( {b_{ 1 1} } \right){-}\Delta_{ 1} \left( {b_{ 1 7} } \right)\Delta_{ 2} \left( {b_{ 5} } \right),} \\ {\Delta \left( { 10 10} \right) = \Delta_{ 1} \left( {b_{ 1 3} } \right)\Delta_{ 2} \left( {b_{ 1 7} } \right) + \Delta_{ 1} \left( {b_{ 1 5} } \right)\Delta_{ 2} \left( {b_{ 1 3} } \right){-}\Delta_{ 1} \left( {b_{ 1 6} } \right)\Delta_{ 2} \left( {b_{ 1 2} } \right){-}\Delta_{ 1} \left( {b_{ 1 8} } \right)\Delta_{ 2} \left( {b_{ 7} } \right) + \Delta_{ 1} \left( {b_{ 1 9} } \right)\Delta_{ 2} \left( {b_{ 6} } \right) + \Delta_{ 1} \left( {b_{ 20} } \right)\Delta_{ 2} \left( {b_{ 1} } \right),} \\ {\Delta \left( { 1 1 1 1} \right) = \Delta_{ 1} \left( {b_{ 1 3} } \right)\Delta_{ 2} \left( {b_{ 20} } \right) + \Delta_{ 1} \left( {b_{ 1 5} } \right)\Delta_{ 2} \left( {b_{ 1 5} } \right){-}\Delta_{ 1} \left( {b_{ 1 6} } \right)\Delta_{ 2} \left( {b_{ 1 4} } \right){-}\Delta_{ 1} \left( {b_{ 1 8} } \right)\Delta_{ 2} \left( {b_{ 9} } \right) + \Delta_{ 1} \left( {b_{ 1 9} } \right)\Delta_{ 2} \left( {b_{ 8} } \right) + \Delta_{ 1} \left( {b_{ 20} } \right)\Delta_{ 2} \left( {b_{ 2} } \right).} \\ \end{array}$$
(65)

As seen from (65), generation of SoE by proposed algorithm involves a large number of calculations of circuit minors. However, decomposition of the circuit with nullors can be simplified by using degeneracy conditions [29]. Thereby the number of circuit minors can be significantly reduced by using the following rules:

  1. 1.

    The zero value must be written in norator vector of subcircuit binary array at the entry that corresponds to the external node a if there is a norator of certain nullor or VM between nodes a and 0 in the subcircuit.

  2. 2.

    The unity value must be written in norator vector of subcircuit binary array at the entry that corresponds to the common external node a if there is a norator of certain nullor or VM between nodes a and 0 in the second subcircuit.

  3. 3.

    The zero value must be written in nullator vector of subcircuit binary array at the entry which corresponds to the external node a if there is a nullator of certain nullor or CM is connected between nodes a and 0 in the subcircuit.

  4. 4.

    The unity value must be written in nullator vector of subcircuit binary array at the entry that corresponds to the common external node a if there is a norator of certain nullor or CM between nodes a and 0 in the second subcircuit.

For example, suppose that in three-node nullor-equivalent subcircuit there is norator which is connected between nodes 2 and 0. In accordance with proposed rules, only three binary arrays is generated instead of six which presented in Table 6: 0000, 1001, 1010.

Example 7

Let’s consider the band-pass filter shown in Fig. 14, which was firstly symbolically calculated in the paper [44] by J. A. Starzyk and A. Konczykowska. This is a well-known test circuit for symbolic analysis methods. It contains 13 OpAmps modeled by nullors, and 36 resistors and 8 capacitors modeled by admittances.

Fig. 14
figure 14

The band-pass filter [44]

Full size image

The filter can be decomposed into the five subcircuits as shown in Fig. 15. Note that for the sake of clarity the common nodes of subcircuits are renumbered. The original nodes labels are shown in brackets in Fig. 15. The subcircuit 1 presented in Fig. 16 is topologically identical to the subcircuits 2–4. Therefore the subcircuits 2–4 can be easily derived from Fig. 16 by substitution of identification numbers of symbols of resistors and capacitors correspondingly by the following formulae:

Fig. 15
figure 15

The subcircuit-level model of band-pass filter

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Fig. 16
figure 16

The first a and fifth b subcircuits of band-pass filter

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$$N_{R} = i + 8(j - 1),$$
(66)
$$N_{C} = i + 2(j - 1),$$
(67)

where i is an identification number in subcircuit 1, j = {2,3,4} is a number of one of the subcircuits 2–4.

There are four external nodes in subcircuits 1–4. In this case, 20 binary arrays can be derived. However the equivalent circuit of filter includes the 13 nullor, therefore, the number of binary arrays can be greatly reduced by usage of Rules I and II: b1 = 101011, b2 = 101101, b3 = 101110. The tuples of binary arrays for the subcircuits 1–4 can be expressed as follows: 123123, 234234, 345345, 456456.

In the case of subcircuit 5 in Fig. 16b which includes three external nodes the number of binary arrays can be reduced to the two: b1 = 1001, b2 = 1010. The tuple of these binary arrays is following: 5656.

The expressions of circuit minors of subcircuits 1 and 5 calculated by GPEM are presented below:

$$\begin{array}{*{20}c} {\Delta_{ 1} \left( {b_{ 1} } \right) = {-}g_{ 1} g_{ 5} sC_{ 2} \left( {g_{ 2} + g_{ 4} + g_{ 8} } \right),} \\ {\Delta_{ 1} \left( {b_{ 2} } \right) = \left( {g_{ 1} + g_{ 3} } \right)\left[ {\left( {g_{ 6} + sC_{ 1} } \right)g_{ 4} pC_{ 2} + g_{ 5} g_{ 7} g_{ 8} } \right],} \\ {\Delta_{ 1} \left( {b_{ 3} } \right) = g_{ 2} g_{ 5} sC_{ 2} \left( {g_{ 1} + g_{ 3} } \right),} \\ {\Delta_{ 5} \left( {b_{ 1} } \right) = g_{ 3 3} \left( {g_{ 3 4} + g_{ 3 6} } \right),} \\ {\Delta_{ 5} \left( {b_{ 2} } \right) = g_{ 3 6} \left( {g_{ 3 3} + g_{ 3 5} } \right).} \\ \end{array}$$
(68)

The expressions of circuit minors of subcircuits 2–4 can be derived from (68) by renumbering of symbols numbers in accordance with (66) and (67):

$$\begin{array}{*{20}c} {\Delta_{ 2} \left( {b_{ 1} } \right) = {-}g_{ 9} g_{ 1 3} sC_{ 4} \left( {g_{ 10} + g_{ 1 2} + g_{ 1 6} } \right),} \\ {\Delta_{ 2} \left( {b_{ 2} } \right) = \left( {g_{ 9} + g_{ 1 1} } \right)\left[ {\left( {g_{ 1 4} + sC_{ 3} } \right)g_{ 1 2} sC_{ 2} + g_{ 1 3} g_{ 1 5} g_{ 1 6} } \right],} \\ {\Delta_{ 2} \left( {b_{ 3} } \right) = g_{ 10} g_{ 1 3} sC_{ 4} \left( {g_{ 9} + g_{ 1 1} } \right),} \\ {\Delta_{ 3} \left( {b_{ 1} } \right) = {-}g_{ 1 7} g_{ 2 1} sC_{ 6} \left( {g_{ 1 8} + g_{ 20} + g_{ 2 4} } \right),} \\ {\Delta_{ 3} \left( {b_{ 2} } \right) = \left( {g_{ 1 7} + g_{ 1 9} } \right)\left[ {\left( {g_{ 2 2} + sC_{ 5} } \right)g_{ 20} sC_{ 6} + g_{ 2 1} g_{ 2 3} g_{ 2 4} } \right],} \\ {\Delta_{ 3} \left( {b_{ 3} } \right) = g_{ 1 8} g_{ 2 1} sC_{ 6} \left( {g_{ 1 7} + g_{ 1 9} } \right),} \\ {\Delta_{ 4} \left( {b_{ 1} } \right) = {-}g_{ 2 5} g_{ 2 9} sC_{ 8} \left( {g_{ 2 6} + g_{ 2 8} + g_{ 3 2} } \right),} \\ {\Delta_{ 4} \left( {b_{ 2} } \right) = \left( {g_{ 2 5} + g_{ 2 7} } \right)\left[ {\left( {g_{ 30} + sC_{ 7} } \right)g_{ 2 8} sC_{ 8} + g_{ 2 9} g_{ 3 1} g_{ 3 2} } \right],} \\ {\Delta_{ 4} \left( {b_{ 3} } \right) = g_{ 2 6} g_{ 2 9} sC_{ 8} \left( {g_{ 2 5} + g_{ 2 7} } \right).} \\ \end{array}$$
(69)

The transfer function of the filter can be expressed as result of the combination of circuit minors (68) and (69) by using the hierarchical tree presented in Fig. 17. The labels of vertices 1–5 are corresponding to the numbers of subcircuits 1–5 in Fig. 15. The labels of vertices 6–9 are corresponding to the numbers of new subcircuits which are obtained by the bottom-up combination of subcircuits. Obviously, the original filter circuit which corresponds to the vertex 9 is the final result of subcircuits combination.

Fig. 17
figure 17

The hierarchical tree for combination of circuit minors of band-pass filter

Full size image

Let’s consider the combination of subcircuits 1 and 2 by nodes 0, 2 and 3. The entries 2323 must be taken into account to find the set of joint binary arrays pairs and their signs. Note that the values at the entries which correspond to the common non-external node 2 must be mutually complementary, while the value in the entries which correspond to the common external node 3 cannot be equal to zero. The pairs of joint binary arrays, binary arrays of combined subcircuit 6 are presented in Table 9.

Table 9 The joint binary arrays of subcircuits 1 and 2 and binary arrays of combined circuit
Full size table

The combination of other subcircuits can be performed in a similar way. Thereby the final quite compact SoE of filter transfer function is expressed as following:

$$\begin{array}{*{20}c} {\Delta_{ 6} \left( {b_{ 1} } \right) = \Delta_{ 1} \left( {b_{ 1} } \right)\Delta_{ 2} \left( {b_{ 1} } \right),\Delta_{ 6} \left( {b_{ 2} } \right) = \Delta_{ 1} \left( {b_{ 2} } \right)\Delta_{ 2} \left( {b_{ 2} } \right){-}\Delta_{ 1} \left( {b_{ 3} } \right)\Delta_{ 2} \left( {b_{ 1} } \right),} \\ {\Delta_{ 6} \left( {b_{ 3} } \right) = \Delta_{ 1} \left( {b_{ 2} } \right)\Delta_{ 2} \left( {b_{ 3} } \right),\,\,\,\Delta_{ 7} \left( {b_{ 1} } \right) = \Delta_{ 6} \left( {b_{ 1} } \right)\Delta_{ 3} \left( {b_{ 1} } \right),} \\ {\Delta_{ 7} \left( {b_{ 2} } \right) = \Delta_{ 6} \left( {b_{ 2} } \right)\Delta_{ 3} \left( {b_{ 2} } \right){-}\Delta_{ 6} \left( {b_{ 3} } \right)\Delta_{ 3} \left( {b_{ 1} } \right),\,\,\Delta_{ 7} \left( {b_{ 3} } \right) = \Delta_{ 6} \left( {b_{ 2} } \right)\Delta_{ 3} \left( {b_{ 3} } \right),} \\ {\Delta_{ 8} \left( {b_{ 1} } \right) = \Delta_{ 7} \left( {b_{ 1} } \right)\Delta_{ 4} \left( {b_{ 1} } \right),\Delta_{ 8} \left( {b_{ 2} } \right) = \Delta_{ 7} \left( {b_{ 2} } \right)\Delta_{ 4} \left( {b_{ 2} } \right){-}\Delta_{ 7} \left( {b_{ 3} } \right)\Delta_{ 4} \left( {b_{ 1} } \right),} \\ {\Delta_{ 8} \left( {b_{ 3} } \right) = \Delta_{ 7} \left( {b_{ 2} } \right)\Delta_{ 4} \left( {b_{ 3} } \right),\Delta_{ 9} \left( {b_{ 1} } \right) = \Delta_{ 8} \left( {b_{ 1} } \right)\Delta_{ 5} \left( {b_{ 1} } \right),} \\ {\Delta_{ 9} \left( {b_{ 2} } \right) = \Delta_{ 8} \left( {b_{ 2} } \right)\Delta_{ 5} \left( {b_{ 2} } \right){-}\Delta_{ 8} \left( {b_{ 3} } \right)\Delta_{ 5} \left( {b_{ 1} } \right),\,\,\,\,\,H = \Delta_{ 9} \left( {b_{ 1} } \right)/\Delta_{ 9} \left( {b_{ 2} } \right).} \\ \end{array}$$
(70)

The obtained result (70) can be verified by numerical simulation or exact comparison with the symbolic solution presented in [44].

6 Conclusion

In this chapter, we briefly review the basics of GPEM and its applications for symbolic analysis of large circuits with pathological element-based active device models. The method can be used for analysis of circuits containing all linear circuit elements, including nullors, four types of controlled sources, and pathological mirrors. We start with the parameter extraction formulae and circuit degeneracy conditions. Then we introduce an algorithm to improve the efficiency of determinants calculation of residual circuits containing pathological elements only. Such circuits can be derived from active networks in which all of the impedances, admittances, and CS were extracted. The algorithm proposed is based on the concept of HOSC and provides the determinant calculation by usage of simple matrix algebra operations instead of topological simplifications. Further, the hierarchical decomposition procedures for symbolic analysis of large circuits by GPEM have been introduced. The techniques proposed of upward analysis and downward analysis provide the calculation of a circuit function in the form of a single nested expression or in the form of sequence of expressions correspondingly. All described algorithms were implemented in the computer program for circuit analysis CirSym.