Abstract
A 1.8GHz RF amplifier implemented in 0.14um CMOS with frequency-independent blocker suppression is presented. The blocker suppression functionality is obtained by the adaptation of a nonlinear input–output transfer according to the blocker amplitude. Since superposition does not apply to nonlinear transfer functions, the behavior of such a transfer for strong undesired signals is different from the behavior for weak desired signals, which is exploited here. In the presence of a 0 to +11 dBm RF blocker, a voltage gain for weak signals of respectively 7.6–9.4 dB and IIP3 >4 dBm are measured, while the blocker is suppressed by more than 35 dB. In case of no blocker present at the input, the circuit is set to amplifier mode providing 17 dB of voltage gain and an IIP3 of 6.6 dBm while consuming 3 mW. Application areas are coexistence in multi-radio devices and dealing with TX leakage in FDD systems.
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1 Introduction
Modern handheld devices support a multitude of wireless standards, such as e.g. WLAN, Bluetooth, GSM, UMTS and GPS. In recent years, the number of standards has been increasing steadily. The coexistence of these multiple communication standards within a single device becomes therefore an increasingly important issue [1, 2].
Straightforward concepts to achieve reliable coexistence could either use filtering or time-sharing concepts. As filtering is often not sufficient and also not cost effective, present solutions usually apply time sharing. However, the time-shared approach reduces the achievable data throughput and also requires a challenging synchronization between the data packets of the different standards.
Due to the limitations of present coexistence solutions and the increasing number of standards in handheld devices, there is an interest to find alternative solutions to the coexistence problem. In addition, transmitter leakage in FDD systems [3] faces a similar problem as coexistence in multi-standard devices.
To avoid desensitization in the above situations, a high dynamic range has to be implemented in the receiver, leading to high power consumption. However, because of the limited energy resources available in handheld devices, minimizing the power consumption is critical. Thus, a major challenge will be to achieve low power consumption with a high dynamic range.
This paper proposes an RF amplifier that enables a frequency-independent suppression of a 0 to +11 dBm blocker by >35 dB while consuming 7–35 mW. Thanks to this suppression, the dynamic-range requirements for the subsequent stages in the receiver are relaxed. The suppression is achieved by an adaptive nonlinear circuit: the nonlinear transfer function creates the ability to provide different gains for signals having different amplitude levels [4]. By continuously adapting the circuit’s nonlinear function according to the blocker amplitude, the gain of the blocker is effectively minimized while the gain of the signal remains high. Since the method requires knowledge of the amplitude of the interferer, it is most suitable for tackling the interference due to RX/TX or FDD coupling.
2 Principle of Operation
Nonlinear transfer functions exhibit properties that are fundamentally different from linear transfer functions, and thereby they enable different solutions in coexistence scenarios. This is illustrated in Fig. 14.1, where the input and output signals in both frequency and time domain for various conditions are compared. When passing a strong sinusoidal signal through a conventional compressive nonlinear system, the signal gets distorted and as a result harmonics are created (Fig. 14.1b). Here only odd order harmonics result because of the point-symmetric shape of the transfer function, a situation encountered in differential circuits. Considering the special case of the third order polynomial input/output relationship as shown in Fig. 14.1c, it appears that there even exist specific situations for which only a third order harmonic is generated, and the fundamental component is completely removed. The calculations describing this effect are stated below:
By choosing the third order coefficient c 3 equal to:
the output y(t) becomes:
Moreover, because nonlinear transfer functions do not obey the principle of superposition, a (much weaker) signal accompanying the strong signal undergoes a different operation. Excitation of the same nonlinear transfer function by the sum of the strong sinusoid with a weak sinusoid is shown in Fig. 14.1d. In contrast to the fundamental of the strong signal, the fundamental of the weak signal is not removed, but is still on its original location in the spectrum.
Next to the effect on the fundamental components of both large and small signals, the nonlinear operation also generates harmonics and intermodulation (IM) products. The harmonics can be removed easily by filtering at RF and because f LS and f SS are different, their IM products can be removed after down-conversion by filtering in the baseband. Of interest are the large- and small-signal gains, which in the rest of this paper are defined as the ratio between their fundamental output and fundamental input.
2.1 Strong-Signal Suppression Using a Zigzag Transfer Function
Achieving the functionality discussed in the previous section can be achieved with a wide variety of nonlinear transfer functions. Next to the example of the third order polynomial, the nonlinear transfer function shown in Fig. 14.2a (zigzag function) also achieves strong-signal suppression. The general requirements on the nonlinear transfer functions are discussed in more detail in [5]. Generally, it can be stated that the transfer must possess at least three zero-transitions, a property that is indeed seen in both the third order polynomial as well as the zigzag transfer. The zigzag transfer can be realized by combining the outputs of a linear amplifier and a clipping amplifier, and is therefore more suited considering the practicality of the concept. To demonstrate the concept using the zigzag transfer, the input spectrum consists of a strong and a weak tone (Fig. 14.2c). This leads to an output spectrum consisting of several harmonics, but the fundamental of the strong signal is eliminated (Fig. 14.2d). To achieve this, the clipper amplitude A clip must be set to:
where A LS is the amplitude of the strong signal (i.e. interferer) at the input and G lin is the gain of the linear amplifier. As becomes clear from Eq. 14.1, A clip must be adjusted according to A LS to assure zero strong-signal gain. So, successful application of this principle requires the circuitry to adapt its transfer function to the instantaneous strong-signal amplitude level (Fig. 14.2a). Furthermore, the gain of the weak signal is equal to G lin /2 [5]. So, by assuring at least 6 dB of gain in the linear amplifier, the weak signal is amplified whereas the blocker is eliminated.
2.2 Application to Multi-radio Transceivers
In case two standards A and B are simultaneously active in a multi-radio transceiver, a situation is encountered where the receiver of standard A (victim) is plagued by the strong transmitted signal of standard B (aggressor). The blocking signal injected into the victim receiver is known, because the signal of the aggressor is generated in the same device. Therefore, it is possible to determine the amplitude level of the aggressor as it appears at the NIS input. This knowledge is required for proper operation, as clarified in the previous sections. In Fig. 14.3b a sub-block “Magnitude” is analyzing the baseband signal the aggressor is transmitting, resulting in the determination of the actual strong-signal amplitude A LS . A sub-block “NIS control” on its turn steers the nonlinear interference suppressor (NIS) with a control current I env using feed-forward, creating the desired blocker suppression.
Next to the feed-forward path, a mixer is present that multiplies the input with the output of the NIS. This operation results in the cross-correlation between these signals. The minimization of the cross-correlation means maximization of the suppression of the aggressor’s signal (assuming the aggressor’s signal to be dominant). The output of the mixer is being fed back into the “NIS control”, and thereby it provides a measure for the residual error in the control current I env . Errors in I env could be caused by e.g. changes of the coupling between the aggressor and the victim. This procedure is described in more detail in [6], and will in future be extended to cases with varying envelopes. The remainder of this document will concentrate on the implementation and performance of the analog hardware that is mandatory for the NIS concept, namely the NIS circuit with the mixer followed by the low-pass filter.
3 Circuit Implementation in CMOS
Figure 14.4 shows the NIS circuit diagram. Firstly, transistors M1–M4 make up a linear amplifier resulting in a linear input–output relationship. Secondly, M5–M8 make up a clipper circuit with adjustable output clipping amplitude. The desired zigzag transfer function is realized by combining the outputs of these two sub-circuits with the required polarity.
V bias,CG is chosen such that M1–M4 are just conducting, resulting in a class-AB bias. In case of a large signal being present at the input, either M1 and M4, or M2 and M3 conduct causing the input resistance to be fairly constant around 60 Ω. For small and large (rail-to-rail) input signals the input return is therefore approximately −12 dB. Because the output current of the transconductor is about half the input current, the transconductance is therefore quite linear.
Next, current I clip is steered through either the left or right LC tank because transistors M5 and M6 act as switches (clipper circuit). These transistors are configured in common-source, causing the M5–M6 structure to behave with opposite polarity with respect to the M1–M4 structure, which is configured in common-gate. By combining the output currents of both parts, the desired zigzag transfer function is created.
External control over I clip is provided through current mirror M7–M8. By adjusting I env , the adaptivity of the transfer shape is thereby provided. As Fig. 14.2 shows, the NIS concept generates several higher order harmonics. To suppress these harmonics, the circuit is loaded with an LC tank. The LC tank assures high impedance around the fundamental frequency, while it shorts the higher harmonics. In case I clip is set in accordance to Eq. 14.1, the strong-signal is suppressed, and the circuit behaves in NIS mode. If there is no need for strong signal suppression, I clip must set to zero. In that case the clipper circuit is not activated, resulting in a classical amplifier response (only M1–M4 are active).
A prototype IC, including ESD protection is implemented in 0.14um CMOS [7]. The system on the chip includes the NIS circuit and the passive mixer with a single pole low-pass filter shown in Fig. 14.5. For measurement purposes, both the RF and LPF outputs are followed by buffer circuits. The chip photo of the prototype is shown in Fig. 14.6a. The chip has been packaged in a HVQFN24 package and mounted on an FR4 PCB shown in Fig. 14.6b. Lastly, the PCB has been placed into an aluminum box making up a Faraday cage to guarantee full control over the signals applied to the system.
4 Experimental Results
The measured circuit transfer is maximal at 1.85GHz with a 3 dB bandwidth of 210 MHz. In both amplifier and NIS mode S11 is below −12 dB and S22 is below −13 dB. In this section first the characteristics in NIS mode, and then in amplifier mode are discussed.
4.1 NIS Mode
First, to demonstrate the NIS operation, a measurement is conducted by exciting the chip by the combination of a strong signal (0 dBm) and weak signal (−59 dBm). Both signals are phase modulated, and the spacing of the carrier frequency is limited to only 2 MHz. Because of the phase modulation, the envelope of the blocker is constant causing the spectral content of I env to consist of only a DC signal. I env is optimized such that the blocker gain is minimized. The input signal and output signal of this measurement after optimizing I env are shown in Fig. 14.7.
As can be seen, the ratio between the blocker and the signal has been reduced by almost 50 dB. Next to the suppression of the blocker, also an additional tone has been created. This additional tone is an intermodulation product between the desired signal and the blocker. In general, it can be stated that the output of a memory-less nonlinear function around the fundamental when excited with a strong and a weak sinusoidal signal is equal to [8]:
The signals in the above equations are given by:
Here, G LS is the gain of the strong signal, ω SS = 2πf SS and ω LS = 2πf LS . From Eq. 14.2 it can be concluded that in case of strong-signals suppression (i.e. G LS = 0), the magnitude of the content at ω SS and (2ω LS – ω SS ) in y(t) are equal. This conclusion is in agreement with the measurement results shown in Fig. 14.7 (although the power spectral density of the mirrored component is less than that of the signal, their powers are equal).
Next, the large-signal S-parameters are measured of the NIS chip for different values of I env . The results of this measurement are shown in Fig. 14.8. The transfer-controlling current I env has been varied from 0.4 mA to 3.8 mA in steps of 0.2 mA, and the circuit is excited by a single tone at 1.85GHz, whose amplitude has been swept from −22 up to 9.5 dBm. As a reference, the response in case of I env = 0 has been added as well, which is identified as amplifier mode. S21 in amplifier mode shows a P1dB of about −4 dBm as can be seen. Beyond that, the NIS operation becomes feasible. As can be concluded from the figure, S11, S22 and S12 show a small variation compared to the variation observed in S21, and provide sufficient performance (i.e. input and output reflection below −12 dB and reverse isolation below −40 dB). The response of S21 illustrates the amplitude domain filtering property that is aimed for in the NIS concept. By choosing a specific value for I env , the zigzag transfer is configured such that a specific amplitude level is suppressed, according to Eq. 14.1.
Measuring both the gain for the strong blocker and the gain for the weak signal is conducted using the approach illustrated in Fig. 14.9. The input is excited by the sum of a weak signal and a strong signal. Then, the output is analyzed and I env is chosen such that the strong signal is minimized. This procedure has been automated by closing the loop shown in Fig. 14.3b using an FPGA based PXI of National Instruments with AD/DA interface.
The measurement results from this procedure are shown in Fig. 14.10, for different values of V bias,CG in Fig. 14.4. Figure 14.10a shows the voltage gain of the strong signal, and Fig. 14.10b shows the voltage gain of the weak signal. The ratio between these two gains is identified as the strong signal suppression, which is shown in Fig. 14.10c. Although theory predicts that no cross-modulation takes place between the strong blocker and the weak signal in case of an ideal clipper/amplifier combination [5], it is seen in Fig. 14.10b that this is not fully achieved. This discrepancy is caused by the non-ideal behavior of mainly the clipper, i.e. the gain of the clipper during zero-transitions is dependent on the value of I env , which on its turn depends on the amplitude of the strong signal. By lowering V bias,CG , the dynamic range over which Av SS varies, reduces.
Another observation that can be done is that although Av LS is low, it never reaches zero. The cause of the limitation on the amount of suppression lies in the presence of memory effects. Memory effects in the circuit cause a phase mismatch between the linear amplifier and the clipper, causing imperfect cancellation. The ideal phase difference between the two sub-circuits of 180° is therefore not perfectly achieved. The choice of V bias,CG is identified here as a trade-off between on the one hand weak signal gain (magnitude and flatness) and dynamic range, versus on the other hand the amount of suppression the circuit achieves. The power consumption and the noise figure of the NIS circuit versus the input level of the suppressed RF signal (i.e., blocker) are shown in respectively Fig. 14.11a, b.
The power consumption decreases with decreasing RF input power because of the class AB operation of the circuit, governing the absolute value of the power consumption to be low as well. The measured noise figure is just above 16 dB. As can be seen in the circuit diagram of Fig. 14.4, the input is connected to MOS diodes that do not contribute to the gain of the circuit, but do dissipate the RF signal, which is not beneficial for the noise performance. Besides this effect, another aspect that complicates low noise design is the combination of an input–output path made up of M1–M2 configured in common gate and an input–output path made up of M5–M6 configured in common source. Both paths have different optimal source impedances regarding noise performance, so a trade-off occurs. Lastly, because of the spectrum mirroring effect discussed in the beginning of this section and derived using (2), the noise of (2ω LS –ω SS ) folds into the frequency band of the desired signal, causing a minimal noise figure inherent to the NIS concept of 3 dB.
Next, the behavior of the mixer that is present on the IC is evaluated. To illustrate the behavior of the mixer, a measurement is performed by measuring its differential output voltage while increasing I env , and maintaining the same input signal. The RF input of the NIS circuit is excited with a sinusoidal tone of 8 dBm during this measurement. The results are shown in Fig. 14.12, with the voltage gain of the weak and strong signal in Fig. 14.12a and the mixer output in Fig. 14.12b. As can be seen, the mixer outputs become equal in case the strong signal is minimized, indicating proper operation.
4.2 Amplifier Mode
By setting current I clip to zero (shorting V env to ground), the chip is set to amplifier mode. Characterization of the IC was done here by measuring the gain, noise figure and IIP3. In Fig. 14.13a the simulated as well as the measured voltage gain can be seen versus V bias,CG . As the figure shows, the measured performance is worse than the simulated performance. This reduced performance is mainly explained by a lower than expected transconductance of the transistors, and a lower quality factor of the LC tank. The noise performance is shown in Fig. 14.13b. Also with respect to noise performance a reduction is seen from simulation to measurement. The IIP3 of the chip was measured to be 6.6 dBm for a V bias,CG of 1.15 V.
5 Summary and Conclusions
A 1.8 GHz RF amplifier implemented in 0.14 um CMOS with frequency-independent blocker suppression has been presented. The blocker suppression functionality is obtained by continuously adapting the nonlinear transfer function of the circuit according to the blocker amplitude. Application areas are coexistence scenarios where the envelope of the blocker to be suppressed is known, for example in multi-radio devices and standards dealing with TX leakage in FDD systems.
The circuit has two modes of operation: the NIS mode, when it provides blocker suppression, and the amplifier mode, when no blocker is present at the input. In NIS mode, a voltage gain for weak signals of respectively 7.6–9.4 dB and IIP3 >4dBm were measured in the presence of a 0 to +11 dBm RF blocker, while the blocker has been suppressed by more than 35 dB. Analysis predicted, and measurements confirmed that in case of blocker suppression using the proposed NIS method signals and noise are mirrored to the image frequency with respect to the blocker. A passive mixer has been put on the chip to derive the cross-correlation between input and output with the aim of determining the amount of blocker suppression achieved. The mixer has been used in a feedback loop, and showed the expected behavior. The noise figure in NIS mode has been measured to be just above 16 dB. The reason for this relatively high value is partly due to the specific circuit topology, and partly is inherent to the NIS concept. Future research will concentrate on optimizing the circuit topology and finding measures to counteract the spectrum mirroring taking place when using the concept.
The circuit is set to amplifier mode in case there is no blocker present at the input. In amplifier mode, the circuit provides 17 dB of voltage gain and an IIP3 of 6.6 dBm while consuming 3 mW. The performance in measurements has dropped with respect to the simulations because of a reduction in transistor transconductance and quality factor of the LC tank. The 1 dB compression point of the circuit is found to be about −4dBm, which is around the same value where the NIS concept becomes feasible. So, for interferers of up to −4dBm the circuit can be operated in amplifier mode, whereas for higher interferer levels, the NIS mode should be used.
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Janssen, E., Habibi, H., Milosevic, D., Baltus, P., van Roermund, A. (2014). Smart Self-interference Suppression by Exploiting a Nonlinearity. In: Baschirotto, A., Makinwa, K., Harpe, P. (eds) Frequency References, Power Management for SoC, and Smart Wireless Interfaces. Springer, Cham. https://doi.org/10.1007/978-3-319-01080-9_14
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