A Unitary Analysis of some Voltage and Current Mode Linear Circuits Lelia Fes¸tila^Marius Neag OriginalPaper Pages: 5 - 24
Modeling and Characterization of the 3rd Order Charge-Pump PLL: a Fully Event-driven Approach Christian D. HedayatAhmed HachemGe´rard Benbassat OriginalPaper Pages: 25 - 45
Using High Frequency Operational Amplifiers for Low Noise Design Sheree B. BakerChris Toumazou OriginalPaper Pages: 47 - 58
A Single Chip 160 Mbit/s Cable Communication Circuit Including a Gain Controlled Equalizer and a Data Regenerating PFLL Jarkko RoutamaKimmo KoliKari Halonen OriginalPaper Pages: 59 - 74
Design Strategies for Class A CMOS CCIIS G. PalmisanoG. PalumboS. Pennisi OriginalPaper Pages: 75 - 85
Modified Latin Hypercube Sampling Monte Carlo (MLHSMC) Estimation for Average Quality Index Mansour KeramatRichard Kielbasa OriginalPaper Pages: 87 - 98