1 Introduction

Poly-dimethylsiloane (PDMS) is a popular material in the research area known as Lab-on-a-Chip or micro-total analysis systems (TAS) due to its chemical resistance, low cost and rapid fabrication (McDonald et al. 2000; Kim et al. 2004; Go and Shoji 2004). A PDMS micro-device is fabricated via the following process: the pattern of the mold is defined by micromachining, PDMS is poured onto the mold and cured, and the pattern of the mold is replicated onto the PDMS device (Duffy et al. 1998). When PDMS is cured at a high temperature, a monomer of PDMS is cross-linked and the total volume is reduced. This shrinkage was not severe with previously reported unit devices based on PDMS whose dimensions were of the order of millimeters, as the shrinkage related to the total dimension, such as displacement of an elastic solid, was negligible at devices in this size range. However, the shrinkage is significant with larger, centimeter-ordered devices or for a wafer-level batch-process used in the mass production of such devices. Furthermore, a misalignment problem occurs when a shrunken PDMS device is assembled with other rigid devices, such as silicon or glass devices. The misalignment induced by the shrinkage of PDMS cannot be remedied with translation and the rotation of devices. The solution is a design offset of the mold considering the shrinkage ratio of PDMS devices in order to fit the dimensions of PDMS devices with rigid devices that they will face.

2 Basic concept

In this paper, the 2D shrinkage ratio of PDMS is investigated by experimental measurement, and the misalignment between a PDMS device and a facing rigid device induced by the shrinkage is reduced by applying the measured shrinkage ratio into photomask design of a wafer-level mold pattern as a design offset.

3 Measurement of shrinkage ratio of PDMS

Figure 1 shows a schematic view of the measurement method of the 2D shrinkage ratio of PDMS. The measuring device consists of 4 in. Si wafer containing a measuring pattern, in this case scale marks and an indicator, and a PDMS layer replicated from the Si wafer. The scale marks and indicators are arranged on the top, bottom, and left and right sides of the wafer where the distance from the central point, L, is 10, 20 and 30 mm, respectively, as shown in the figure. These patterns are replicated on the PDMS layer and assembled with original patterns on the Si wafer. The indicator patterns on PDMS indicate the scale-mark patterns on the Si wafer, and then show the shrinking distance of the PDMS layer, d i , for each location. The 2D shrinkage ratio for PDMS is obtained from these measured data and the following equation:

$$ {\text{Shrinkage\_ratio}}(\% ) = \frac{1} {L} \times d \times 100 = \frac{1} {L} \times \frac{1} {4}{\sum\limits_{i = 1}^4 {d_{i} \times 100} } $$
Fig. 1
figure 1

Schematic view of the measuring method of shrinkage ratio of PDMS

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d: average value of d i

4 Alignment between Si wafer and PDMS layer

In order to accurately measure the shrinkage ratio, the assembled patterns of the PDMS layer and the Si wafer have to be aligned at the central point as a reference mark. Furthermore, a precise alignment of the PDMS layer is also required for complex devices, including the assembling process of a PDMS layer on other devices. In this paper, the PDMS layer and the Si wafer are aligned by mechanical contact between a cross-shaped male and female key formed on the PDMS layer and the Si wafer, respectively.

5 Fabrication process

Figure 2 shows a fabrication process based on a conventional PDMS fabrication process (Duffy et al. 1998). In the first step, half etched patterns of silicon oxide on 4 in. silicon wafer as scale marks and the alignment key are defined by photolithography without the removal of the photoresist. In the next step, the lightly etched silicon oxide patterns of the scale marks are covered by photoresist manually, and a residual silicon oxide of the alignment key is removed by reactive ion etching (RIE) for bulk micromachining. The 4 in. silicon wafer as a PDMS master mold is completed by bulk micromachining for aligning female key using tetra-methylammonium hydroxide (TMAH) etching. In order to measure the shrinkage ratio of PDMS (Sylgard 184, Dow Corning Co.), it was cured on the fabricated 4 in. silicon wafer and the patterns were replicated. In particular, the male key on the PDMS layer was replicated from the female key on the Si wafer and they are going to be aligned to each other in a later process. After the cured PDMS layer was peeled off from the wafer, it was aligned and re-attached onto the wafer. During the alignment process, the male key on the PDMS layer and the female key on the Si wafer were spontaneously fitted with mirroring structures of themselves when methanol was applied between these layers. A PDMS curing condition is defined by the general recipe of a commercial product (Sylgard 184, Dow Corning Co.). Furthermore, the conditions of the temperature, the thickness of PDMS layer, the mixing ratio of curing agent and the diluting solution (200 fluid 5cst, Dow Corning Co.) were varied in the experiment. These conditions are labeled in Table 1.

Fig. 2
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Fabrication process and the alignment method between the PDMA layer and 4 in. Si wafer

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Table 1 PDMS curing conditions
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6 Experimental results

Figure 3 shows the result of the alignment between the PDMS layer, whose curing condition is C, and the 4 in. silicon wafer. The misalignment is <20 μm when the substrates are aligned spontaneously by the fitting of the align keys. When a manual alignment is lightly enhanced, the misalignment is <10 μm. The figure shows the scale mark for measuring d i (i = 1–4) of the PDMS layer compared to the Si wafer at L = 30 mm. Figure 4 shows the displacement d, average value of d i , for L and curing condition. d is proportional to L, similar to the displacement of an elastic solid by stress, and increases as the curing temperature increases. Table 2 shows the shrinkage ratio of PDMS for the curing conditions and the design offset of the photo mask considering the shrinkage. The shrinkage ratios of PDMS are 1.06, 1.52 and 1.94% for curing temperatures of 65, 80 and 100°C, respectively. Other measured values are mentioned in Table 2. In order to diminish the misalignment induced by shrinkage, the dimension of the mold for PDMS should be magnified by the proper ratio compensating for the shrinkage as a design offset. The design offset applying the photomask for the photolithography fabrication of the mold are 1.07, 1.54 and 1.98% for curing temperatures of 65, 80 and 100°C, respectively. Applying this design offset, a 3D PDMS structured microchannel was fabricated, whose width and length are 400 μm and 12 mm, respectively, as shown in Fig. 5 (Lee et al. 2006). The misalignment of the microchannel decreased from 200 to 10 μm for a curing temperature of 80°C. The misalignment induced by the shrinkage of PDMS is less than in the measured misalignment, as this misalignment does not include error from the shrinkage but also translation.

Fig. 3
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Results of alignment between 4 in. silicon wafer and PDMS layer

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Fig. 4
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Displacement induced by PDMS shrinkage following positions and curing conditions

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Table 2 Shrinkage ratio for various curing conditions
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Fig. 5
figure 5

Microchannel based on PDMS 3D structure whose mask design is considered PDMS shrinkage ratio

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7 Conclusion

In this paper, we demonstrate the alignment method between a PDMS layer and a Si wafer using a mechanical contact of their cross shaped female and male key. After an alignment, 2D shrinkage ratios of PDMS for various curing conditions are obtained by a measuring displacement between indicator of the PDMS layer and the Si wafer. The tendency of measured shrinkage ratio shows that the value is affected by thermal expansion. Consequently, the shrinkage ratio increases linearly for increasing curing temperature. In addition, the value increases linearly following the mixing ratio of the dilutant. However, the tendency of the value for various mixing ratios of curing agents is hard to anticipate. For a general recipe, the design offset applying photo mask for photolithography process are 1.07, 1.54, and 1.98% for curing temperature 65, 80, and 100°C, respectively. Applying this design offset, we found that the misalignment induced by shrinkage could be diminished.