Abstract
So far, various methods have been proposed to extract the Schottky diode parameters from measured current–voltage characteristics. In this work, Schottky barrier diode with structure of Au/2(3),9(10),16(17),23(24)-tetra(4-(4-methoxyphenyl)-8-methylcoumarin-7 oxy) phthalocyaninatoiron(II) (FePc)/p-Si was fabricated and current–voltage measurements were carried out on it. In addition, current–voltage measurements were also performed on Au/p-Si structure, without FePc, to clarify the influence of the presence of an interface layer on the device performance. The measured current–voltage characteristics indicate that the interface properties of a Schottky barrier diode can be controlled by the presence of an organic interface layer. It is found that the room temperature barrier height of Au/FePc/p-Si structure is larger than that of the Au/p-Si structure. The obtained forward bias current–voltage characteristics of the Au/FePc/p-Si device was analysed by five different analytical methods. It is found that the extracted values of SBD parameters strongly depends on the method used.
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1 Introduction
In the past years, there has been great interest in the development of molecular material-based Schottky barrier diodes (SBDs) because of the importance of SBDs as basis of a large number of devices [1,2,3,4]. Metal phthalocyanines (MPcs) have been proposed and used in a variety of fields, including photovoltaic cells, chemical sensing, non-linear optics, and electrochromic devices [5,6,7,8,9,10,11]. Modification of junction between a metal and semiconductor often requires to achieve desired barrier height and ideality factor. It was shown in the literature that modification of the interface properties of an SBD can be achieved by introducing various organic [12, 13] and inorganic materials [14]. More recently, it has been shown that the use of organic layer in SBDs allows to control the interface properties and the main SBD parameters such as barrier height and ideality factor [15, 16]. These works have opened a new possibility to fabricate molecular electronic-based SBDs. Among molecular materials, supramolecular compounds, such as phthalocyanines, suffer some advantages over conventional organic materials due to their structural flexibility, improved spectroscopic characteristics, and high thermal and chemical stability. In this regards, much interest has been focused on the Si-based SBDs using organic interlayers to reduce the interaction between the metal and semiconductor [17]. To date, various methods have reported in the literature to determine the SBD parameters. Most of these methods are based on the current–voltage (I–V) characteristics and require the presence of the linear region on the ln (I) vs. V plot and use some auxiliary function [18,19,20,21,22].
According to Schottky–Mott theory, for an ideal SBD, the barrier height depends only on the work function difference between the metal electrodes and electron affinity of the semiconductors. On the other hand, it is well documented in the literature that the observed SBD parameters show strong dependence on the sample treatment and analysis method used to extract the SBD parameters [23]. Hence, it would be of great interest to know which method is appropriate for the determination of SBD parameters. In this work, we aimed to compare the suitability of the I–V characteristic-based methods used to determine the parameters of SBD with organic interlayer. So far, various methods have been proposed and used to extract the SBD parameters [24,25,26,27,28], but to the authors’ knowledge, there are no reports on the comparison of the parameters obtained from these different techniques for a Schottky diode with an organic interlayer. In this study, the basic of the methods used is described shortly first, and then, the methods are examined and compared on experimentally obtained I–V data.
2 Experimental
The Schottky barrier diodes were prepared using (100)-oriented p-type silicon wafers with resistivity in the 10–15 Ω cm range. The Si wafers were cleaned using standard RCA cleaning procedure (i.e., a 10 min boil in NH4 + H2O2 + 6H2O followed by a 10 min boil in HCl + H2O2 + 6H2O). After RCA cleaning, ohmic back contact to Si substrate was made by thermally evaporating of high purity aluminium metal at pressure of 2 × 10−5 mbar, followed by heat treatment at 560 °C for 4 min in N2 atmosphere. Before forming FePc layer on the Si substrate, the native oxide on the polished surface of the wafers was removed in HF/H2O (1:10) solution and was rinsed in de-ionized water for 20 s and finally dried with N2 gas. Spin-coated thin film of 2(3),9(10),16(17),23(24)-tetra(4-(4-methoxyphenyl)-8-methylcoumarin-7 oxy) phthalocyaninatoiron(II) (FePc) was used as organic interlayer. The molecular structure of the FePc is shown in Fig. 1. The synthesis detail of FePc can be found in [29]. MALDI-TOF mass spectroscopy analysis was performed to confirm the formation of the proposed structure. For this purpose, matrix-assisted laser desorption/ionization time of flight (MALDI-TOF) mass spectra were measured using a Bruker Autoflex III mass spectrometer equipped with a nitrogen UV-laser operating at 337 nm. α-cyano-4-hydroxy-cinnamic acid (CHCA) was chosen as the best MALDI matrices. An intense molecular ion peak observed at 1689.63 Da for the compound matched perfectly by the theoretical peaks of the complex determined by isotropic software calculation. Thus, MALDI-TOF mass spectroscopy analyses confirmed the structure of FePc compound (Fig. 2). For the spin coating, spreading solutions were prepared by dissolving the FePc in extra pure grade dichloromethane at concentrations of 5 × 10−3 M. A mixture of 15 µL of this solution was added with a glass pipette onto the p-Si substrate held on a spinner. The substrate was spun at 2000 rpm for 90 s, and then, the film was dried at 80 °C under vacuum for 2 h to ensure removal of the residual solvent in the film. The thickness of the FePc layer was determined by elipsometric technique and it was found to be 30 nm. After the spin coating of 4 × 10−3 M dichloromethane solution of FePc onto Si wafer, circular dots of 1 mm in diameter and 1200 Å thick Au contacts were formed on FePc layer through a metal shadow mask in high vacuum system. The current–voltage (I–V) characteristic measurements were carried out on the Au/FePc/p-Si structure at various temperatures between 300 and 480 K. I–V measurements were performed in a temperature-controlled vacuum chamber using an electrometer (Keithley Model 617).
3 Results and discussion
To clarify the effects of the insertion of FePc layer between the Si substrate and Au electrode on the I–V characteristics, a comparison of the I–V behavior between Au/p-Si and Au/FePc/p-Si structure is made. Figure 2 shows typical forward and reverse I–V characteristics of the devices at room temperature. As is clear from Fig. 2, both devices exhibit rectification behavior with different rectification ratios. The results prove the good rectification performance for the Au/FePc/p-Si structure. The rectification ratio has been estimated to be 3 and 970 at bias potential of ± 1 V for Au/p-Si and Au/FePc/p-Si structure, respectively. It was observed from the temperature-dependent measurements that the rectification ratio decreases as the temperature increases.
The determination of fundamental parameters of the SBD, which are ideality factor, barrier height, and series resistance, is extremely important for design of SBD-based devices. The main objective of this work is to compare the methods used for determination of main SBD parameters in Au/FePc/p-Si structure. For this purpose, the voltage dependence of the forward bias current was measured at various temperatures and analysed using five different models. Figure 3 shows the measured I–V characteristics at different temperatures between 300 and 480 K.
As is clear from Fig. 3 that the experimentally obtained I–V curves do not exhibit linear behavior for temperatures investigated. Deviation from linearity, especially for the high values of applied voltage, is clear. In forward bias I–V curves, the curvatures in the downward suggest the presence of bulk series resistance. For a Schottky diode with an organic interlayer, the forward bias dependence of the current can be expressed as [30]
where Is is known as reverse saturation current, q is the electronic charge, V is the applied voltage, k is the Boltzmann constant, Rs is the series resistance, n is the ideality factor, φB is zero bias Schottky barrier height, T is the temperature in Kelvin, A is the diode area, and A* is the effective Richardson constant. The ideality factor, n, and barrier height, φB, for the Au/p-Si and Au/FePc/p-Si SBD were derived from slope and intercept of the linear portion of Fig. 3 using Eqs. (1) and (2) at each temperature and given in Table 1. The results showed that the room temperature barrier height value of 0.85 eV for the Au/FePc/p-Si device is remarkably higher than that of Au/p-Si structure, whose barrier height was found to be 0.52 eV. A possible explanation for the observed high barrier height in Au/FePc/p-Si structure can be given as follows: the insertion of FePc organic layer forms a physical barrier between the gold electrode and the p-Si. The presence of organic layer can cause shift in the work function of the metal and in the electron affinity of the Si, and in turn, the organic layer gives an excess barrier. The previous studies of the Schottky barrier diodes with an organic interlayer have verified that the organic materials have a great potential for the modification of the inorganic semiconductor–metal interfaces, which is consistent with our finding. The previous studies showed that the organic interfacial layer formed at metal/inorganic semiconductor has a rectification behavior in which the values of Schottky barrier height and ideality factor are greater than those of the conventional metal/semiconductor structures [1, 20, 31, 32].
As can be seen from Table 1, the values of ideality factor and barrier height obtained from the forward I–V characteristics range from 3.9 to 0.85 eV (at 300 K) to 1.6 and 1.26 eV (at 480 K), respectively. It means that the value of the ideality factor obtained is always greater than unity. Values of the ideality factor different from unity are related to image forces acting on the barrier height and interface states or traps, localized in the insulator. At relatively bias levels, the main reason for the deviation from an ideal characteristics is the fact that various carrier transport mechanisms such as tunneling through a barrier and generation–recombination current in the depletion region occur simultaneously with thermionic emission, thereby changing ideality factor [1, 20]. It is also clear that the barrier height increases, while the ideality factor of the device decreases with increasing temperature. This is indicating that the current transport deviates from the ideal thermionic model. The same types of temperature dependence of the ideality factor and barrier height obtained from forward I–V characteristics were reported in the literature [33]. It can be concluded that the presence of lateral inhomogeneous barrier height distributions and interfacial Pc layer leads to high ideality factor [1]. A high values of n can also be attributed to the presence of the interfacial FePc layer, a wide distribution Schottky barrier height (or barrier inhomogeneities), series resistance, and, therefore, to the bias voltage dependence of Schottky barrier height [34]. As the temperature increases, the increase in barrier height can be attributed to the inhomogeneous barrier heights at the interface between metal and semiconductor [35, 36].
In Schottky barrier diodes, the series resistance is one of the most important parameters governing the electrical properties of diodes. As shown in Table 1, the values of the series resistance, Rs, decrease with increasing temperature. The same type of temperature dependence of series resistance was observed for Au/perylene-diimide/p-Si Schottky device [37] and Al/SiO2/p-Si [38] structure. The decrease in series resistance can be attributed to the decrease of ideality factor with increase of temperature and also to the rising of free carrier concentration at higher temperatures. It should be mentioned here that thermal restructuring and reordering of interface is another possible reason for the observed decrease in series resistance [39].
3.1 Norde method
This method is based on a modified forward I–V plots even in the presence of a high series resistance [24]. Norde has been derived the following auxiliary function:
where α is an arbitrary constant greater than n. From the minimum of F vs. V and F vs. I plots, the values of barrier height and series resistance can be obtained:
where V0 and I0 are voltage and current at which F vs. V and F vs. I plots have minimum, respectively.
Figure 4a, b shows the F vs. V and F vs. I plots at various temperatures, respectively. From the minimum of Fig. 4a, b, with the aid of Eqs. (4) and (5), the values of the barrier height and series resistance were obtained and collected in Table 1.
It is found that the barrier height obtained from Norde method ranged from 0.84 to 1.27 eV, which is comparable with the barrier height values obtained from conventional forward I–V characteristics. As expected, the values of the barrier height increase with increasing temperature. From the calculated values of the series resistance, it was observed that at low temperatures, Rs values were the highest. It decreased with temperature.
3.2 Bohlin method
In this model, which is suggested by Bohlin [40], two different Norde’s functions [F1(V) and F2(V)] are used to determine the values of n, φB, and Rs. As stated above, the fundamental functions F1(V) and F2(V) of this model are defined as
The SBD parameters are obtained from Eqs. (6) and (7) as
where [F1(V01), V01] and [F2(V02), V02] are the coordinates of minimum points in the plots F1(V) vs. V and F2(V) vs. V, respectively; I01 and I02 are the current values at the voltage V01 and V02, respectively. The SBD parameters for Au/FePc/p-Si structure were calculated with the aid of equations given above and collected in Table 1. A close investigation of Table 1 indicates that the ideality factor of the device takes values between 5.1 and 2.1, which is quite different from the values obtained using the conventional forward I–V characteristics. Although the variation of the barrier height and series resistance with temperature obtained from Norde and Bohlin method has the same trends (for both methods, the barrier height increases, but series resistance decreases with increase in temperature), it can be said that the values of barrier height and series resistance obtained from both methods are slightly different from each other.
3.3 Mikhelashvili method
Another technique for the determination of SBD parameters is Mikhelashvili method [41]. Mikhelashvili’s method is based on the following function:
According to Mikhelashvili, the plot of θ(V) vs. V should have a maxima at a certain value of applied voltage V. From the maxima of θ(V) vs. V plots, the SBD parameters can be obtained using the equations:
where θm and Vm are the coordinates of maximum point in θ(V) vs. V plot, and Im is the current value at the voltage of Vm. Figure 5 depicts the θ(V) vs. V plots for Au/FePc/p-Si structure at selected temperatures. It is clear that, as suggested by Mikhelashvili, θ(V) vs. V plots have maxima at various values of V depending on temperature.
The main SBD parameters for our device were calculated from Fig. 5 using Eqs. (12–14) and obtained data are given in Table 1 to facilitate the comparison of the results obtained. From the comparison of the data presented in Table 1, it will be clear that the Mikhelashvili method gives smaller ideality factor values, especially at low temperatures. It was also found low Rs values with this method.
3.4 Cheung method
Cheung and Cheung [28] showed that the SBD parameters can be obtained using the the following equations:
The Cheung method was applied by a linear plot of H(I) against I and dV/d(ln I) vs. I. As a representative result, H(I) vs. I and dV/d (ln I) vs. I plot is shown in Fig. 6. As is clear from Fig. 6, a plot of H(I) vs. I and dV/d(ln I) vs. I plots show a straight line with intercept at y-axis equal to nϕB. The values of n, ϕB, and Rs were calculated from these plots. The calculated values of these parameters are presented in Table 1. It was observed that the ideality factor takes the values of 4.2, 3.8, 3.3, 2.4, 2.0, 2.3, and 1.9, barrier height of 0.86, 0.88, 0.93, 0.98, 1.07, 1.18, 1.32, and 1.38, and RS of 204.0, 188.3, 162.0, 136.7, 98.6, 63.7, 44.8, and 27.7 for 300, 325, 350, 375, 400, 425, 450, and 480 K, respectively (Fig. 7).
4 Conclusion
Schottky barrier diode on p-Si substrate with an FePc interlayer was fabricated and characterized by means of forward bias I–V measurements. Deviation from linearity in the forward bias I–V curves, especially for sufficiently large applied voltages, was observed and attributed to the presence of lateral inhomogeneous barrier height distributions and series resistance. Five different methods, conventional forward bias I–V method, Norde, Bohlin, Mikhelashvili, and Cheung methods, were applied to experimental I–V data to extract the main SBD parameters and compared the limitations of these methods. It was observed that the values of the SBD parameters are strongly depend on the method used. The results obtained here indicated that the standard method is especially limited by the value of the series resistance. On the other hand, although the method proposed by Norde leads to some improvements, its accuracy is dependent on α value selected. However, it is to be noted that the Cheung method exhibits some advantages. It appears to be the simplest to use and is the most sensitive method to evidence the contribution of a generation–recombination current.
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Oruç, Ç., Altındal, A. Comparative study of I–V methods to extract Au/FePc/p-Si Schottky barrier diode parameters. Appl. Phys. A 124, 81 (2018). https://doi.org/10.1007/s00339-017-1461-9
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DOI: https://doi.org/10.1007/s00339-017-1461-9