1 Introduction

Reactive power management can be defined as the control of generator voltage, variable transformer tap settings, compensation, and switchable shunt capacitor and reactor banks in a manner that best achieves a reduction in system losses and/or voltage control [1].

Inductive reactive current is an additional load on cables and switching devices, and also increases the expenditure for energy to be paid to the Electrical Power Supply Utility, although the so-called reactive energy is, de facto, no real energy consumption. This inductive reactive current should be compensated by means of a power factor controller with the related capacitor units. The designed digital based system combines the functions of a power factor control relay with an electrical power measurement and control device. In addition to providing the standard requirements of a power factor control (p.f.c) relay, the designed system also measures and supervises the total electrical load on the system.

2 Power system configuration

The classical method of reactive power control, which is based upon the principle of switchable shunt capacitor banks, is shown in Fig. 1. The reactive power control relay which measures the required parameter values such as P, Q, V, I and so on, and generates switching sequence, automatically manages capacitor banks, and compensates for the reactive power absorbed by the load. The capacitors are turned on and off in a way to correct the power factor according to the set value on the relay.

Fig. 1
figure 1

Connection diagram of classical capacitor switching reactive power control system

In this paper a novel simple feedback circuit is proposed, which is shown as the shaded area for each capacitor bank and the main supply input terminal in Fig. 2.

Fig. 2
figure 2

Proposed capacitor switching reactive power control system

The reactive power control relay used in classical systems, as shown in Fig. 1, can not detect one of the most common connection faults of voltage (L1/L2/L3) which is caused by fuses or switching contacts of contactor for each capacitor bank and the main supply input, and can not warn the user. In those cases the reactive power absorbed by the load can’t be fully compensated and may exceed the determined reference value and cause an increase in the cost of energy.

While controlling, the proposed system continually checks the compensation sections and main supply input terminal. If a section drop-out or any connection faults of voltage lines (L1/L2/L3) for each capacitor bank occurs, then the section is temporarily disabled at the relevant setting and the user is warned by a predefined error indicator. The section temporarily disabled is periodically tested, while control is in progress, and possibly enabled again. If the main supply input fault is detected, it gives a different predefined error signal which indicates that the system must be served as soon as possible. In Sect. 5 some detail for the feedback circuits and simulation results are given. The following section provides the proposed digital measurement algorithm.

3 The measurement theory

The measurement block is the most important part of the reactive power control relay. The measurement functions cover all important data required in a system network. The measurement part of the mixed-signal microcontroller based reactive power control relay measures current and voltage on one phase only, so all the measurements are single phase. The measured power assumes a three phase balanced load from which the total power is calculated. For measuring active and reactive components of the electric power, current and voltage must be picked up and processed to the power value. If current and voltage are non-sinusoidal, as in most cases, then the most important problem of power measurement is the processing of signals. In this case, with commonly used algorithms for the fundamental active and reactive power, power factor and other required parameter values measurement accuracy is achieved by digital signal processing using a microprocessor and fast Fourier transformation (FFT) algorithm.

In this study, the Goertzel algorithm is used to measure the fundamental components of the active and reactive power instead of FFT, which is known as a classical method in signal processing. The biggest advantage of the Goertzel algorithm over the direct DFT is the reduction of the trigonometric evaluations. The Goertzel algorithm is useful in situations where only a few points in the spectrum are necessary, as opposed to the entire spectrum [2].

3.1 Power measurement of the γth harmonic by the Goertzel algorithm

If a power source voltage v ( t) and current i ( t) with fundamental frequency f 0 are distorted they can be generally given in closed form equations as folows:

$$v{\left( t \right)} = V_{0} + {\sum\limits_{\gamma = 1}^m {{\left[ {a_{\gamma } \cos {\left( {\gamma w_{0} t} \right)} + b_{\gamma } \sin {\left( {\gamma w_{0} t} \right)}} \right]}} }$$
(1)

and

$$i{\left( t \right)} = I_{0} + {\sum\limits_{\mu = 1}^n {{\left[ {a_{\mu } \cos {\left( {\mu w_{0} t} \right)} + b_{\mu } \sin {\left( {\mu w_{0} t} \right)}} \right]}} }$$
(2)

For digital power measurement the current and voltage waveforms are sampled at equally spaced discrete times t = kT ( k Z) and converted to digital values. Thus the sequences v ( k) and i ( k) are derived from the continuous time waveforms v ( t) and i ( t) as,

$$ v{\left( k \right)} = V_{0} + {\sum\limits_{\gamma = 1}^m {{\left[ {a_{\gamma } \cos {\left( {\gamma w_{0} kT} \right)} + b_{\gamma } \sin {\left( {\gamma w_{0} kT} \right)}} \right]}} } $$
(3)

and

$$i{\left( k \right)} = I_{0} + {\sum\limits_{\mu = 1}^n {{\left[ {\alpha _{\mu } \cos {\left( {\mu w_{0} kT} \right)} + \beta _{\mu } \sin {\left( {\mu w_{0} kT} \right)}} \right]}} }$$
(4)

In a non-sinusoidal periodic condition, the active and reactive power of the γ th harmonic can be obtained respectively by the following relations:

$$P_{{_{\gamma } }} = 0.5{\left( {a_{\gamma } \alpha _{\gamma } + b_{\gamma } \beta _{\gamma } } \right)}$$
(5)

and

$$Q_{\gamma } = 0.5{\left( {a_{\gamma } \beta _{\gamma } - \alpha _{\gamma } b_{\gamma } } \right)}$$
(6)

In Eqs. 5 and 6, for γ =1, the parameters a 1, b 1, β 1 and α 1 must be calculated to measure the fundamental component of the active and reactive power from the given equations v ( k) and i ( k), respectively, by using the Goertzel algorithm. For the measurement structure of the one-point DFT, a simple circuit is obtained by making use of the Goertzel algorithm. The essential parts are two digital infinite impulse response (IIR) filters depicted in Fig. 3.

Fig. 3
figure 3

Digital IIR filters with sine and cosine impulse response

The filter coefficients are:

$$C_{1} = \sin 2\pi {\left( {\frac{f}{{f_{s} }}} \right)}$$
(7)

and

$$C_{2} = \cos 2\pi {\left( {\frac{f}{{f_{s} }}} \right)}$$
(8)

The impulse response as cosine and sine sequences are:

$$h_{1} {\left( k \right)} = \cos 2\pi k{\left( {\frac{f}{{f_{s} }}} \right)}$$
(9)
$$h_{2} {\left( k \right)} = \sin 2\pi k{\left( {\frac{f}{{f_{s} }}} \right)}$$
(10)

with the frequency f and sampling frequency f s [3, 4]. As shown in Fig. 3, y 1 ( k) is the cosine impulse response and y 2 ( k) is the sine impulse response. If the filter shown in Fig. 3 with initial values w ( k −1)= w ( k −2)=0 and \(\frac{f}{{f_{s} }} = \frac{1}{M}\) is excited by a voltage sequence v ( k) according to Eq. 3 then filter outputs become,

$$y_{1} {\left( M \right)} = {\sum\limits_{k = 0}^{M - 1} {v{\left( k \right)}h_{1} {\left( {M - k} \right)} = \frac{M}{2}a_{\gamma } } }$$
(11)
$$y_{2} {\left( M \right)} = {\sum\limits_{k = 0}^{M - 1} {v{\left( k \right)}h_{2} {\left( {M - k} \right)} = \frac{M}{2}b_{\gamma } } }$$
(12)

Hence, at the discrete time M, except for the factor \( \frac{M} {2} \) the output values are equal to the real and imaginary parts of the spectral coefficient of the γ th harmonic. Of course, the same is valid for exciting the filter structure by a current sequence i ( k) according to Eq. 4.

3.2 The proposed measurement algorithm

Sampling is the first step in representing a continuous time signal in a discrete time, sampled data or digital signal. Sampling is achieved by instantaneously measuring a continuous waveform at regular discrete intervals called the sampling rate. The Nyquist criterion for sampling rate states that all the information in a signal can be extracted if it is sampled at a frequency f s greater than twice the highest input frequency [5]. Under this condition, the power source voltage v ( t) and load current i ( t) are alternately sampled for one period at the sampling frequency f s =12,800 Hz and are stored to implement the proposed algorithm sequentially. The proposed algorithm is described step by step as follows with

$$\begin{array}{*{20}l} {\begin{aligned} & N = \frac{{f_{0} }}{{f_{s} }} \\ & {\text{where}} \\ \end{aligned} \hfill} \\ {{\begin{array}{*{20}l} {{f_{0} = } \hfill} & {{{\text{fundamental}}\;{\text{frequency}}} \hfill} \\ {{f_{s} = } \hfill} & {{{\text{sampling}}\;{\text{frequency}}} \hfill} \\ {{N = } \hfill} & {{{\text{number}}\;{\text{of}}\;{\text{samples}}} \hfill} \\ \end{array} } \hfill} \\ \end{array} $$
(13)

First, the mean value of the sampled and digitized voltage and current are calculated as follows:

$$V_{{{\text{mean}}}} = \frac{1}{N}{\sum\limits_{k = 1}^N {v{\left( k \right)}} }$$
(14)
$$I_{{{\text{mean}}}} = \frac{1}{N}{\sum\limits_{k = 1}^N {i{\left( k \right)}} }$$
(15)

and then the mean values are subtracted from each sampled value

$$v{\left( k \right)} = v{\left( k \right)} - V_{{{\text{mean}}}} $$
(16)
$$i{\left( k \right)} = i{\left( k \right)} - I_{{{\text{mean}}}} \;\;\;{\text{for}}\;k = 1,2, \ldots ,N$$
(17)

Thus, any offset dc value, which may arise due to subtraction of analog signals at the differential inputs of adc before digitation, as shown in Fig. 16, is removed. Now, the obtained voltage and current sequences are ready for measurement algorithms. The root mean square (RMS) values of the voltage and current signals V rms , I rms are calculated in the following sense from the last obtained v ( k) and i ( k) samples:

$$V_{{rms}} = {\sqrt {\frac{1}{N}{\sum\limits_{k = 1}^N {v{\left( k \right)}^{2} } }} }$$
(18)
$$I_{{rms}} = {\sqrt {\frac{1}{N}{\sum\limits_{k = 1}^N {i{\left( k \right)}^{2} } }} }$$
(19)

In order to calculate the γth harmonic from Eqs. 3 and 4 of v ( k) and i ( k), respectively, reconsider the second-order Goertzel algorithm structure given in Fig. 3 which corresponds to the system of Eq. 20. If the input to this filter is a real-value sequence x ( k), namely v ( k) or i ( k), for 1≤ k N then the output value, W ( k), at time k = N is determined as

$$W{\left( k \right)} = x{\left( k \right)} - 2\cos {\left( {\frac{{2\pi \gamma }}{N}} \right)}W{\left( {k - 1} \right)} + W{\left( {k - 2} \right)}$$
(20)

The DFT of the γ th frequency component is calculated by starting with the initial condition W ( k −1)= W ( k −2)=0 and running through N iterations to obtain W ( N) [2]. After the N th iteration, the real y 1 ( N) and imaginary y 2 ( N) parts computed at k = N are as follows :

$$y_{1} {\left( N \right)} = W{\left( N \right)} - W{\left( {N - 1} \right)}\cos {\left( {wT} \right)}$$
(21)
$$y_{2} {\left( N \right)} = W{\left( {N - 1} \right)}\sin {\left( {wT} \right)}$$
(22)

where

$$y_{1} {\left( N \right)} = \frac{N}{2}a_{1} $$
(23)
$$y_{2} {\left( N \right)} = \frac{N}{2}b_{1} $$
(24)

for v ( k), and

$$y_{1} {\left( N \right)} = \frac{N}{2}\alpha _{1} $$
(25)
$$y_{2} {\left( N \right)} = \frac{N}{2}\beta _{1} $$
(26)

for i ( k). As a result, the γth active and reactive power values for one fundamental period in the so-called measurement window, as shown in Fig. 4, are calculated using Eqs. 23, 24, 25 and 26 as

$$P_{1} = 0.5{\left( {a_{1} \alpha _{1} + b_{1} \beta _{1} } \right)}$$
(27)

and

$$Q_{1} = 0.5{\left( {a_{1} \beta _{1} - \alpha _{1} b_{1} } \right)}$$
(28)
Fig. 4
figure 4

Measurement window for one calculation period

The measurement window is defined as the sum of the fundamental signal period (20 ms), the total calculation time of the required parameter values for the measurement, and the display time of the selected results to the user. All of the expressions in Eqs. 1428 are calculated in a Δt time interval as shown in Fig. 4 for one measurement window. The following section will describe briefly hardware design and real-time implementation of the given measurement algorithm.

4 Hardware description

This section describes the designed mixed-signal microcontroller based measurement system’s hardware and the purpose of each section in the overall design. The solution uses a current transformer for the measurement of the load current and a resistive ladder for the measurement of line voltage as shown in Fig. 5.

Fig. 5
figure 5

Simplified voltage/current sensing circuit

The front end of the mixed-signal microcontroller analog input channels are composed of the voltage and current input networks. Power line voltage signal v ( t) is sensed by the high voltage AC electronics. A resistive ladder (R1, R2, R3 and R4) is used as a voltage divider. A differential voltage develops on R2, R3 that has a 812:1 divide down ratio. The voltage signal across the resistive divider R2, R3 is amplified five times by a precision instrumentation amplifier U1. The U1 amplifier accepts a balanced input and has a minimum common mod rejection ratio (CMRR) of 93 dB [6]. The 1.2 V voltage applied to the Vref terminal of U1 is added to the output signal. So, the output U1 swings above and below a positive reference voltage of 1.2 V. An anti-aliasing filter is required on the analog inputs of an ADC to prevent signals above the Nyquist frequency (i.e. half the sampling rate). In our case the band of interest is approximately dc to 1 kHz. The output of U1 is connected to the input of the 5th order, low pass, elliptic switched-capacitor anti-aliasing filter U3, which provides sharp roll-off with good stopband rejection. U3 and U4 have a transition ratio, which is defined as the ratio of the stopband frequency to the corner frequency, of 1.6 and typically 53 dB stopband rejection. C2 and C4 capacitances are used for self-clocking for tighter cutoff-frequency control. These capacitances determine the internal oscillator frequency. Varying the rate of the internal oscillator adjusts the filter’s corner frequency by a 100:1 clock-to-corner frequency ratio. For example, an internal oscillator frequency of 100 kHz produces a nominal corner frequency of 1 kHz [7].

The secondary current of the current transformer is converted to a voltage through burden resistors R5, R6. This provides complementary analog inputs to U2. This signal is amplified by a precision instrumentation amplifier U2 of which gain is chosen as 18.8 V/V. The output of U2 is filtered by an anti-aliasing filter having the same characteristic as U1, before being applied to the input channel of the ADC. The output signal of the filters denoted as Vv and Vı are applied to the differential inputs IAN0-IAN1and IAN2-IAN3, respectively, of the on-chip 12-bit ADC. The proposed reactive power control relay is realized with an C8051F005 mixed-signal microcontroller with pipelined instruction architecture, 32 kbytes FLASH, 2304 byte data RAM, up to 25 MIPS throughput with 25 MHZ clock, 32 Port I/O and an on-chip 12-bit SAR ADC with an 8-channel input multiplexer and programmable gain amplifier. With a maximum throughput of 100 ksps, the ADC offers true 12-bit accuracy with an INL of ±1LSB. The simple block diagram of C8051f005 connected to the simplified voltage/current sensing circuit is shown in Fig. 16. For more details about the C8051f005 microcontroller refer to [8]. The analog digital converter of the microcontroller is able to measure unsigned voltages ranging from AGND up to the reference voltage. If signed measurements, as for reactive power control relay, are necessary then a virtual zero point must be provided. Voltages above this zero point are treated as positive, voltages below it are treated as negative voltages. The on-chip voltage reference circuit shown in Fig. 16 provides 1.2 V and is used for this purpose. All current and voltage inputs are referenced to the “virtual ground” output of this circuit. The analog inputs of AIN1 and AIN3 are subtracted from the measured values of AIN0 and AIN2, respectively, for every measured current and voltage sample which gives signed, offset corrected results.

5 Fault detecting feedback circuits

Fault detecting circuits of each line voltage (L1/L2/L3) which are shown as shaded areas in Fig. 2 generate signals indicating the three phase line voltage status. The status signal must be converted to a logic voltage level for the microcontroller to evaluate. For this purpose the designed opto-isolated circuit, which converts the detecting signal to the logic level signal, is given in Fig. 6.

Fig. 6
figure 6

The opto-isolated signal conditioning circuit for fault detection

This circuit detects one phase, two phase or three phase voltage(s) fault(s) of (L1/L2/L3) and produces signals related to the fault(s). The output of the opto-isolated sensing circuit waveform and their simulation results are given below in Fig. 7a and b. It is evident that when three phase faults occur both the “line” and the “out” voltages become zero.

Fig. 7
figure 7

Voltage waveforms of the line and out of Fig. 6 a One-phase fault, b Two-phase fault

The detected faults are evaluated by the microcontroller and, according to the fault(s), the relevant warnings are given to the user or the section is temporarily disabled at the relevant setting. The faults which may arise in a three phase power system are sensed by opto-isolated signal conditioning circuits as shown in Fig. 8, and their truth table is given in Table 1.

Fig. 8
figure 8

Fault/faults detecting circuits and evaluation

Table 1 Truth table of faults

While controlling, the microcontroller continually checks the output of the opto-isolated voltage sensing circuits connected to Port 3 (Fig. 8) and reads the status of capacitor sections line voltage and power supply input terminal voltage via Port3; then it will “and” it with the switching-sequence byte and make a decision according to truth Table 1. The shaded area in Fig. 8 is implemented by using only one “AND” command by the microcontroller.

The overall system hardware of the designed reactive power control relay comprises: some circuit blocks consisting of analog voltage and current path networks for active and reactive power measurement, digital voltage sensing circuits for faults, normally open position momentary pushbuttons used to control 2-line, 16-characters liquid crystal display (LCD) and set parameters, and six +24v relays for switching the capacitor banks (Fig. 16).

6 Experimental results

In this study, a real-time application for a single-phase power system of the developed mixed-signal microcontroller based reactive power control relay is implemented as shown in Fig. 9.

Fig. 9
figure 9

One-phase connection diagram for the real-time application

For an assumed symmetrical three-phase power system, a single phase experimentation would be sufficient. All switching reactive power control relays realize reactive power compensation assuming the three-phase power system to be symmetrical. Given in Figs. 6 and 7 are the designed circuit for sensing the possible phase voltage faults at the compensation input terminal and the connection point of capacitor banks and simulation results, respectively, of the experimental work; the power system circuitry is provided in Fig. 2. Since the work is done for a single-phase power system, faults are simulated by switches L 1,..., L 6 shown in Fig. 9. A variable reactive power consumer in the range of Q =20∼1000 Var is prepared with a series connection of an inductor ( L =0.15 H, R =5.6 ohm) and a rheostat (0–135 Ω). Single-phase capacitor power values are selected, without any format necessity, to compensate the reactive power drawn from this load (Fig. 9). Capacitor power values are automatically measured by the relay and each group value is recorded on the flash on-chip. The relay switches in the capacitor group meet the power needed by the load. Desired reference value % x is set using the pushbuttons on the designed relay. Capacitor group powers can be measured automatically as well as entered manually. Such parameters as capacitor switch-in and switch-out delays, and power-side connected current transformer turn-ratio are set with these pushbuttons. + Q ref and − Q ref switch-in and switch-out limits, given by Eqs. 29 and 30, respectively, are calculated using the % x and capacitor group-1 power value, as shown in Fig. 10.

Fig. 10
figure 10

Reference values for different set points (% x values)

$$Q_{{{\text{ref}}}} = {\left( {0.6 + \% x} \right)}q{\left( 1 \right)}$$
(29)
$$ - Q_{{{\text{ref}}}} = {\left( { - 0.6 + \% x} \right)}q{\left( 1 \right)}$$
(30)

When the drawn reactive power by the consumer Q L is inductive and Q L>+ Q ref then the off-circuit capacitor group satisfying ΔQ min= Q L q ( n), where n =1,...,6 is switched in by the designed reactive power control relay. When Q L is capacitive and Q L<− Q ref then the in-circuit capacitor group satisfying ΔQ min=∣ Q L∣− q ( n), where n =1,...,6 is switched out. If Q L falls in the dashed line area in Fig. 10, that is, − Q ref< Q L< Q ref, then no switching is made. Real-time experimental results for switching delay t =20 s and for different load conditions and different % x set values are provided in Figs. 1114.

Fig. 11
figure 11

In switching of capacitor groups under nominal load (for set point % x =0)

It is seen from Fig. 11 that at nominal inductive load capacitor groups, q (3), q (5), q (6), q (4), q (2) and q (1) are switched in without any format but so as to ensure drawing minimum reactive power.

As seen from Fig. 12, when the load compensated by the capacitor groups q (3), q (4) and q (5) experiences a total outage, that is, Q L=0 and P L=0, the power system is capacitively loaded and the capacitor groups are switched out in the mentioned logic of the relay so as to pull the measured reactive power consumed by the load to the normal range.

Fig. 12
figure 12

Out switching of capacitor groups in the case of totally outing the compensated load (for set point % x =0)

In the experiment of Fig. 13, the relay compensates the inductive power by switching in the capacitor groups q (3), q (5) and q (4) from t =0 through t =60 s and holds the reactive power drawn in the normal range up to t =80 s when consumer power is decreased in a step function. Therefore capacitor powers in the circuit cause over-compensation. In this case the relay switches out q (3) and q (4) and switches in q (1), pulling again the reactive power to the normal range. It is possible to conduct experiments for different load conditions and % x values using the designed relay and the experimental arrangement. The result of the last experimental work is given Fig. 14, which is explained similarly to that of Fig. 13. The photograph of the mixed-signal based reactive power control relay designed by the author and the experimental circuits of capacitor banks and the load unit are given in Fig. 15 while the overall system hardware of the designed reactive power control relay can be found in Fig. 16.

Fig. 13
figure 13

Variation of the controlled reactive power with step changes in the load (for set point % x =50)

Fig. 14
figure 14

Variation of the controlled reactive power with step changes in load (for set point % x =100)

Fig. 15
figure 15

Photograph of reactive power control relay and experimental circuits

Fig. 16
figure 16

The overall system hardware of the designed reactive power control relay

7 Conclusion

With the designed relay, a considerable decrease in the production cost is ensured by using an advanced and fast mixed-signal microcontroller, which reduces the hardware. In measurement of the fundamental components of active and reactive powers, the Goertzel algorithm is used instead of the classical FFT, thus reducing the trigonometric calculation and making the process of the sampled signal data in the microprocessor easier. The reading process of capacitor powers by the relay helps optimization of the drawn inductive and capacitive powers by means of switching the needed capacitor groups. One of the most important features of the designed relay is its ability to sense any voltage faults possibly appearing at power input and capacitor groups by simple feedback circuits with a new approach, thus alarming the user and outing the related group if desired. In the sensing process only one cable connection is needed for each control point.