Abstract
In this paper, the VLSI implementation of a large system is investigated. Even in the case of VLSI implementation, many chips are required in a large system such as a database system. The interconnection architecture among a large number of VLSI chips and the chip architecture have to be designed to support the logical specification of the system. A sample logical design of such a system is based on our logic PICCOLO (PICture COmputer LOgic) for a picture database computer. If the modularity of our architecture design is good, the interconnection architecture of chips can be decided practically independently of the internal architecture of the chips. In order to support the design, we present a graph based interconnection description diagram and a PASCAL-like programming language. The diagram and language are used to support an extended relational calculus adopted by PICCOLO for describing data operations. An algorithm to decompose the extended relational calculus into the interconnection diagram and the PASCAL-like programming language is also shown. By this decomposition, the performance of the system can be estimated roughly based on an assumption about the properties of the interconnection and the chip before an internal architecture decision.
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Yamaguchi, K., Kunii, T.L. (1984). Top-down VLSI design experiments on a picture database computer. In: Kunii, T.L. (eds) VLSI Engineering. Lecture Notes in Computer Science, vol 163. Springer, Tokyo. https://doi.org/10.1007/BFb0043457
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DOI: https://doi.org/10.1007/BFb0043457
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