Keywords

1 Introduction

The arcing phenomenon of electric arc has always existed in the construction of power grid. In the past, insufficient attention was paid to the reason that the voltage level of the substation built before was not high. At the same time, most of the equipment were open type, and the distance between the equipment was relatively far. Therefore, even if the arcing occurred in the disconnector without independent arc extinguishing ability, it would be extinguished quickly due to the phenomenon of arc drawing in the air The problems of equipment insulation and electromagnetic interference caused by arcing are not frequent. With the improvement of voltage level, GIS equipment has been widely used because of its high safety performance and compact space structure. All these lead to the VFTO problem in the circuit caused by arc re ignition in the operation process of disconnector. The amplitude of VFTO is high, which contains a wide frequency range, and the wave head is extremely steep, which will damage the relevant equipment at the same time, it will produce electromagnetic interference to the secondary equipment [1,2,3,4,5].

The VFTO caused by the opening and closing of the isolation switch has been studied extensively. At present, the most mature research on the single arc process, the industry has reached a consensus, simplified, the arc process is equivalent to a time-varying resistance, its resistance change curve is equivalent to the letter “U”, is expected to wear a high resistance state at the beginning, the stable arc stage is a low value resistance, arc extinguishing stage and become a high value resistance, therefore, the current simulation model for a single arc is divided into two main, first is a time-varying resistance simulation, resistance change is only time-related, ignoring the impact of the environment; second is a nonlinear exponential change model, the model is also a function of time, and the difference between the time-varying arc model is that the resistance value function of different arc stages is not the same. These two single arcs burning models are too simple, and the parameters of different functions are basically fixed by choice, which do not meet the actual requirements of different working conditions. In the literature [6, 7], an arc model with a fixed resistance in series with a time-controlled switch was proposed based on EMTP simulation software to simulate the temperature burning arc with a low resistance value and the burning and extinguishing arc with a time-controlled switch to achieve a simple arc burning simulation, but the scheme has more limitations, firstly, the resistance value is selected as a fixed value, which is obviously inconsistent with the arc burning process, and secondly, the time-controlled switch is too simple to simulate the arc burning and extinguishing process. A new nonlinear resistance model is proposed in the literature [8], and the innovation lies in the fitting of the arc resistance as a function of the actual VFTO data, which can be used for a simple single arc-burning study. Taken together, the research on the simulation model for the full time arc reignition process is still inconclusive, and the existing simulation model cannot realize the repeated arc reignition process during the whole arc burning process.

In this paper, we use the theoretical derivation to get the main influencing factors of VFTO transient signal, and improve the full frequency simulation model of arc reignition based on logic judgment based on the principle of single dielectric breakdown combined with logic judgment theory, that is, according to the occurrence conditions of arc ignition and arc extinction to generate logic judgment, and use the programming function of MADEL model in EMTP software to realize the logic judgment process, according to which the numerical simulation of repeated arc reignition process is realized, followed by comparing the theoretical derivation with simulation results, and finally comparing the measured data of the test platform with simulation results to verify the correctness of the arc model.

2 Theoretical Analysis

Most of VFTO problems occur in the operation of disconnectors without independent arc extinguishing capability. At the same time, according to the measured data of VFTO, its waveform is very complex, including multiple frequencies, so it is difficult to study by theoretical calculation alone. According to the relevant standards, VFTO is basically composed of four parts [9], among which the resonance is caused by the equivalent capacitance characteristics of external equipment The main development trend of VFTO is determined by the frequency range component, which is called the dominant frequency component. At the same time, this part of the component can be simply analyzed by direct calculation.

2.1 Composition of VFTO

Taking the opening and closing capacitive load circuit of disconnector as an example, the equivalent analysis circuit is adopted as shown in Fig. 1, and the dotted line in the figure is equivalent arc [10].

Fig. 1
A circuit diagram. The opening and closing capacitive load circuit of disconnectors. The frequency, capacitance, and inductors are indicated.

Simplified diagram of isolating switch compatible load circuit

Full size image

According to the circuit model in Fig. 1 combined with resonance theory, it is known that the high frequency characteristics of VFTO are caused by the capacitance and inductance parameters of v in the circuit. Meanwhile, a key point of the isolation switch to split the no-load line is the equivalent capacitance of the line, therefore, according to Kirchhoff's law, the circuit equation of circuit II is shown below.

$$ \left\{ {\begin{array}{*{20}l} {L_2 \frac{di(t)}{{dt}} + \frac{1}{C_1 }\int_0^t i (t)dt + R_2 i(t) + u_{C_2 } + u_h = U_1 (0)} \hfill \\ {u_{C_2 } = \frac{1}{C_2 }\int_0^t i ({\text{t}}){\text{dt}} + {\text{U}}_2 (0)} \hfill \\ {u_h = i(t){\text{R}} + {\text{L}}_s \frac{di(t)}{{dt}}} \hfill \\ \end{array} } \right. $$
(1)

where: UC2 is the voltage on capacitor C2; Uh represents the voltage at both ends during arc burning; i (t) represents the current flowing in the arc during arc burning. is the arc voltage.

$$ C = C_1 C_2 /\left( {C_1 + C_2 } \right) $$
(2)

When \(\left( {R_2 + R} \right) < 2\sqrt {{\left( {L_2 + L_S } \right)/C}}\), the low frequency components of VFTO will be generated in the loop. By solving the differential equation, the following results are obtained.

$$ \left\{ {\begin{array}{*{20}l} {p_{1,2} = - \alpha_0 \pm j\omega_0 } \hfill \\ {\alpha_0 = \left[ {R_2 + R} \right]/\left[ {2\left( { {\text{L}}_2 + L_s } \right)} \right]} \hfill \\ {\omega_0 = \sqrt {{1/\left( {L_2 + L_S } \right)C - \left[ {R_2 + R/2\left( {L_2 + L_S } \right)} \right]^2 }} } \hfill \\ \end{array} } \right. $$
(3)

where \(\alpha_0\) is the attenuation coefficient of the loop and \(\omega_0\) is the natural angular frequency of the loop. At the same time, it can be roughly seen that the inductance and resistance of the load side determine the attenuation speed of the transient signal, and the values of the inductance, capacitance and resistance on the load side determine the oscillation frequency. Further, it can be concluded that.

$$ i(t) = \frac{U_1 (0) - U_2 (0)}{{\omega_0 L}}e^{ - \alpha_0 t} \sin \omega_0 t $$
(4)
$$ U_{C_2 } (t) = \frac{C}{C + C_2 }\left[ {U_1 (0) - U_2 (0)} \right] \cdot \left( {1 - e^{ - \alpha_0 t} \cos \omega_0 t} \right) $$
(5)

From Eq. (5), we can know that the basic waveform of the dominant frequency range component of VFTO is the impulse output voltage wave superimposed with attenuation damping surge wave. Therefore, we can know that the most important part of VFTO typical waveform caused by arc reburning is the dominant frequency component caused by external capacitance, and the manifestation of this part is the trend of oscillation attenuation, which also conforms to the law of arc development.

2.2 Influence of VFTO Amplitude

From the perspective of circuit, the VFTO during the operation of disconnector is caused by the high-frequency oscillation formed by the refraction and reflection of the traveling wave generated during the gap breakdown of disconnector in the circuit. According to the superposition principle, VFTO can be expressed as the superposition of power frequency voltage and high-frequency oscillation. From the resonance theory, it is known that the high frequency oscillation in the VFTO signal is caused by the resonance of the loop parameters. Therefore, the amplitude of the high frequency oscillation of the VFTO signal is determined by the loop parameters and breakdown voltage, and thus for a defined loop, the amplitude of the high frequency oscillation of the VFTO signal is proportional to the voltage difference between the two ends of the isolation switch break (Fig. 2).

Fig. 2
A line graph of voltage versus time. The distance of U P F is from (1.6, negative 0.5 to 0), U H F is (1.9, negative 0.5 to 0.5), U H F + is (1.8, negative 1.25 to negative 0.7). A curve extends between (1.0, negative 0.7) and (3.0, negative 0.8). The values are approximate.

Schematic diagram of VFTO amplitude composition

Full size image

In the process of high-frequency oscillation of VFTO, it can be considered that the change of instantaneous value of power frequency power supply voltage is very small. For the VFTO amplitude in the process of single breakdown, it can be expressed as the sum of instantaneous value UPF of power frequency voltage at breakdown time and relative amplitude UHF of high-frequency oscillation, as shown in formula 6. It is defined that the oscillation coefficient of high frequency oscillation generated by unit gap breakdown voltage in the same polarity direction of gap breakdown voltage is D+, and the oscillation coefficient in the opposite polarity direction is D−, then the maximum absolute value of VFTO can be expressed as:

$$ U_{VF} = \max \left( {\left| {U_{HF} + D_+ U_W } \right|,\left| {U_{HF} - D_- U_W } \right|} \right) $$
(6)

It is not difficult to see from the above formula that the maximum amplitude of VFTO is related to the instantaneous value of power frequency voltage during breakdown and the gap voltage difference before breakdown. The higher the absolute value of instantaneous value of power frequency voltage during breakdown and the greater the absolute value of gap voltage difference before breakdown, the higher the VFTO. The most serious VFTO occurs when the voltage is near the peak value of power frequency voltage and the residual voltage on the load side is the reverse peak value of power frequency voltage.

3 Full Time Simulation of Arcing

3.1 High Frequency Closure

There are many studies on the theory of logical judgments of the arc development process. The logical judgment theory of the arc development process proposed in the literature [11] is more detailed, mainly including two modules: the arc burning module and the arc extinguishing module, the theory of arc burning is relatively simple, that is, the gap breakdown theory, and for the arc extinguishing module, the study considers that the arc is extinguished when the arc current crosses the zero point, the limitation of this conclusion is that the arc current crosses the zero point is divided into natural cross-zero point and sudden change cross-zero point, obviously the literature [7] is not a rigorous judgment. As is known, the AC characteristics of the arc current will constantly occur over the zero point phenomenon, and the temperature of the arc ignition even if the arc current natural over the zero point will not occur when the arc extinguished, in other words, according to the law of conservation of energy when the arc energy is not consumed, even if the arc current normal over the zero, will not occur when the arc extinguished. In this regard, for the arc extinguishing criterion needs to consider the arc energy close to the dissipation process of the cutoff phenomenon, that is, in the arc energy oscillation process, when the arc current is less than a certain cutoff value, the current is forced to occur past the zero-point phenomenon [12,13,14,15]. Therefore, the logic judgment language of the simulation model includes the criterion that the arc current is less than the cutoff value, and the over-zero-point criterion of the arc current is combined with the with-gate logic.

The cut-off value in SF6 dielectric environment is determined by many factors such as the structure of the air chamber of the disconnector and the external circuit. According to the reference [12], the estimation idea of SF6 circuit breaker cut-off value is proposed.

$$ I_{{\text{ch}}} = 120 {\text{A}}/{\text{us}} \times \Delta {\text{t}} $$
(7)

In the above formula: \(\Delta {\text{t}}\) is the simulation step size, and the current is forced to cross zero when the logic judgment language is set to.

$$ |{\text{i}}(t)| - |{\text{i}}(t - \Delta t)| \le I_{{\text{ch}}} $$
(8)

3.2 Based on the Principle of Logical Judgment of the Arc-Burning Stage

In the literature [16, 17], it is proposed that the arc development process contains three stages: expected penetration, stable arc ignition and arc extinguishing, and this paper uses the logic language to transform the arc development process into two parts: arc ignition judgment and arc extinguishing judgment, for arc extinguishing judgment using the arc current over zero point combined with high-frequency interception theory to complete the overall formation of the arc full time development process logic judgment module, as shown in Fig. 3.

Fig. 3
An illustration. The arc current oscillation, the closure value, and the natural zero crossing are indicated.

Phenomenon about chopping current

Full size image

From the logic language shown in Fig. 4, it can be seen that the overall logic judgment contains three parts, arc burning judgment, arc extinguishing judgment and the end of the whole arc process judgment (corresponding to different dashed boxes), in the figure, the data in the circular illustration is the data input part of the judgment process, arc burning judgment data input for the voltage at both ends of the isolation switch fracture U1, U2 and the dielectric breakdown voltage between the fracture Ub, dielectric breakdown voltage only The data input of the arc extinguishing judgment module is the current at moment t and the current at the moment before t. The positive and negative product between the two is used to determine whether the zero point is crossed, and the difference between the two is divided by the time difference to determine whether the interception phenomenon occurs; the end judgment module of the whole arc development process is obtained based on the comparison of the gate operation speed of the disconnector switch and the gap size of the gate. The output values of all logical criteria in the model are 0 or 1.

Fig. 4
2 diagrams. The overall logic judgment contains 3 parts, arc burning judgment, arc extinguishing judgment, and the end of the whole arc process judgment. The voltage at both ends of the isolation switch fracture U 1, U 2 and the dielectric breakdown voltage between the fracture U b, dielectric breakdown voltage is given.

Logic judgment schematic of arc simulation

Full size image

For the value of Ub, many literatures have adopted the method of combining actual detection with data simulation, that is, the test or the breakdown voltage data of SF6 dielectric under different spacing, and then use MATLAB software to fit the data to form a function form. For the breakdown function setting of knife edge gap in conventional disconnectors, the breakdown voltage test data of disconnectors in reference [18] can be fitted to obtain the function relationship as follows:

$$ U_b = 10^{ - 2} d^2 + 20.7d + 7.1 $$
(9)

where Ub is the breakdown voltage in kV, d is the contact breaking distance in m, d is only related to the breaking speed v of the contact, d = vt is the opening action and C is the closing action. According to the speed data brought in by reference [17], the variation formula of dielectric breakdown voltage during the action of 330 kV GIS internal disconnector is obtained as follows.

$$ U_b = 543860 - 1754386\;*\;{\text{ISTEP}}\;*\;{\text{DELTAT }} $$
(10)

In the formula, time t needs to be changed into: \(\mathrm{ISTEP}*\mathrm{DELTAT}\), which is the internal variable of EMTP and represents the time variable t.

3.3 Simulation Result

According to the logic judgment model of the above analysis and research, combined with the typical equivalent model of disconnector on / off capacitive load circuit, the simulation model is established in EMTP software, as shown in Fig. 5. The logic judgment module is located at the top of the circuit topology.

Fig. 5
A circuit diagram. The disconnector on or off capacitive load circuit simulation model. The logic judgment model is located at the top of the topology.

Full time arc reburning simulation model

Full size image

Based on the logic judgment of the full process of arc simulation results are shown in Fig. 6. Select the closing process, and set the switch opening action to start at 0 moment and end at 0.3 s, the simulation step size is 35 ns, and the total simulation time is 0.35 s.

Fig. 6
2 line graphs of voltage versus t per meter seconds. a, The full band V F T O simulation is extended between (0, 0) and (0.35, negative 300. The labeled points are 328.3 k V 1.723 P U and 344.4 k V 1.807 P U. b, The curve extends between (0, 0) and (50.04, negative 200). The values are approximate.

Full-band simulation waveform of VFTO

Full size image

According to the VFTO simulation results waveform shown in Fig. 6, the overall change and sine waveform development trend is consistent, but the overall VFTO waveform shows a “step”, with the combustion arc, “step” more and more intensive, while The amplitude of the “ladder” becomes smaller and smaller until it finally disappears. The “ladder” is generated because each time the arc occurs in the maximum voltage difference between the two ends of the fracture moment, and in a short period of time rose sharply, forming a “step” of the rising stage, and the arc right will occur when the energy is depleted extinguished, that is, the oscillation decay process, the formation of “stage” of the down phase, thus forming a step. At the same time, as seen in Fig. 6, the maximum magnitude of the VFTO signal reaches 1.807 times the rated voltage. When the single section arcing waveform is amplified, it is found that the single arc is some oscillation attenuation waveform with very steep wave head. The wave head frequency f1 reaches 48 MHz and the slow wave frequency f2 is about 10 MHz.

With the opening action, the frequency of arc reburning decreases, but the duration of single arcing increases. This is because the dielectric recovery voltage increases, breakdown and reburning become more difficult, leading to longer arc extinction time.

4 Measured Arcing Data

According to the theoretical analysis of the circuit model to build the test platform of the isolation switch switch splitting no-load line, to simplify the processing and analysis of single-phase VFTO data, the test only builds single-phase GIS platform, VFTO transient signal acquisition technology using PicoScope 6 series acquisition card, the principle of the test platform is shown in Fig. 7 below.

Fig. 7
A circuit diagram. The principle of the test platform is illustrated. The signal phases are highlighted. R 1, L 1, R, L S, K, R 2, L 2, C 1, T V, T A, C 1, and C 2 are connected.

Test Principle and Field Layout

Full size image

The test results are imported into MATLAB as shown in Fig. 8.

Fig. 8
3 line graphs of voltage versus time. a, A curve extends between (negative 40, 0) and (180, negative 200) denoting fluctuation. b, Low-frequency part extends between (0.275, negative 130) and (18.04, negative 150). c, High frequency and ultra high-frequency part extend (negative 0.275, 0) and (2.014, negative 135.) Data are estimated.

VFTO measured waveforms

Full size image

It can be seen from the comparison diagram that the development trend of the simulation results is consistent with the measured results, and both show step changes. It can be seen from the figure that the wave head frequency f1 is about 55 MHz, and the slow wave frequency f2 is about 9.5 MHz. However, due to the strong randomness of the measured arc data and the external interference of the sensor used in the measurement, the obtained waveforms have no strict comparison significance, only the development trend and the frequency of the core waveform can be compared. The statistical rules obtained from many experiments are given below and compared with the simulation data.

Compared with the simulation data, the overall trend of the two is the same, both are sinusoidal variation waveform of lifting pulse superposition oscillation attenuation. At the same time, the regularity of waveform amplitude, frequency and duration are basically the same. The severe situation of simulation data is slightly higher than the actual situation, which is because the simulation environment is an ideal situation, and the actual scene has not been considered Special case of waveform attenuation (Fig. 9).

Fig. 9
A line graph of voltage versus time. A curve extends between (71.4m 94.29) and (709, 125.72) by passing through (141.8, 220.01) and (425.4, 125.72). The measured data is marked at (100, 72.76) and simulation data at (141.8, 220.01). The values are approximate.

Comparison between measured data and simulation data of single arcing

Full size image

In order to further compare the full-time simulation and measured data of arcing, the first eight times of arcing under two conditions were selected to compare the maximum overvoltage multiple and arcing duration. The statistical results are shown in Table 1 below.

Table 1 Comparing the Statistical Result of Measured Multiple Groups of Data with the Simulated Data
Full size table

Compared with the data, the larger over-voltage of repetitive arcing basically occurs now when the voltage difference between the contacts of the disconnector is the largest. During the closing process, the arcing speed is faster and faster, but the attenuation and extinction is also fast. The maximum overvoltage is about 1.8 p.u. The minimum overvoltage is about 1.5 p.u and the longest single arcing time is about 10 ms. The shortest is about 2 ms. Compared with the first eight arcing tests, the development laws of the two are consistent, and the waveform parameters are close. It can be verified that the full-time arc simulation model based on logical judgment can well simulate the arcing phenomenon of disconnector during the process of breaking and closing capacitive load.

5 Conclusion

In view of the large discrepancy between the simulation and the actual results caused by the limitations of the current commonly used arc models due to the logical criterion of arc extinguishing, this paper combines the principle of arc energy conservation, adds the criterion of high-frequency current oscillation and current interception, establishes the simulation model of disconnector opening and closing no-load line in EMTP software, and uses the improved arc model to study the transient signal development characteristics of pulling and closing no-load line. The following conclusions are drawn:

  1. 1.

    The results show that the arc simulation model with increased interception criterion to improve the arc extinguishing logic judgment model can well realize the whole process of arc simulation, and its amplitude, frequency and development trend are close to the theoretical analysis and experimental results.

  2. 2.

    The waveform of VFTO signal shows a “step” shape, with the closing action, the “step” amplitude gradually reduced, the density gradually increased, which means that with the development of the arc, the single arc burning time is getting shorter and shorter, until the arc completely disappeared. This means that as the arc develops, the time of a single ignition becomes shorter and shorter until the arc disappears completely.

  3. 3.

    According to theoretical derivation, the factors affecting the VFT0 signal oscillation decay is the parameter resonance of the circuit, mainly the no-load line equivalent capacitance value.

  4. 4.

    The development process of the arc is a combination of numerous single arc-burning processes, the time of a single arc-burning process is milliseconds, the high-frequency part of the VFTO information is MHz level, and the maximum VFTO amplitude reaches 1.8 times the rated voltage.