Keywords

1 Introduction

Demand for energy is getting increased day by day. The key source of energy available now is from non-renewable sources like fossil fuels. The over utilization of these sources to meet our daily requirements have put it in a degradation state [1, 2]. Hence, there is a rapid development in the research to produce energy from alternate sources, such as wind, solar, tidal, etc. Among them, energy taken from photovoltaic systems plays an important role. The energy which is taken from a photovoltaic system (PV system) is DC in nature. Most of the equipments are used for domestic and industrial purposes which work on an AC source, the DC output from a PV system is converted into an AC and for this purpose, power inverters play a major role.

2 Multilevel Inverter Concepts

Multilevel inverters concept attracts academia as well as industry over wide range. They combine switched waveforms with lower levels of harmonic distortion than an equivalently rated two-level converter [1–3]. It found that with the increase in level, the steps increases and the output waveform approaches to a near sinusoidal waveform. Thus, it reduces the THD with a disadvantage of complex control and voltage imbalance problem. They are employed mainly for high-power, high-voltage/medium-power applications. They create more switching states, thereby stepping up output inverter voltages in small increments. These smaller voltage steps help in creating high-quality waveforms, lower dv/dt and reduced electromagnetic compatibility. But in order to increase the number of levels, more number of components are required and same will make the circuit complex [2]. High switching frequency employed in multilevel inverters helps in minimizing the output harmonics and reducing the passive component size in the power circuit. Figure 1 shows different number of voltage-level output waveform of MLI.

Fig. 1
figure 1

3, 5, 7 level output waveform of multilevel inverter at fundamental frequency

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There are also different topologies of multilevel inverters that generate a stepped output voltage waveform and that are suitable for different applications. By designing multilevel circuits in different ways, many topologies with properties have been developed. The basic multilevel inverter topologies include: Diode-clamped multilevel inverter, capacitor-clamped multilevel inverter, cascaded H-bridge (CHB) multilevel inverter.

2.1 Cascaded H-Bridge Multilevel Inverter (CHB-MLI)

The concept of multilevel inverter is based on connecting H-bridge inverters in series to get a sinusoidal voltage output. Figure 2 shows a full-bridge inverter. One full-bridge is itself a three-level cascaded H-bridge multilevel inverter and every module added in cascade which extends the inverter with two voltage levels. Each full-bridge inverter can create three voltages VDC, 0 and −VDC. To change one level of voltage cascaded H-bridge multilevel inverter turns one switch ON and other switch OFF in one full-bridge inverter. For example, to achieve voltage +Vdc, switches S1 and S2 are turned ON, for −Vdc, the switches S3 and S4 are turned OFF. When there is no current following through the full-bridge, then 0 voltage level is achieved [3, 4].

Fig. 2
figure 2

Single-phase full-bridge inverter

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The output voltage in each bridge is the summation of the voltage that is generated by each cell. The number of output voltage levels are 2n + 1, where n is the number of cells. The cascaded H-bridge multilevel inverter is capable of producing the total voltage source magnitude in both positive and negative half cycles, while many other topologies can only produce half the total DC-bus voltage source magnitude. Full-bridge inverter that is connected in series can contribute with the same voltage, thus meets topology. There is possibility to charge every module in a cascaded H-bridge multilevel inverter with different voltages.

In Fig. 3, there are two full-bridge inverters connected in series for obtaining five different output voltage levels, −2VDC, VDC, 0 −VDC and +2Vdc. The advantages of this type of multilevel inverter are that it needs less number of components comparative to the diode clamped or the flying capacitor. However, the number of sources is higher, for the phase-leg to be able to create a number if m voltage level and switches 2 * (m − 1) [1, 2, 4].

Fig. 3
figure 3

Single-phase five-level multilevel inverter

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3 Modulation Techniques for Multilevel Inverter

Multilevel inverters have different modulation techniques for obtaining a better output voltage response with minimum harmonic distortions. There are basically two groups of methods: modulation with fundamental switching frequency or high switching frequency pulse width modulation (PWM) [5–11].

3.1 Pulse Width Modulation Techniques

A multilevel pulse width modulation method uses high switching frequency carrier waves in comparison to the reference waves to generate a sinusoidal output wave as such in the two-level PWM case. To reduce harmonic distortions in the output voltage waveform, phase-shifting techniques are used [12–20].

The carrier-based pulse width modulation techniques can be broadly classified into:

  • Phase-shifted modulation

  • Level-shifted modulation.

In both modulation techniques, for an m-level inverter, (m-1) triangular carrier waves are required and all the carrier waves should have the same frequency and same peak-to-peak magnitude.

Phase Disposition Pulse Width Modulation: In phase disposition modulation technique, all the triangular carriers are in phase and are arranged one over the other as shown in Fig. 4. These arranged triangular carriers are compared with reference wave to obtain the pulses for the multilevel inverter switches. This technique is generally accepted as the method that creates the lowest harmonic distortion in line-to-line voltage.

Fig. 4
figure 4

Reference and carrier wave for a five-level cascaded H-bridge multilevel inverter with PD-PWM

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4 Operating Modes of Five-Level Cascaded H-Bridge Multilevel Inverter

Mode1: +2Vdc: Figure 5 shows the operating mode for getting output voltage of +2Vdc. In this mode, switches SW1, SW2, SW5 and SW6 are ON and all the other switches SW3, SW4, SW7 and SW8 are OFF.

Fig. 5
figure 5

Operating mode for getting output voltage of +2Vdc

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Mode2: +Vdc: Figure 6 shows the operating mode for getting output voltage of +Vdc. In this mode, switches SW1, SW2, SW8 and SW6 are ON and all the other switches SW3, SW4, SW7 and SW5 are OFF.

Fig. 6
figure 6

Operating mode for getting output voltage of +Vdc

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Mode3: 0: Figure 7 shows the operating mode for getting output voltage of zero. The lower-leg switches are triggered; hence, there will no flow of current in the power circuit.

Fig. 7
figure 7

Operating mode for getting output voltage of zero

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Mode4: −Vdc: Figure 8 shows the operating mode for getting output voltage of −Vdc. In this mode, switches SW3, SW4, SW8 and SW6 are ON and all the other switches SW1, SW2, SW7 and SW5 are OFF. The flow of current is opposite to the load current.

Fig. 8
figure 8

Operating mode for getting output voltage of −Vdc

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Mode5: -2Vdc: Figure 9 shows the operating mode for getting output voltage of −2Vdc. In this mode, switches SW3, SW4, SW8 and SW7 are ON and all the other switches SW1, SW2, SW6 and SW5 are OFF. The flow of current is opposite to the load current.

Fig. 9
figure 9

Operating mode for getting output voltage of −2Vdc

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5 Fourier Analysis of PD-PWM Technique

The concept of a two-level pulse width modulated converter system is that a low-frequency reference waveform is compared against a high-frequency carrier waveform and the compared output is used to control the switches. The consequence of switching process has fundamental component, the reference waveform and also incorporates a series unwanted harmonics. Determination of harmonic frequency components is complex and it is often done by fast Fourier transform analysis of a simulated time-varying waveform. This approach also reduces mathematical effort but uncertainly, it leaves error. In contrast, an analytical solution which exactly identifies the harmonic component of a PWM waveform ensures that precisely the harmonics are being considered when various PWM strategies are compared against each other [21–27]. Table 1 gives the switching function condition of a five-level multilevel inverter.

$$\begin{aligned} f\left( t \right) = & \frac{{A_{oo} }}{2} + \mathop \sum \limits_{n = 1}^{\infty } [A_{\text{on}} \cos \left( {\left[ {n\omega_{o} t} \right]} \right) + B_{\text{on}} \sin \left( {\left[ {n\omega_{o} t} \right]} \right)] \\ & + \mathop \sum \limits_{m = 1}^{\infty } [A_{mo} \cos \left( {\left[ {n\omega_{c} t} \right]} \right) + B_{mo} \sin \left( {\left[ {m\omega_{c} t} \right]} \right)] \\ & + \mathop{\sum}\limits_{m = 1}^{\infty } \mathop{\sum}\limits_{{\mathop{n = - \infty}\limits_{n \ne 0}}}^{\infty } \left[ {A_{mn} \cos (\left[ {m\omega_{c} t + n\omega_{o} t} \right]} \right) & \\ & + B_{mn} \sin (\left[ {n\omega_{c} t + n\omega_{o} t} \right]) \\ \end{aligned}$$
Table 1 Switching function condition of a five-level multilevel inverter
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m:

carrier index variable

n:

base-band index variable.

The final expression for harmonic components can be obtained by on substituting the equation

$$\begin{aligned} V_{az} \left( t \right) & = 2MV_{dc} \cos \omega_{0} t + \frac{{8V_{dc} }}{{\pi^{2} }}\mathop \sum \limits_{m = 1}^{\infty } \frac{1}{2m - 1}\mathop \sum \limits_{k = 1}^{\infty } \frac{1}{2k - 1}J_{2k - 1} \left( {\left[ {2m - 1} \right]2\pi M} \right) \\ &*\left\{ {1 + 2\sin (\left[ {2k - 1} \right]\varphi \cos k\pi \} *\cos \left( {\left[ {2m - 1} \right]\omega_{c} t} \right)} \right. \\ &+ \frac{{2V_{dc} }}{\pi }\mathop \sum \limits_{m = 1}^{\infty } \frac{1}{2m}\mathop \sum \limits_{n = - \infty }^{\infty } J_{2n + 1} \left( {4m\pi M} \right)\cos n\pi \cos \left( {2m\omega_{c} t + \left[ {2n + 1} \right]\omega_{0} t} \right) \\ &+ \frac{{4V_{dc} }}{{\pi^{2} }}\mathop \sum\limits_{m = 1}^{\infty} \frac{1}{2m - 1}\mathop \sum \limits_{\mathop{n = - \infty}\limits_{n \ne 0}}^{\infty } \mathop \sum \limits_{k = 1}^{\infty } [ J_{2k - 1} \left( {\left[ {2m - 1} \right]2\pi M} \right)\cos k\pi \\&\left. *\left\{ {\frac{{\cos \left( {\left[ {n - k} \right]\pi } \right) + 2\sin \left( {\left[ {2k - 1 - 2n} \right]\varphi } \right)}}{{\left[ {2k - 1 - 2n} \right]}} + ~~\frac{{\cos \left( {\left[ {n - k} \right]\pi } \right) + 2\sin \left( {\left[ {2k - 1 + 2n} \right]\varphi } \right)}}{{\left[ {2k - 1 + 2n} \right]}}} \right\}\right] \hfill \\& *\cos \left( {\left[ {2m - 1} \right]\omega _{c} t + 2n\omega _{0} t} \right)\\ \end{aligned}$$

6 Simulation Results of Cascaded H-Bridge Multilevel Inverter Using PD-PWM Technique

The simulation is carried out using MATLAB/SIMULINK software. The simulation diagram is shown in Fig. 10.

Fig. 10
figure 10

Simulation diagram of cascaded H-bridge multilevel inverter using PD-PWM technique

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Table 2 gives the design parameters for cascaded H-bridge multilevel inverter. Figure 11 shows the output voltage and output current of five-level cascaded H-bridge multilevel inverter for switching frequency of 2 kHz M = 1 and Fig. 12 shows the harmonic spectrum of output current of five-level cascaded H-bridge multilevel inverter for the switching frequency of 2kH and modulation index, M = 0.8 and M = 1.

Table 2 Design parameters for cascaded H-bridge multilevel inverter
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Fig. 11
figure 11

a Output voltage and b Output current of five-level cascaded H-bridge multilevel inverter for switching frequency of 2 kHz M = 1

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Fig. 12
figure 12

Harmonic spectrum of output current of five-level cascaded H-bridge multilevel inverter (2 kHz) a M = 0.8 b M = 1

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Comparison of THD values for modulation index 0.8 and 1 and switching frequencies of 1 kHz and 2 kHz are given in Table 3. Also the Comparison of THD for PDPWM and SHE technique is for 0.8 and 1 modulation index and 1 and 2 kHz switching frequencies is given in Table 4.

Table 3 Comparison of THD for various modulation index and switching frequencies
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Table 4 Comparison of THD for PD-PWM and SHE techniques
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7 Hardware Implementation

FPGA Kit

The control signal for the power switches of a five-level cascaded H-bridge multilevel inverter is developed with the help of SPARTAN 6-XC6SLX25 trainer kit. Figure 13 shows the schematic of SPARTAN 6 FPGA kit.

Fig. 13
figure 13

SPARTAN 6-FPGA kit

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Design specification for hardware implementation of a five-level cascaded H-bridge multilevel inverter is given in Table 5. Output voltage and output current for switching frequency of 1 kHz and modulation index of 0.8 are shown in Fig. 14a and b. Also the FFT of output voltage and current for switching frequency of 1 kHz and modulation index of 0.8 is shown in Fig. 15a, b.

Table 5 Design specification for hardware implementation of a five-level cascaded H-bridge multilevel inverter
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Fig. 14
figure 14

a Output voltage and b Output current of five-level cascaded H-bridge multilevel inverter

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Fig. 15
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FFT of a Output voltage and b Output current

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The harmonic spectrum with R-Load for switching frequency of 1 kHz and modulation index of 0.8 is shown in Fig. 16 for output voltage, current and power. The comparison of different modulation indices and switching frequency is given in Table 6.

Fig. 16
figure 16

Harmonic spectrum of a Output voltage, b Output current and c Power

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Table 6 Comparison of different modulation indices and switching frequency
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8 Conclusion

In this work, a single-phase five-level cascaded H-bridge multilevel inverter is studied and analyzed in terms of output voltage, output current and harmonic spectrum. Phase disposition PWM modulation technique is used to generate switching pulses for the inverter. Further, optimal switching angles for the inverter are calculated for harmonic reduction (third harmonic, fifth harmonic and seventh harmonic). Results are verified using simulation done in MATLAB/SIMULINK. The five-level cascaded H-bridge multilevel inverter is implemented as a hardware prototype. The pulses for cascaded H-bridge multilevel inverter are generated using Spartan-6 XC6SLX25 FPGA kit. A comparison of the output THD with modulation index of 0.8 and 1, and switching frequencies 1 and 2 kHz is carried out. As a future scope, multilevel inverter can be analyzed for different output levels by changing modulation index and switching frequency. By designing suitable filters, the total harmonic distortion can further be reduced on the output, to meet IEEE harmonic standards.