Abstract
In the early days of transistor applications in electronic circuits the design of these circuits relied heavily on empirical methods; with a certain concept in mind the designer actually built his circuit on a (printed-)circuit board with discrete elements (capacitors, resistors, inductors, transistors, etc.) and checked its electrical performance. If the result was not satisfactory, the discrete elements were changed in value and/or type, until the electrical specifications were met. This empirical procedure was called breadboarding. With the advent of the integrated circuit this method was no longer appropriate, mainly for two reasons:
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discrete elements have properties different from their integrated counter-parts. In the first place the integrated circuit has a substrate, common to all elements, that has to be taken into account (e.g. the parasitic pnp transistor, accompanying each vertical npn transistor, and the coupling between the various devices via the substrate). Furthermore, integrated resistors have rather large parasitic capacitances, etc.
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the distances between the discrete elements of a breadboarded circuit are much larger (tens of millimetres) than those in integrated circuits (tens of microns) and so are the interconnections. Moreover, discrete elements are encapsulated. This means that the parasitic capacitive coupling between the elements in a breadboarded circuit is quite different from that in an integrated circuit and the self-inductances of the interconnection lines in a breadboarded circuit are much larger.
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© 1990 Springer-Verlag/Wien
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de Graaff, H.C., Klaassen, F.M. (1990). Introduction. In: Compact Transistor Modelling for Circuit Design. Computational Microelectronics. Springer, Vienna. https://doi.org/10.1007/978-3-7091-9043-2_1
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DOI: https://doi.org/10.1007/978-3-7091-9043-2_1
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