Abstract
This paper proposes a parallel hardware architecture for the scale-space extrema detection part of the SIFT (Scale Invariant Feature Transform) method. The implementation of this architecture on a FPGA (Field Programmable Gate Array) and its reliability tests are also presented. The obtained features are very similar to Lowe’s. The system is able to detect scale-space extrema on a 320 ×240 image in 3 ms, what represents a speed up of 250x compared to a software version of the method.
Chapter PDF
Similar content being viewed by others
References
Bonato, V., Marques, E., Constantinides, G.A.: A parallel hardware architecture for scale and rotation invariant feature detection. IEEE Transactions on Circuits and Systems for Video Technology 18(12), 1703–1712 (2008)
Djakou Chati, H., Muhlbauer, F., Braun, T., Bobda, C., Berns, K.: Hardware/software co-design of a key point detector on FPGA. In: FCCM 2007: Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Washington, DC, USA, pp. 355–356. IEEE Computer Society, Los Alamitos (2007)
Grabner, M., Grabner, H., Bischof, H.: Fast approximated SIFT. In: Narayanan, P.J., Nayar, S.K., Shum, H.-Y. (eds.) ACCV 2006. LNCS, vol. 3851, pp. 918–927. Springer, Heidelberg (2006)
Ke, Y., Sukthankar, R.: PCA-SIFT: a more distinctive representation for local image descriptors. In: 2004 IEEE Computer Society Conference on Computer Vision and Pattern Recognition, vol. 2, pp. 506–513 (2004)
Lowe, D.G.: Distinctive image features from scale-invariant keypoints. International Journal of Computer Vision 60(2), 91–110 (2004)
Pettersson, N., Petersson, L.: Online stereo calibration using FPGAs. In: Intelligent Vehicles Symposium, 2005. Proceedings. IEEE, pp. 55–60 (2005)
Se, S., Ng, H.k., Jasiobedzki, P., Moyung, T.j.: Vision based modeling and localization for planetary exploration rovers. In: 55th International Astronautical Congress 2004 (2004)
Sinha, S., Frahm, J.-M., Pollefeys, M., Genc, Y.: Feature tracking and matching in video using programmable graphics hardware. Machine Vision and Applications
Vedaldi, A.: An open implementation of the SIFT detector and descriptor. Technical Report 070012, UCLA CSD (2007)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2009 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Chang, L., Hernández-Palancar, J. (2009). A Hardware Architecture for SIFT Candidate Keypoints Detection. In: Bayro-Corrochano, E., Eklundh, JO. (eds) Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications. CIARP 2009. Lecture Notes in Computer Science, vol 5856. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-10268-4_11
Download citation
DOI: https://doi.org/10.1007/978-3-642-10268-4_11
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-10267-7
Online ISBN: 978-3-642-10268-4
eBook Packages: Computer ScienceComputer Science (R0)