Skip to main content

Predicated Instructions for Code Compaction

  • Conference paper
Software and Compilers for Embedded Systems (SCOPES 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2826))

Included in the following conference series:

Abstract

Procedural abstraction, the replacement of several identical code sequences with calls to a single representative function, is a powerful tool in producing compact executables. We explore how predicated instructions can be used to allow procedural abstraction of non-identical basic blocks. A predicated instruction is one that the processor executes if a condition (specified in the opcode) is true, otherwise the instruction has no effect. Architectures such as the ARM provide predicated versions of most of their instructions. By using predicated instructions within a representative function and setting the appropriate flags prior to the call, a single function can serve to represent several different code sequences.

To find representative functions, we group sequences that have a short common supersequence and use this supersequence as a representative. We report results on the use of predication for procedural abstraction on the ARM and also indicate the potential compaction benefit of allowing more predication conditions.

Supported in part by the Natural Sciences and Engineering Research Council of Canada under grant NSERC-238828-01 and the National Science Foundation under grant CCR-0073394.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. Allen, J.R., Kennedy, K., Porterfield, C., Warren, J.: Conversion of control dependence to data dependence. In: Proceedings of the 10th ACM Symposium on Principles of Programming Languages, pp. 177–189 (1983)

    Google Scholar 

  2. August, D.I.: Systematic Compilation for Predicated Execution. Ph.D thesis, University of Illinois at Urbana-Champaign (2000)

    Google Scholar 

  3. Cooper, K.D., McIntosh, N.: Enhanced code compression for embedded RISC processors. In: ACM Conference on Programming Language Design and Implementation, May 1999, pp. 139–149 (1999)

    Google Scholar 

  4. Debray, S.K., Evans, W., Muth, R., de Sutter, B.: Compiler techniques for code compaction. ACM Transactions on Programming Languages and Systems 22(2), 378–415 (2000)

    Article  Google Scholar 

  5. Fraser, C., Myers, E., Wendt, A.: Analyzing and compressing assembly code. In: Proc. of the ACM SIGPLAN Symposium on Compiler Construction, vol. 19, pp. 117–121 (1984)

    Google Scholar 

  6. Itoga, S.Y.: The string merging problem. BIT 21(1), 20–30 (1981)

    Article  MATH  MathSciNet  Google Scholar 

  7. Liao, S., Devadas, S., Keutzer, K.: Code density optimization for embedded DSP processors using data compression techniques. In: Proc. Conf. on Advanced Research in VLSI, pp. 393–399 (1995)

    Google Scholar 

  8. Mahlke, S.A., Hank, R.E., McCormick, J.E., August, D.I., Hwu, W.-m.W.: A comparison of full and partial predicated execution support for ILP processors. In: Proceedings of the 22nd Annual International Symposium on Computer Architecture, June 1995, pp. 138–149 (1995)

    Google Scholar 

  9. Marks, B.: Compilation to compact code. IBM Journal of Research and Development 24(6), 684–691 (1980)

    Article  Google Scholar 

  10. Runeson, J.: Code compression through procedural abstraction before register allocation. Master’s thesis, Computing Science Department, Uppsala University (March 2000)

    Google Scholar 

  11. Schwarz, B., Debray, S., Andrews, G., Legendre, M.: PLTO: A link-time optimizer for the Intel IA-32 architecture. In: Proc. 2001 Workshop on Binary Rewriting (WBT-2001) (September 2001)

    Google Scholar 

  12. Seal, D. (ed.): ARM Architecture Reference Manual, 2nd edn. Addison-Wesley, Reading (2001)

    Google Scholar 

  13. Vahid, F.: Procedure exlining: A transformation for improved system and behavioral synthesis. In: International Symposium on System Synthesis, September 1995, pp. 84–89 (1995)

    Google Scholar 

  14. Zastre, M.J.: Compacting object code via parameterized procedural abstraction. Master’s thesis, Dept. of Computing Science, University of Victoria (1995)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2003 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Cheung, W., Evans, W., Moses, J. (2003). Predicated Instructions for Code Compaction. In: Krall, A. (eds) Software and Compilers for Embedded Systems. SCOPES 2003. Lecture Notes in Computer Science, vol 2826. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39920-9_3

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-39920-9_3

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-20145-8

  • Online ISBN: 978-3-540-39920-9

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics