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1 Introduction

In this chapter, device physics topics are introduced, which are relevant to TFTs, and for following the discussion in later chapters. The emphasis is on background understanding of basic device physics principles, and an analytical approach is followed, using single crystal semiconductor equations. These concepts and equations are modified in later chapters for the more complex situation of the non-single crystal TFT materials.

The first topic presented deals with semiconductor surface physics, focussing on band bending and surface charge in the metal–insulator–semiconductor, MIS, system. This underlies the relationship between the voltage on the metal gate and the induced charge in the semiconductor surface, and introduces the concepts of the flat band voltage and the threshold voltage for surface inversion. The most widely studied semiconductor/insulator interface is the c-Si/SiO2 interface, and the numerical examples given are based upon this system, although the equations themselves are quite general. In Chap. 6, these surface space charge equations are re-formulated to include the U-shaped density of states functions found in a-Si:H and other TFT materials, and the influence of these extra states is compared to the simpler situation discussed in this chapter.

The second topic is electron-hole pair generation and recombination. These are basic processes underlying both leakage current effects, and steady state carrier densities in devices under injection conditions, such as optical illumination. Finally, there is a brief discussion of carrier flow and the coupled field/space charge equations, which need to be solved in order to calculate the current–voltage characteristics of a device.

Much current research into device behaviour makes use of commercial device simulators to solve these latter equations. These simulation packages give a deeper insight into device behaviour by relating its current–voltage characteristics to internal field and carrier distributions. However, in published work, the fundamental equations are rarely listed. In the final Sect. 2.4, of this chapter, those equations are presented, and they are built up from the material in the preceding sections of the chapter (but, the numerical techniques used for the solution of the equations go beyond the scope of this book).

As is apparent, the range of device physics topics covered here is limited, and, for a broader coverage of this field, there are many excellent books available, such as Sze and Ng [1]. Examples of device simulation packages can be found in Refs. [2, 3], as well as a discussion of the numerical solution techniques in [2].

Some of the key simplified equations, from Sects. 2.2 and 2.3, are listed in the Appendix. These are useful for cross-reference purposes in later chapters, and also for direct, analytical calculations.

2 Semiconductor Surface Physics

2.1 Ideal MIS Capacitor and Surface Band Bending

Figure 2.1a shows the band diagram of an ideal MIS capacitor, on a p-type substrate, in which the Fermi levels in the metal and in the semiconductor perfectly align, such that there is no induced band bending within the structure (In Sect. 2.2.3, a more realistic situation will be discussed, in which there are work function differences between the metal and the semiconductor, and the semiconductor interface contains interface trapping states). In the treatment below, the following conventions will be used: the Fermi potential, VF, will be measured from the bulk intrinsic level, Ei, and will be taken as positive beneath Ei and negative above it. Similarly, the band bending, Vs, will be measured from the bulk intrinsic level, and the polarity convention will be the same as used for VF.

Fig. 2.1
figure 1

Ideal metal–insulator–semiconductor, MIS, band diagrams, showing different surface charge conditions for a p-type substrate: a flat bands, b hole depletion, c electron inversion, and d hole accumulation

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When a positive charge, QG, is placed on the metal gate, it will induce an equal and opposite negative charge in the semiconductor, Qs, and this negative charge will consist of an increase in the electron density and a decrease in the free hole density, thereby, leaving behind immobile, ionised acceptor centres, Na. In order to accommodate these changes in free carrier density, the bands within the semiconductor will have to bend downwards near its surface, as shown in Fig. 2.1b. It will also be seen that the positive charge on the gate results from a positive bias being applied to the gate relative to the semiconductor. Following the convention discussed above, the Fermi level in the metal is moved downwards in response to the positive gate bias, VG, and the semiconductor surface potential is +Vs. The situation shown in this diagram is for a small positive potential on the gate, such that the surface electron density, ns, is small compared with Na, and the surface is said to be depleted (of free holes). For a larger positive gate bias, the situation shown in Fig. 2.1c occurs. In this case, there is a corresponding increase in band bending, Vs, and the free electron concentration at the surface is larger than Na: the surface is now said to be inverted. Between these two situations, when the band bending, Vs = VF, the surface will be intrinsic, and ns = ps = ni. Further positive band bending beyond this point will lead to ns > ps. Finally, as shown in Fig. 2.1d, with a negative bias applied to the gate, there is an increase in positive charge induced in the semiconductor, due to an increase in the free hole density. This is associated with the bands bending upwards by an amount −Vs. In this case, the surface is said to be accumulated. With an n-type substrate, the opposite situation occurs, in that a negative gate bias will cause the surface to be depleted/inverted rather than accumulated, and a positive bias will cause surface accumulation.

To establish the relationship between Vs, and Qs and VG, it is necessary to solve Poisson’s equation, where:

$$ \frac{{d^{2} V}}{{dx^{2} }} = - \frac{q\rho (x)}{{\varepsilon_{0} \varepsilon_{s} }} $$
(2.1)

ε0 is the permittivity of free space, εs is the dielectric constant of the semiconductor, and the space charge density, ρ(x) is:

$$ \rho (x) = p(x) - n(x) - N_{a} $$
(2.2)

The free carrier densities are defined by the intrinsic carrier concentration, ni, and the separation of the Fermi level from the intrinsic level, i.e.:

$$ \begin{aligned} p(x) & = n_{i} \exp \frac{{q\left( {V_{F} - V} \right)}}{kT} \\ n(x) & = n_{i} \exp \frac{{ - q\left( {V_{F} - V} \right)}}{kT} \\ \end{aligned} $$
(2.3)
$$ p(x) - n(x) = 2n_{i} shq(V_{F} - V)/kT $$
(2.4)

Where T is the temperature, and k is Boltzmann’s constant. At the surface, V = Vs, and in the bulk, where V = 0:

$$ p_{0} = n_{i} \exp \frac{{qV_{F} }}{kT}{\text{ and }}n_{0} = n_{i} \exp \frac{{ - qV_{F} }}{kT} $$

From charge neutrality,Footnote 1

$$ p_{0} - n_{0} = N_{a} = 2n_{i} shqV_{F} /kT $$
(2.5)
$$ \frac{{d^{2} V}}{{dx^{2} }} = - \frac{{2n_{i} q}}{{\varepsilon_{0} \varepsilon_{s} }}\left[ {sh\frac{{q(V_{F} - V)}}{kT} - sh\frac{{qV_{F} }}{kT}} \right] $$
(2.6)

Using \( \frac{{d^{2} V}}{{dx^{2} }} = \frac{1}{2}\frac{d}{dV}\left( \frac{dV}{dx} \right)^{2} \), and integrating Eq. 2.6 from the bulk (V = 0, and dV/dx = 0) to the surface (V = Vs, and dV/dx = −Fs):

$$ \left( \frac{dV}{dx} \right)_{{V = V_{s} }}^{2} \equiv F_{s}^{2} = \frac{{4n_{i} q}}{{\varepsilon_{0} \varepsilon_{s} }}\left[ {\frac{kT}{q}ch\frac{{q(V_{F} - V_{s} )}}{kT} - \frac{kT}{q}ch\frac{{qV_{F} }}{kT} + V_{s} sh\frac{{qV_{F} }}{kT}} \right] $$
(2.7)

From Gauss’ Law, the surface field, Fs, is related to the total areal charge, Qs, contained within the surface by:

$$ {\text{Q}}_{\text{s}} = \, - \varepsilon_{0} \varepsilon_{\text{s}} {\text{F}}_{\text{s}} $$
(2.8)

Hence, the relationship between Qs and Vs is given by:

$$ Q_{s} = \pm \sqrt {4n_{i} q\varepsilon_{0} \varepsilon_{s} } G(V_{s} ,V_{F} ) $$
(2.9)

where G(Vs, VF) is given by:

$$ G(V_{s} ,V_{F} ) = \mp \sqrt {\left[ {\frac{kT}{q}ch\frac{{q(V_{F} - V_{s} )}}{kT} - \frac{kT}{q}ch\frac{{qV_{F} }}{kT} + V_{s} sh\frac{{qV_{F} }}{kT}} \right]}^{{}} $$
(2.10)

Given the positive and negative values of Qs in Eq. 2.9, the appropriate signs of Vs, Fs and Qs are given in Table 2.1, and the correct value of Qs is given by:

$$ Q_{s} = - \frac{{V_{s} }}{{\left| {V_{s} } \right|}}\left| {Q_{s} } \right| $$
(2.11)
Table 2.1 Polarity relationship between band bending, surface field and space charge in an MIS structure
Full size table

Equation 2.9 has been evaluated for a crystalline Si substrate doped with 1015 acceptors/cm3, and the key features in the relationship between Qs and Vs are shown in Fig. 2.2.Footnote 2 The three previously discussed regimes of accumulation, depletion and inversion are indicated, and, for accumulation and inversion, Qs increases exponentially with Vs. In these two regimes, the main contributors to Qs are the free carriers, so that the hole and electron densities increase exponentially with Vs in accumulation and inversion, respectively. In the third regime of majority carrier depletion, Qs increases with √Vs, and extrapolating the inversion arm of the curve back into this regime shows that the ionised acceptor charge dominates Qs. Hence, in the three regimes, either free carriers or fixed space charge constitutes the major part of Qs. As will be seen in Chap. 6, this is not necessarily the case with TFT materials, in which trapping states in the forbidden band gap can continue to make a major contribution to Qs even when the surface has enough free carriers to support substantial conduction.

Fig. 2.2
figure 2

Calculated variation of surface charge density with surface potential (substrate doping density is 1 × 1015 acceptors/cm3)

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For the calculation in Fig. 2.2, the value of qVF was 0.288 eV below Ei, and the electron concentration in inversion starts to dominate Qs at Vs > ~2VF. In fact, the conventional definition of the threshold for strong surface inversion is at Vs = 2VF, where the volume concentration of free electrons at the surface, ns, is equal to the volume concentration of acceptors, Na. When Vs = VF, the surface is intrinsic (ns = ps = ni), and the band bending regime beyond this, and up to strong inversion, is referred to as weak inversion (ps < ns < Na).

In the depletion/inversion regime, the band bending, Vs, is positive, and for Vs, and VF > kT/q, i.e., more than kT from the flat band position, Eq. 2.9 can be simplified to:

$$ Q_{s} \cong - \sqrt {2q\varepsilon_{0} \varepsilon_{s} } \left[ {n_{i} \frac{kT}{q}exp\frac{{q(V_{s} - V_{F} )}}{kT} + N_{a} V_{s} } \right]^{0.5} $$
(2.12)

The first term in the brackets relates to the free electron concentration, and the second term to the ionised acceptor space charge density, and the dependence of those terms on Vs shows the exponential and quadratic forms, respectively, discussed above. This simplified expression, with the physically obvious terms, provides a good approximation to the full Eq. 2.9, as seen by the calculations in Fig. 2.3. The calculations used two different substrate doping levels, and, for the more heavily doped substrate, with 1016 acceptors/cm3, the value of qVF is 0.348 eV below Ei, and this correspondingly increases the value of Vs at which strong inversion occurs. Also, the increase in Qs, for the more heavily doped substrate, at a given value of Vs in depletion, is ~3 times more than for the less heavily doped substrate, as expected from the √Na dependence in Eq. 2.12.

Fig. 2.3
figure 3

Comparison of surface charge density calculations using the full (solid line) and approximate (symbols) expressions from Eqs. 2.9 and 2.12, respectively. (Substrate doping densities of 1 × 1015 acceptors/cm3, and 1 × 1016 acceptors/cm3)

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Between flat bands and inversion, when the ionised acceptor space charge dominates, Eq. 2.12 can be further reduced to:

$$ Q_{s} \cong - \sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} V_{s} } \equiv Q_{b} $$
(2.13)

Where Qb is the areal acceptor space charge density. Equation 2.13 is the same as directly calculated from Poisson’s equation using the depletion approximation, i.e. from:

$$ \frac{{d^{2} V}}{{dx^{2} }} = \frac{{qN_{a} }}{{\varepsilon_{0} \varepsilon_{s} }} $$
(2.14)

and integrating this with respect to V. Alternatively, if Eq. 2.14 is integrated with respect to x, then:

$$ Q_{s} = - qN_{a} x_{d} $$
(2.15)

where xd is the width of the space charge depletion region at Vs. At inversion, when Vs = 2VF, further increases in band bending cause such large increases in Qs, due to the exponentially increasing free electron density, that, to a first approximation, the fixed space charge can be regarded as having reached a limiting maximum value, Qbmax. This can be obtained by substituting Vs = 2VF into Eq. 2.13:

$$ Q_{b\hbox{max} } = - \sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} 2V_{F} } $$
(2.16)

and from Eq. 2.15,

$$ Q_{b\hbox{max} } = - qN_{a} x_{d\hbox{max} } $$
(2.17)

where xdmax is the maximum width of the depletion region, and, from Eqs. 2.16 and 2.17, xdmax is given by:

$$ x_{d\hbox{max} } = \sqrt {\frac{{2\varepsilon_{0} \varepsilon_{s} 2V_{F} }}{{qN_{a} }}} $$
(2.18)

Qs in Eq. 2.12 can be represented by the sum:

$$ {\text{Q}}_{\text{s}} = {\text{ Q}}_{\text{n}} + {\text{ Q}}_{\text{b}} $$
(2.19)

Where Qb is the extended depletion layer charge, and Qn is the areal density of inversion layer electrons. These will be confined close to the semiconductor surface, by virtue of the electrons being in a parabolic potential well of depth Vs. The terms in Eq. 2.19 are pictorially represented in Fig. 2.4a for inversion (Vs > 2VF), and by Fig. 2.4b for depletion (Vs < 2VF). The variation of xdmax with Na can be calculated from Eq. 2.18, and is shown in Fig. 2.5. From a TFT point of view, assuming a certain equivalence between Na and the TFT trap state density, a curve of this type can be used to determine whether a thin film is fully depleted or not at inversion. For instance, the maximum equilibrium space charge width, at inversion, for a substrate doped with 1017 acceptors/cm3 is 100 nm; therefore, a thin film of 100 nm, with an equivalent volume trapped charge density of <1017 cm−3, will be fully depleted before Vs = 2VF. As a result of this, the threshold of inversion will occur at a lower value of band bending than for a thicker film having the same trap state density. This is discussed further in Chap. 3

Fig. 2.4
figure 4

Illustration of bulk depletion layer, Qb, and inversion layer, Qn, charge densities in: a inversion, and b depletion

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Fig. 2.5
figure 5

Variation of maximum depletion layer width at inversion, xdmax, with substrate doping level

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2.2 Gate Bias and Threshold Voltage

Referring to Fig. 2.1, the voltage on the gate, VG, is dropped partially across the dielectric, Vi, and partially across the semiconductor, Vs, so that:

$$ {\text{V}}_{\text{G}} = {\text{ V}}_{\text{i}} + {\text{ V}}_{\text{s}} $$
(2.20)

And, for charge neutrality, the charge on the gate, QG, equals the charge in the semiconductor, Qs, and

$$ {\text{Q}}_{\text{G}} = \varepsilon_{0} \varepsilon_{\text{i}} {\text{F}}_{\text{i}} = \varepsilon_{0} \varepsilon_{\text{i}} {\text{V}}_{\text{i}} /{\text{d}}_{\text{i}} = {\text{ C}}_{\text{i}} {\text{V}}_{\text{i}} = - {\text{Q}}_{\text{s}} $$
(2.21)

Where Fi is the field in the gate dielectric, and Ci is the capacitance/unit area of the gate dielectric. Hence,

$$ {\text{V}}_{\text{G}} = {\text{ V}}_{\text{s}} - {\text{ Q}}_{\text{s}} /{\text{C}}_{\text{i}} $$
(2.22)

Equation 2.22 can be used to relate the voltage on the gate of an MIS capacitor to the induced charge density in the semiconductor, Qs, and to the associated band bending, Vs. It can also be used to calculate the threshold voltage, VT, of the structure, i.e. the gate voltage necessary to induce band bending of 2VF at the semiconductor surface:

$$ V_{T} = 2V_{F} + \frac{{\sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} 2V_{F} } }}{{C_{i} }} $$
(2.23)

Figure 2.6 shows the calculated variation of VG with Vs for the two substrate doping levels used in Fig. 2.3, and for a 150 nm thick gate dielectric of SiO2. The more heavily doped substrate requires a larger gate bias to achieve a given degree of band bending in depletion, and, equally, has a larger value of VT, as shown by Eq. 2.23. Once the surface has gone into strong inversion, the free electron density, Qn, dominates Qs, and Qn is given by:

$$ {\text{Q}}_{\text{n}} = {\text{ C}}_{\text{i}} \left( {{\text{V}}_{\text{G}} - {\text{V}}_{\text{T}} } \right) $$
(2.24)
Fig. 2.6
figure 6

Calculated variation of surface potential, Vs, with gate bias, VG, in an ideal MIS structure, and showing the threshold voltage points. (Dielectric layer of 150 nm of SiO2, and p-type substrate doping of 1 × 1015 cm−3, and 1 × 1016 cm−3)

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As will be seen in Chap. 3, this is a widely used expression for the calculation of channel currents in MOSFET devices above threshold. It is equally widely used for similar calculations in TFTs. Hence, the threshold voltage is a key parameter in determining on-state device characteristics, and the dependence of threshold voltage on substrate doping level is shown in Fig. 2.7.

Fig. 2.7
figure 7

Calculated variation of threshold voltage with substrate doping level, and thickness of SiO2 gate dielectric

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2.3 Real MIS Structures

In contrast to the idealised MIS structure shown in Fig. 2.1, real structures may have work function differences between the gate metal and the semiconductor, fixed charges in the oxide, and interface trapping states at the dielectric/semiconductor interface. These will change the zero-gate-bias band bending, and affect the relationship between VG and Vs and Qs.

2.3.1 Work Function Differences

In general, the Fermi level position in a free metal will be different from the Fermi level in a free semiconductor. These differences are usually expressed in terms of a work function difference, where the work function is the energy required to remove an electron from the Fermi level to the vacuum level. When the two materials are connected, and in thermal equilibrium, the Fermi levels need to be coincident, and there will be a flow of electrons from one material to the other, resulting in an interfacial dipole, which establishes this equilibrium. In the semiconductor, this will result in surface band bending, the extent of which will be much greater than in the metal due to the short screening length of the latter’s high electron density.

In an MIS structure, it is conventional to reference the Fermi levels to the dielectric’s conduction band edge [4] (rather than to the vacuum level), so that the quoted barriers, ΦMi and χi, are the energies needed to remove an electron to the dielectric conduction band (as shown in Fig. 2.8, and χ is the electro-negativity of the semiconductor). For the Si/SiO2 system, these barrier energies were experimentally established by photo-emission measurements from the metal gate or the semiconductor into the oxide conduction band, and were 0.5–1 eV less than the respective vacuum values [5]. Figure 2.8a schematically shows the metal and the semiconductor separated, and Fig. 2.8b shows them connected in thermal equilibrium. In this case, electrons have flowed from the metal to the semiconductor to bring the Fermi levels into coincidence. As a result of this, the bands in the semiconductor have bent downwards by Vs0, with a corresponding voltage drop across the dielectric of Vi0. Equating the potentials either side of the high point in the insulator conduction band:

$$ \Upphi_{\text{Mi}} + {\text{ V}}_{{{\text{i}}0}} = \chi_{\text{i}} + {\text{ E}}_{\text{i}} /{\text{q }} + {\text{ V}}_{\text{F}} - {\text{ V}}_{{{\text{s}}0}} $$
(2.25)
Fig. 2.8
figure 8

MIS energy band diagrams in the presence of metal–semiconductor work function differences: a separated metal–insulator and insulator–semiconductor, b MIS system in thermal equilibrium

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The metal–semiconductor work function difference, ΦMS, is, therefore, given by:

$$ \Upphi_{\text{MS}} = \Upphi_{\text{Mi}} - (\chi_{\text{i}} + {\text{ E}}_{\text{i}} /{\text{q }} + {\text{ V}}_{\text{F}} ) \, = \, - \left( {{\text{V}}_{{{\text{i}}0}} + {\text{ V}}_{{{\text{s}}0}} } \right) $$
(2.26)

Thus, to remove the zero gate bias band bending in the system, and to restore flat band conditions, the gate voltage needs to be made more negative to induce more positive charge in the semiconductor surface. The gate voltage at flat bands, VFB, is given by:

$$ V_{FB} = \Upphi_{MS} = - ( {\text{V}}_{\text{i0}} \, + {\text{ V}}_{\text{s0}} )= - \, \left( {\frac{{\sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} {\text{V}}_{\text{s0}} } }}{{C_{i} }} + {\text{V}}_{\text{s0}} } \right) $$
(2.27)

Equally, the gate voltage required to achieve a given degree of band bending, including the threshold for inversion, will be modified by the metal–semiconductor work function difference, so that the expression for the threshold voltage now becomes:

$$ V_{T} = V_{FB} + \frac{{\sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} 2V_{F} } }}{{C_{i} }} + 2V_{F} $$
(2.28)

As indicated in Eq. 2.26, the work function difference will be a function both of the gate metal, and of the doping level in the semiconductor substrate, as shown in Fig. 2.9 for Al and doped poly-Si gates [1]. Due to its refractory properties, doped poly-Si has been extensively employed as the gate electrode in MOSFET technology, and, with appropriate doping, it can be tailored to produce the required sign of flat band voltage.

Fig. 2.9
figure 9

Experimentally determined MOS work-function differences, ΦMS, as a function of Si-substrate doping level, for different gate contact materials. (Reproduced from [1] with permission of John Wiley & Sons, Inc)

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2.3.2 Oxide Charges and Interface States

Many gate dielectrics, including SiO2, are characterised by charged centres in the oxide, which induce an opposite charge in the semiconductor surface. If the charged centres, Qi, are located at a distance x from the dielectric-semiconductor interface in an MIS capacitor, the charge induced in the semiconductor, Qs, is:

$$ {\text{Q}}_{\text{s}} = {\text{ Q}}_{\text{i}} \left( {{\text{d}} - {\text{x}}} \right)/{\text{d}} $$
(2.29)

Hence, for charges at the dielectric/semiconductor interface, the induced charge is equal to the charge, Qi, in the dielectric, whilst those at the metal interface have no effect. In many cases, the location of the charges may not be known, and an effective charge density, Qieff, will be determined, as though it were located at the dielectric/semiconductor interface.

As with the work function difference, this will result in a non-zero flat band voltage, given by:

$$ {\text{V}}_{\text{FB}} = \, - {\text{ Q}}_{\text{ieff}} /{\text{C}}_{\text{i}} $$
(2.30)

Positive charges are commonly found in SiO2 films on Si, and are referred to as ‘fixed’ charges, as their effect is not dependent upon the surface potential in the semiconductor. In other words, they have a constant effect, irrespective of the bias conditions, and present a fixed density.

In real crystalline semiconductor surfaces, the termination of the regular, periodic bulk potential introduces allowed states into the forbidden band gap, usually referred to as surface states. These are intrinsic states at the surface, and, in addition to these, there may be extrinsic states due to impurities. The densities of intrinsic states can be up to ~1015 cm−2 on an atomically clean surface, but, in a well-passivated surface, such as the Si/SiO2 interface produced by thermal oxidation of Si, these can be reduced to <1–5 × 1012 cm−2. The reduction is due to the SiO2 network providing oxygen pairing atoms for the Si dangling bonds, and further passivation with hydrogen typically reduces the overall density to ~1010 cm−2 or less. This combination of thermal oxidation and hydrogen passivation has generated one of the best-controlled semiconductor interfaces, and provided the basis for the Si semiconductor device industry.

Surface or interface states are generally distributed in energy across the forbidden band gap, and, in the case of the Si/SiO2 interface, the distribution is U-shaped between the valence and conduction band edges. In contrast to the fixed charge, the charge in interface states will be determined both by their distribution across the band gap, and by the position of the Fermi level at the surface. Using the zero Kelvin approximation, those states beneath the Fermi level can be regarded as filled with electrons, whilst those above will be empty. Take, for example, a constant density, Nss(E), across the band gap, with acceptor levels in the upper half of the band gap, and donor levels in the lower half, and with a neutral level, E0, at mid-gap. This distribution will have zero net charge in the interface states when the surface Fermi level is at mid-gap. However, if this distribution were added to the MIS band diagram used in Fig. 2.1a, where the Fermi level is below mid-gap, there would be a flow of electrons from the interface states below E0, leading to positively charged, empty donor states at the surface, and an equal negative charge density in the semiconductor surface. Hence, the semiconductor bands at the surface will be bent down by an amount Vs0 to ensure charge neutrality between the interface and the bulk, as shown in Fig. 2.10. In this example, the block of donor states between EF and E0 would be empty of electrons, and have a positive charge, Qss, balanced by the negative semiconductor surface charge, Qs.

Fig. 2.10
figure 10

Zero gate-bias MIS band diagram with a uniform distribution of interface states across the band gap, and with the cross-hatched region showing the charged states. (Donor and acceptor states in the lower and upper halves of the band-gap, respectively, and with the neutral level at mid-gap)

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In general, the electron occupancy, F(E), of a surface state at energy E is given by the Fermi–Dirac distribution function:

$$ F(E) = \frac{1}{{1 + \exp (qV_{F} - qV_{S} - E)/kT}} $$
(2.31)

Using the polarity convention of the earlier sections, E will have a negative value for centres above E0 (which is at mid-gap), and a positive value for those below. Hence, the total negative charge in the surface states, Q −ss , with band bending Vs > VF is:

$$ Q_{ss}^{ - } (V_{s} ) = - \int\limits_{{E_{0} }}^{{E_{C} }} {qN_{ss} (E)F(E)dE} \approx - \int\limits_{{E_{0} }}^{{E_{0} + q(V_{s} - V_{F} )}} {qN_{ss} (E)dE} $$
(2.32)

In Eq. 2.32, the full integral expression, which includes the Fermi–Dirac function, can be reduced to the simpler analytical form by using the zero Kelvin approximation, in which the acceptor states are negatively charged between the neutral level and the surface Fermi level, and neutral above the Fermi level. For a uniform distribution of acceptor states, Nss can be brought outside the integral, and the density of negatively charged states, when Vs > VF, is:

$$ Q_{ss}^{ - } (A) = - qN_{ss} q(V_{s} - V_{F} ) $$
(2.33)

Similarly, for Vs < VF (as shown in Fig. 2.10), the density of positively charged donor states is:

$$ Q_{ss}^{ + } (D) = qN_{ss} q(V_{F} - V_{s} ) $$
(2.34)

For a constant distribution of surface states, the zero Kelvin approximation is a useful simplification. However, for trapping state distributions where the density varies significantly over an energy interval of kT, it is less accurate, and a numerical evaluation of the full integral in Eq. 2.32 would be required. This issue is discussed further in Sect. 6.2.3, where the volume trap density in a-Si:H varies exponentially with position from the band edge.

As with the work function difference and the fixed oxide charge, a bias, VFB, will need to be applied to the gate to establish the flat band condition in the semiconductor, where VFB is given by:

$$ V_{FB} = - \frac{{Q_{ss} (D)(V_{s} = 0)}}{{C_{i} }} = - \frac{{qN_{ss} qV_{F} }}{{C_{i} }} $$
(2.35)

However, in contrast to the fixed oxide charge, the presence of interface states will give more than just a constant shift in the relationship between VG and Vs and Qs. In particular, as Vs is increased, not only does the gate bias need to induce the increasing value of Qs, but it must also supply the increasing charge going into the interface states. The relationship between VG and Vs from Eq. 2.22 is modified to be:

$$ V_{G} = V_{s} - \frac{{Q_{s} }}{{C_{i} }} - \frac{{Q_{ss}^{ + } (D)}}{{C_{i} }} - \frac{{Q_{ss}^{ - } (A)}}{{C_{i} }} $$
(2.36)

and, for the example being used, Qss(A) = 0 for Vs < VF, and Qss(D) = 0 for Vs > VF, and the non-zero values of Qss(A) and Qss(D) are negative and positive, respectively.

Figure 2.11a compares the relationship, between VG and Vs, for an ideal trap-free interface (Nss = 0) and an interface containing a range of Nss densities from 1 × 1010 cm−2 eV−1 to 1 × 1013 cm−2 eV−1. The lowest interface state density of 1010 cm−2 eV−1 is so low that the VG–Vs relationship is indistinguishable from the trap-free case. However, for the higher densities, increasingly large values of VG are required to achieve a given amount of band-bending due to the charge going into the interface states. The curves have a common crossing point at Vs = 0.288 V, when the surface Fermi level is at mid-gap. This corresponds to the neutral level of the interface states, so that all the interface state distributions have the same zero charge in them. The flat band voltages can also be directly read from the curves by the values of VG corresponding to Vs = 0 V.

Fig. 2.11
figure 11

Calculations using the uniform interface state distribution shown in Fig. 2.10 a variation of gate bias with surface potential, Vs, for different values of Nss, and b variation of zero gate bias band bending, Vs0, and Qss (at Vs0) with Nss. (Substrate acceptor density, Na = 1015 cm−3, qVF = 0.288 eV, tox = 150 nm, and interface state density, Nss = 1010–1013 cm−2 eV−1)

Full size image

The other parameter which can be extracted from these curves is the value of Vs when VG = 0, which is the equilibrium zero-gate-bias bend banding, Vs0, and these values, together with the corresponding values of Qss (at Vs0), are shown in Fig. 2.11b. The ‘S’-shaped curves demonstrate some simple physical principles of charge trapping over the range of Nss values used. For low Nss values, such as 1010 cm−2 eV−1, the Fermi level position at the surface is dominated by the substrate doping level, and the surface states have almost no effect. In this case, the Nss-induced band bending tends towards zero, and the interface states are ionised almost down to the position of the bulk Fermi level, and Qss ~ qNssqVF. Although a substantial fraction of the states are ionised, the charge in them is so low, that negligible band bending is required to produce an approximately equal amount of charge in the substrate. In contrast, for high Nss values, such as 1013 cm−2 eV−1, the band-bending is dominated by the charge in the surface states, and the Fermi level tends towards being pinned at the surface state neutral level, i.e. Vs0 ⇒ VF. In this case, VF−Vs0 = 0.01 V, and the surface state neutral level is just 100 meV above the Fermi level. However, with the large surface state density, this still corresponds to a substantial charge, Qss, in the fractionally ionised donor surface states. For intermediate values of Nss between 1011 and 1012 cm−2 eV−1, there is a progressive increase in Vs0 with Nss, and Qss is given by qNssq(VF−Vs0).

Equation 2.36 also shows that the charge going into surface states has to be allowed for in calculating the gate threshold voltage for surface inversion. The surface potential at which this occurs is still 2VF, but the gate bias, in excess of the flat band voltage, to achieve this surface potential is increased to:

$$ V_{T} = V_{FB} + \frac{{\sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} 2V_{F} } }}{{C_{i} }} + 2V_{F} + \frac{{Q_{ss} (V_{s} = 2V_{F} )}}{{C_{i} }} $$
(2.37)

and, as Qss(D) = 0 for Vs > VF, only charge in the acceptor states will contribute, and from Eq. 2.33, Qss(A) at inversion is given by:

$$ Q_{ss} (A) = qN_{ss} q(2V_{F} - V_{F} ) = qN_{ss} qV_{F} $$
(2.38a)

Finally, the effects of the work function difference, the dielectric charge and the charge in interface states are all independent and additive, so that, in the presence of all three, the flat band voltage is given by:

$$ {\text{V}}_{\text{FB}} = \Upphi_{\text{MS}} - {\text{ Q}}_{\text{ieff}} /{\text{C}}_{\text{i}} - {\text{ Q}}_{\text{ss}} \left( {{\text{V}}_{{{\text{s}}}} } = 0 \right) \, /{\text{C}}_{\text{i}} $$
(2.38b)

2.4 Evaluation of Surface Potential

From Eq. 2.9, the surface potential, Vs, uniquely defines the space charge density, Qs, and Eqs. 2.22 and 2.36 define the gate bias, VG, needed to achieve that potential, with and without surface states, respectively. Therefore, the measurement of Vs facilitates a quantitative insight into the state of a semiconductor surface. A common technique for establishing Vs is through the small signal capacitance-voltage measurement of an MIS diode, where the capacitance is given by:

$$ \begin{aligned} & C = \frac{{dQ_{G} }}{{dV_{G} }} = - \frac{{dQ_{s} }}{{dV_{G} }} = - \frac{{dV_{s} }}{{dV_{G} }}\frac{{dQ_{s} }}{{dV_{s} }} \\ & \frac{{dV_{G} }}{{dV_{s} }} = 1 - \frac{1}{{C_{i} }}\frac{{dQ_{s} }}{{dV_{s} }} \, \;{\text{and}}\; \, \frac{{dQ_{s} }}{{dV_{s} }} = - C_{s} \\ & \therefore \, C = 1/\left( {1/C_{i} + 1/C_{s} } \right) \\ \end{aligned} $$
(2.39)

In other words, the capacitance of the MIS diode is the series combination of the capacitance of the dielectric, Ci, and of the semiconductor surface, Cs, where Cs is given by the differentiation of Eq. 2.9:

$$ C_{s} = \frac{{\sqrt {n_{i} q\varepsilon_{0} \varepsilon_{s} } \left[ {\rm sh}q{\rm (V_{s} - V_{F} )/kT} + {\rm sh} q{\rm V_{F} /kT }\right]}}{{G(V_{s} ,V_{F} )}} $$
(2.40)

and G(Vs, VF) is given by Eq. 2.10. The normalised C–V curves resulting from the evaluation of Eq. 2.40, for a silicon substrate doped with 1015 and 1016 acceptors/cm3, and a gate oxide thickness of 150 nm, are shown by the solid lines in Fig. 2.12. These curves have a characteristic ‘V’ shape, with the capacitance at negative VG values tending towards the capacitance of the gate dielectric, due to the large capacitance of the hole accumulation layer. With increasing positive VG, the capacitance falls due to the growth of the hole depletion region at the surface, which progressively reduces the surface capacitance. Finally, the curves start to rise as the surface becomes strongly inverted, and the large free electron concentration screens the underlying depletion layer, with the total capacitance once again tending towards the value of the gate dielectric.

Fig. 2.12
figure 12

Normalised high and low frequency MIS C–V curves (calculated for 150 nm thick SiO2 gate dielectric)

Full size image

As these curves have been calculated for an ideal MIS diode, the energy bands will be flat at VG = 0, and, hence, the normalised capacitance at flat bands can be directly obtained from the curves. Given the unique relationship between surface potential and capacitance, the flat band voltage can, in principle, be directly obtained from any experimental C–V measurement using Eq. 2.40, assuming that the substrate doping level is known. Moreover, the minimum capacitance is also a unique function of doping level and dielectric capacitance, so that the doping level can be extracted from the minimum of the experimental C–V curve. The normalised flat band and minimum capacitance values from Fig. 2.12 are listed in Table 2.2, and they have also been extensively tabulated by Sze and Ng [1]. Also marked on the curves in Fig. 2.12 are the capacitance values at which the band bending gives an intrinsic surface (Vs = VF), and the threshold for an inverted surface (Vs = 2VF).

Table 2.2 Relationship between normalised flat band capacitance, minimum C–V capacitance and substrate doping level (for 150 nm SiO2 gate dielectric)
Full size table

The solid line calculations assume thermal equilibrium, and the increase in capacitance in inversion will only be observed experimentally if the free electrons in the inversion layer can follow the a.c. measuring signal. In a high quality Si/SiO2 capacitor, the inversion layer response time can be of the order of seconds, or more [6], as it depends upon a thermal generation process within the surface space charge region. Hence, the calculated curves are only likely to be replicated with a low frequency measurement, and the solid line curves in Fig. 2.12 are often referred to as low frequency C–V curves. Moreover, in the presence of interface states, there can be a further complication in the interpretation of the experimental low frequency curves. This will arise if the occupancy of the interface states at the Fermi level can follow the measuring signal, and, hence, contribute an interface state capacitance, Css, in parallel with the semiconductor surface capacitance Cs. The surface state capacitance, Css, is given by:

$$ C_{ss} = - \frac{{dQ_{ss} }}{{dV_{s} }}\sim qN_{ss} $$
(2.41)

where, as discussed in the previous section, Qss can be approximated by qNssq(Vs−VF) for constant (or slowly varying) surface state densities. The presence of Css in an experimental C–V measurement means that Eq. 2.40 can no longer be used to give a unique relationship between measured capacitance and band bending, Vs. By implication, a high frequency measurement can be used to minimise the capacitive contributions of the surface states, and will also suppress the free electron capacitance in strong inversion. Hence, to interpret the high frequency C–V curves, a high frequency version of Eq. 2.40 is required. This essentially means suppressing the electron response in inversion, and this can be accomplished by expanding the cosh and sinh terms containing Vs, and setting to zero those of the form expq(Vs−VF)/kT, since, in inversion, Vs > VF and those terms will govern the electron contribution to the surface capacitance. Hence the high frequency expression, Cs(HF) is given by:

$$ C_{s} = \frac{{\sqrt {n_{i} q\varepsilon_{0} \varepsilon_{s} } \left[ { - 0.5\exp - q(V_{s} - V_{F} )/kT} + {\rm sh}q{\rm V_{F} /kT} \right]}}{{G'(V_{s} ,V_{F} )}} $$
(2.42)

and G′(Vs,VF) is given by:

$$ G'(V_{s} ,V_{F} ) = \mp \sqrt {\left[ {0.5\frac{kT}{q}\exp \frac{{q(V_{F} - V_{s} )}}{kT} - \frac{kT}{q}ch\frac{{qV_{F} }}{kT} + V_{s} \rm{sh}\frac{{qV_{F} }}{kT}} \right]}^{{}} $$
(2.43)

The high frequency C–V curve, calculated from Eq. 2.42, for qVs > 3kT, is shown by the dotted lines in Fig. 2.12. The inversion layer response has been suppressed, and the surface capacitance in inversion tends to a constant value, approximately given by:

$$ C_{s(HF)} = \frac{{\varepsilon_{0} \varepsilon_{s} }}{{x_{d(\hbox{max} )} }} $$
(2.44)

Where xd(max) is the limiting maximum thickness of the surface depletion region, as discussed in Sect. 2.2.1, and is given by Eq. 2.18. As with the minimum capacitance value of the low frequency curves, the minimum value of the high frequency curves is also a unique function of doping level, and can be used to establish the doping level in experimental samples. These values are also shown in Table 2.2. More importantly, any horizontal displacement, ΔVG, of an experimental C–V curve from the theoretical C–V curve can be used to establish Qss, as a function of Vs, from:

$$ {\text{Q}}_{\text{ss}} \left( {{\text{V}}_{\text{s}} } \right) \, = \Updelta {\text{V}}_{\text{G}} /{\text{C}}_{\text{i}} $$
(2.45)

and Nss can then be derived from dQss/dVs.

Whilst the emphasis in this section has been on high frequency measurements, and the use of the measured MISC capacitance to establish surface potential, there is also a low frequency procedure, called the quasi-static C–V measurement, which uses the change in capacitance, at a given value of VG, to determine Nss [7, 8]. Finally, to complete this section, one other well-established technique for the evaluation of surface state densities should be mentioned, and this is the a.c conductance measurement of MISCs [9]. A detailed overview of these procedures can be found in Sze and Ng [1].

3 Electron-Hole Pair Generation and Recombination

Electron-hole pair generation and recombination are fundamental semiconductor processes relevant to both off-state leakage currents and to steady-state photo-currents in TFTs.

Two sources of leakage current in semiconductor devices are by ohmic conduction in lightly conducting and/or low generation lifetime material, or by electron-hole pair generation and/or diffusion current flow in reverse biased junctions. The latter processes are illustrated in Fig. 2.13a for a reverse biased n+p junction. Due to the field within the space charge region, the holes generated within this region are swept into the p-type substrate, where they constitute an ohmic (drift) hole current to the substrate contact, Idrift. Equally, the electrons generated in the space charge layer are swept into the n+ region, where they flow to the n+ contact. For current continuity, there will be equal hole and electron currents, and these are referred to as generation currents. The electron-hole pair generation process, from a deep lying centre within the forbidden band gap, is shown schematically in Fig. 2.13b. In addition to the direct generation process, there is also a diffusion current, Idiffn, of minority carrier electrons from the neutral p-type substrate into the adjacent depletion region.

Fig. 2.13
figure 13

Illustration of a reverse biased n+-p junction, showing generation and diffusion leakage currents, and b e–h pair thermal generation process

Full size image

The role of electron-hole pair generation on leakage currents, including the diffusion current, is discussed in Sect. 2.3.3, and the recombination processes are presented in Sect. 2.3.4.

In order to develop the expressions for electron-hole pair generation and recombination, it is necessary to consider the basic processes of carrier emission and carrier capture by a deep level centre, based upon the Shockley, Read, Hall (SRH) recombination statistics [10, 11], and the extension of this analysis to p–n junction characteristics [12].

The term deep level centre refers to intrinsic or extrinsic defects having energy levels within the forbidden band gap of the semiconductor, and which are usually further from the band edges than the shallow level dopant impurities. A deep level centre can behave as a trap, or as a generation centre, or as a recombination centre, depending upon its environment. For instance, in thermal equilibrium, a deep level acceptor in n-type material can capture electrons, thereby, reducing the free carrier density, and is acting as trap.Footnote 3 In a reverse biased space charge region, it can act as a generation centre, sequentially emitting electrons and holes, resulting in a reverse bias leakage current. Or, in material subject to electron-hole pair injection, it can act as a recombination centre, where the sequential electron and hole capture process establishes the steady-state free carrier density under the injection conditions. Hence, all three terms are often used interchangeably to refer to the same deep level centre, and, for brevity, the term trap is used as the generic term for the centre in this section.

3.1 Thermal Equilibrium

For a deep level centre within the semiconductor’s forbidden band gap, four carrier transitions can be identified, as shown in Fig. 2.14. If the trap is an acceptor level, it has two charge states, one of which is negatively charged when it is occupied by an electron, and the other is neutral when it is empty of the electron (These two charge states can be equivalently described in terms of hole occupancy, which are empty and filled, respectively. The same transitions will occur from a deep donor centre, the only difference being that it is positively charged when empty of an electron and neutral when occupied by an electron). Hence, there is a pair of possible carrier transitions from each of the two charge states, as shown in Fig. 2.14. From the negatively charged acceptor centre, these are either (a): electron emission to the conduction band, by a thermally stimulated process, or (d): hole capture from the valence band, and the release of phonon energy back to the lattice. Both leave behind the neutral centre. From the neutral centre, the two possible transitions are (b): electron capture from the conduction band, or (c): thermally stimulated hole emission to the valence band (which is equivalent to electron emission from the valence band). Both leave behind the negatively charged centre.

Fig. 2.14
figure 14

Carrier emission and capture processes from a deep level centre in the forbidden band gap: a electron emission, b electron capture, c hole emission d hole capture. The horizontal block arrow shows the state’s occupancy after the transition

Full size image

If the density of traps/generation/recombination centres is NT, and if the centre and the Fermi level are positioned at ET and EF, respectively, above the valence band edge, then the trap occupancy is defined by the Fermi–Dirac distribution function, and from this the carrier transition rates can be calculated. These rates are determined by the number of free carriers and the appropriate occupancy of the centre, for the capture process, or just by the occupancy of the centre for the emission process (where it is implicitly assumed that there are sufficient empty states in the bands to accommodate the emitted carriers). In thermal equilibrium, the fractional electron occupancy of the trap, FD(ET, EF), is given by the Fermi–Dirac distribution function:

$$ F_{D} = \frac{1}{{1 + \exp (E_{T} - E_{F} )/kT}} $$
(2.46)

The free carrier densities, n0 and p0, in n-type material doped with Nd donors, are given byFootnote 4:

$$ n_{0} + N_{T}^{ - } = N_{d} = N_{C} \exp - (E_{C} - E_{F} )/kT,p_{0} = N_{V} \exp - E_{F} /kT $$
(2.47)
$$ {\text{and}}\;n_{0} p_{0} = n_{i}^{2} $$
(2.48)

The electron emission rate, Ree is:

$$ R_{ee} = e_{n} N_{T}^{ - } = e_{n} N_{T} F_{D} $$
(2.49)

where en is the electron emission rate constant. Similarly, the rate of hole emission, Rhe, is:

$$ R_{he} = e_{p} N_{T}^{0} = e_{p} N_{T} (1 - F_{D} ) $$
(2.50)

where ep is the hole emission rate constant. The rates of electron capture, Rec, and hole capture, Rhc, are:

$$ R_{ec} = c_{n} n_{0} N_{T}^{0} = \sigma_{n} v_{th} n_{0} N_{T} (1 - F_{D} ) $$
(2.51)
$$ R_{hc} = c_{p} p_{0} N_{T}^{ - } = \sigma_{p} v_{th} p_{0} N_{T} F_{D} $$
(2.52)

where the electron and hole capture rate constants, cn and cp, are given by the product of the trap’s capture cross section, σn and σp, respectively, and the carrier’s thermal velocity, vth. The thermal velocity is √(3kT/qm*), where m* is the effective mass, so that the thermal velocities for holes and electrons are different from each other. However, for simplicity in this analysis, they are taken to be the same.

In thermal equilibrium, the rate of electron capture must equal the rate of electron emission, and the equivalent equality must also exist for the hole transitions. Hence,

$$ e_{n} N_{T} F_{D} = \sigma_{n} v_{th} n_{0} N_{T} (1 - F_{D} ) $$
(2.53)

And substituting for FD and n0, using Eqs. 2.46 and 2.47, respectively:

$$ e_{n} = \sigma_{n} v_{th} N_{C} \exp - (E_{C} - E_{T} )/kT $$
(2.54)

Similarly, for the hole transitions:

$$ e_{p} = \sigma_{p} v_{th} N_{V} \exp - E_{T} /kT $$
(2.55)

Hence, the thermal emission rate constants, en and ep, are fundamental properties of the trap itself, and not dependent on the local concentrations of carriers. Moreover, their values are exponentially dependent upon the separation of the trap from the band edges.

3.2 Non-equilibrium, Steady State

Under steady state, non-thermal equilibrium conditions (where \( np \ne n_{i}^{2} \)), the trap will achieve a new occupancy, described by its quasi-Fermi level, and determined by the equality of the net electron transition rate and the net hole transition rate,Footnote 5 i.e.

$$ \frac{{dN_{T}^{ - } }}{dt} = R_{ec} - R_{ee} + R_{he} - R_{hc} = 0 $$
(2.56)

In contrast to the thermal equilibrium situation, the rates of electron emission and electron capture will not be equal. This is the situation in which there will be a net recombination or a net generation process, depending upon the divergence of the carrier concentrations from their thermal equilibrium values. Substituting the rate constants into Eq. 2.56 gives:

$$ nc_{n} N_{T}^{0} - e_{n} N_{T}^{ - } = pc_{p} N_{T}^{ - } - e_{p} N_{T}^{0} $$
(2.57)

From Eq. 2.57, and using \( N_{T}^{0} = N_{T} - N_{T}^{ - } \), the hole occupancy is:

$$ N_{T}^{0} = \frac{{N_{T} (e_{n} + pc_{p} )}}{{nc_{n} + pc_{p} + e_{n} + e_{p} }} $$
(2.58)

This can be used to calculate the net local electron generation/recombination rate, RGR, which, in steady state, will also be equal to the net hole recombination/generation rate, i.e.:

$$ R_{GR} = R_{ee} - R_{ec} = N_{T}^{ - } e_{n} - nc_{n} N_{T}^{0} $$
(2.59)

Substituting for the trap occupancy terms:

$$ R_{GR} = \frac{{N_{T} (e_{n} e_{p} - npc_{n} c_{p} )}}{{nc_{n} + pc_{p} + e_{n} + e_{p} }} $$
(2.60)
$$ R_{GR} = \frac{{\sigma_{n} \sigma_{p} v_{th} N_{T} [\{ N_{C} .N_{V} \exp - (E_{C} - E_{T} )/kT.\exp - E_{T} /kT\} - np]}}{{\sigma_{n} (n + N_{C} \exp - (E_{C} - E_{T} )/kT) + \sigma_{p} (p + N_{V} \exp - E_{T} /kT)}} $$
(2.61)

Eliminating the exponential terms in ET in the numerator, and replacing the remaining exponential term by \( n_{i}^{2} , \) gives the following expression:

$$ R_{GR} = \frac{{\sigma_{n} \sigma_{p} v_{th} N_{T} [n_{i}^{2} - np]}}{{\sigma_{n} (n + N_{C} \exp - (E_{C} - E_{T} )/kT) + \sigma_{p} (p + N_{V} \exp - E_{T} /kT)}} $$
(2.62)

The numerator shows that the rate of recombination/generation is proportional to the term \( (n_{i}^{2} - np) \), which expresses the deviation of the carrier population from thermal equilibrium. For np > n 2i , the free carrier excess stimulates a net recombination process, where the carrier excess could result, for example, from optical illumination of the device, the forward biasing of a p–n junction or avalanche generation at a reverse biased p-n junction. For np < n 2i , the free carrier deficit gives rise to net generation, and the free carrier deficit is most commonly encountered in the depletion region of a reverse biased p–n junction. In thermal equilibrium, the net rates of recombination or generation are zero.

Equation 2.60 (or its equivalents 2.61 or 2.62) would be typically used in device simulation packages to calculate the local rates of recombination or generation, but, for analytical work, a simplified version of this expression is often used by making the simplifying assumption that σn = σp = σ, and:

$$ R_{GR} = \frac{{\sigma v_{th} N_{T} [n_{i}^{2} - np]}}{{n + p + 2n_{i} cosh(E_{T} - E_{i} )kT}} $$
(2.63)

where the following substitutions have been used for NC and NV in the denominator:

$$ n_{i} = N_{C} \exp - (E_{C} - E_{i} )/kT = N_{V} \exp - E_{i} /kT $$
(2.64)

3.3 Generation Currents

As mentioned above, the general treatment of generation or recombination is fully specified by the use of Eq. 2.60, and, in this section, an approximate, but more accessible, analytical treatment is presented for describing generation currents. For instance, in the space charge layer of a reverse biased junction, as shown in Fig. 2.13a, the free carrier concentrations can be taken as zero, so that there are no carrier capture processes, and Eq. 2.60 reduces to an expression for the local, steady state generation rate, RG:

$$ R_{G} = \frac{{N_{T} e_{n} e_{p} }}{{e_{n} + e_{p} }} $$
(2.65)

The steady state leakage current, JR, due electron-hole pair generation, in a reverse biased p-n junction depletion layer of width W is:

$$ J_{R} = q\int\limits_{0}^{W} {R_{G} dx} = qR_{G} W = qWN_{T} \frac{{e_{n} e_{p} }}{{e_{n} + e_{p} }} $$
(2.66)

Where it is assumed that RG is constant across W, and, in analogy with Eq. 2.18, W is given by:

$$ W = \sqrt {\frac{{2\varepsilon_{0} \varepsilon_{s} (V_{R} + V_{0} )}}{{qN_{a} }}} $$
(2.67)

VR is the reverse bias, and V0 is the built-in p–n junction potential.

Returning to Eq. 2.66, the ratio enep/(en + ep) is a maximum when the denominator is a minimum, which will occur when en = ep, and the traps are sited close to mid-gap. As ET moves away from mid-gap either en or ep will increase exponentially, as will the sum en + ep, whilst the product enep will be invariant. Hence, any centres located at mid-gap are likely to be the most efficient generation centres, and will dominate the device leakage current, JR. For mid-gap centres, with equal capture cross sections, σ:

$$ e_{n} = e_{p} = \sigma v_{th} N_{C} \exp - E_{i} /kT = \sigma v_{th} n_{i} $$
(2.68)
$$ \therefore \, J_{R} = qR_{G} W = 0.5qn_{i} W\sigma v_{th} N_{T} $$
(2.69)

The generation lifetime, τg, is a figure of merit for the leakage current, and is defined by the following relationship:

$$ \, J_{R} \equiv qn_{i} W/\tau_{g} $$
(2.70)

Hence, for mid-gap centres, the generation lifetime is:

$$ \tau_{\text{g}} = { 1}/(0. 5 {\text{N}}_{\text{T}} \sigma {\text{v}}_{\text{th}} ) $$
(2.71a)

If the capture cross-sections are not equal:

$$ \tau_{\text{g}} = { 1}/({\text{N}}_{\text{T}} \sigma_{\text{n}} {\text{v}}_{\text{th}} ) \, + { 1}/({\text{N}}_{\text{T}} \sigma_{\text{p}} {\text{v}}_{\text{th}} ) $$
(2.71b)

Equation 2.71b explicitly shows that the rate of the two-stage generation process is determined by the sequential emission of holes and electrons, and, if one capture cross-section is larger than the other, then the overall generation process will be rate limited by carrier emission from the charge state of the centre having the smaller cross-section. In experimental samples, this difference in capture cross-sections is likely to be found. For example, if the trap is an acceptor, then it will be neutral before capturing an electron, and negatively charged before capturing a hole. The Coulombic attraction between the hole and the negatively charged centre will result in the hole capture cross-section being larger than the neutral cross-section for electron capture [13]. As an example of this, one of the most widely studied deep level centres in silicon is gold, which has a near mid-gap acceptor level at 0.54 eV below the conduction band edge, and its capture cross-sections are 1.5 × 10−14 cm2 and 9 × 10−17 cm2, for holes and electrons, respectively [14]. In this case, Eq. 2.71b would be more appropriate than 2.71a for calculating the generation lifetime. In both cases, the generation lifetime is inversely proportional to the number of generation centres, and, as would be expected, the leakage current is proportional to this density.

However, if the only deep level centres are off mid-gap by more than a few kT, then, for those in the upper half of the band gap, en ≫ ep (and en ≪ ep if they are in the lower half). Taking, for example, a centre in the upper half of the band-gap, Eq. 2.66 reduces to:

$$ J_{R} = qWN_{T} e_{p} $$
(2.72)

and the leakage current is limited by just the smaller of the two emission rate constants (in this case ep), because, once the hole has been emitted, the following step of electron emission is so much faster that it has a negligible impact upon the overall two stage emission process. Expanding ep:

$$ J_{R} = qWN_{T} \sigma_{p} v_{th} n_{i} \exp - (E_{T} - E_{i} )/kT $$
(2.73)
$$ \therefore \, \tau_{g} = 1 /N_{T} \sigma_{p} v_{th} \exp - (E_{T} - E_{i} )/kT = 1 /N_{T(eff)} \sigma_{p} v_{th} $$
(2.74)

\( {\text{N}}_{{{\text{T}}({\text{eff}})}} = {\text{ N}}_{\text{T}} { \exp } - \left( {{\text{E}}_{\text{T}} - {\text{E}}_{\text{i}} } \right)/{\text{kT}} \), and is the equivalent number of mid-gap centres, which would give the same leakage current. Hence, the shift in position of a generation centre from mid-gap increases the generation lifetime by exp(ET−Ei)/kT, and decreases the leakage current by the same amount.

In summary, the reverse bias p–n junction leakage current is characterised by the generation lifetime, τg, which is related to the physical characteristics of the deep level generation centres themselves.

The other contribution to junction leakage current is the flow of minority carriers, into the reverse biased space region, from the adjacent neutral material. In an n+p junction, this will be electrons from the p-type substrate, and those adjacent to the space charge region will be swept through it, and into the n+-region. This leaves a deficit of electrons at the depletion region edge, which establishes a local minority carrier concentration profile, thereby, driving a diffusion current, Jdiffn. As the ohmic contact to the p-type substrate cannot readily supply electrons, they need to be generated within the material by thermal generation, and the diffusion current is determined by the generation lifetime, and is given by [4]:

$$ J_{diffn} = qn_{p} \sqrt {D_{n} /\tau_{g} } $$
(2.75)

Where np is the equilibrium electron concentration in the p-type substrate (=p0/n 2i ), and Dn is the electron diffusion coefficient (=kTμn/q). A significant difference between the diffusion current and the generation current (Eq. 2.70) is that the diffusion current is not a function of the reverse bias voltage.

The treatment in this section has been limited to basic thermal emission processes, and these are directly used in the discussion of TFT leakage currents in Sect. 8.4. In Sect. 8.5.3, the treatment is extended to include field-enhanced emission processes.

3.4 Recombination Processes

Recombination will occur in response to a steady state carrier injection process (such as above band-gap optical illumination), where the injection results in an increase of the free carrier concentration above the thermal equilibrium values. The steady state carrier concentrations are given by the equality:

$$ {\text{R}}_{\text{inj}} = {\text{ R}}_{\text{R}} $$
(2.76)

Where Rinj is the injection rate, and RR is the recombination rate given by Eq. 2.60 (or the equivalent Eqs. 2.61 and 2.62). As with the generation process, it is useful to simplify these equations to more physically meaningful forms. For charge neutrality, the injection process will result in an equality of the change in trap occupancy, and in the steady state excess densities of both holes and electrons, given by Δp and Δn, respectively. Where p = p0 + Δp, and n = n0 + Δn, and p0 and n0 are the thermal equilibrium carrier densities, and n0p0 = n 2i .

As with the discussion in the preceding sections, an n-type substrate is assumed, and, depending upon the relative values of Δp and n0, two different injection conditions are identified. When Δp ≪ n0, this is regarded as low-level injection, and when Δp ≥ n0 this is defined as high-level injection.

3.4.1 Low-Level Injection

Consider an n-type substrate, with low-level injection, meaning that Δp ≪ n0, so that n ~ n0. The low-level recombination lifetime, τR, is defined by:

$$ {\text{R}}_{\text{R}} \equiv \Updelta {\text{p}}/\tau_{\text{R}} $$
(2.77)

An examination of the physical recombination process will illustrate how Eq. 2.60 can be simplified to yield a more tractable expression for the recombination lifetime. Under low-level injection, the change in the free electron concentration is so small that the equilibrium Fermi level can still be used to describe the electron concentration. Hence, all trap levels beneath the Fermi level are filled with electrons, and ready to trap a hole as the first stage in the two-stage recombination process. Having captured a hole, with the rate constant cp(p0 + Δp), the subsequent electron capture will proceed with the rate constant cnn0, which, given that n0 ≫ (p0 + Δp), will be a much faster process, and will not rate limit the overall recombination process. The only other consideration is whether the hole could be thermally emitted back into the valence band before the electron capture process has been completed. For the electron capture rate to exceed the hole emission rate, we need cnn0 > ep, i.e.:

$$ c_{n} N_{C} \exp - (E_{C} - E_{F} )/kT > c_{p} N_{V} \exp - E_{T} /kT $$
(2.78)
$$ {\text{i}}.{\text{e}}.\;E_{T} > (E_{C} - E_{F} ) + kT\ln (c_{p} N_{V} /c_{n} N_{C} ) $$
(2.79)

Taking the logarithmic term in Eq. 2.79 to be smaller than EC−EF, Eq. 2.79 simply shows that, for efficient electron capture, the trap level must be further from the valence band edge than the Fermi level is from the conduction band edge. In other words, providing the trap level, ET, is positioned somewhere between the Fermi level and an equivalent distance from the valence band edge, the recombination process will be limited just by hole capture. Replacing n and p in Eq. 2.62:

$$ R_{R} = \frac{{ - \sigma_{n} \sigma_{p} v_{{_{th} }}^{2} N_{T} n_{0} \Updelta p}}{{c_{n} n_{0} + e_{n} + c_{p} (p_{0} + \Updelta p) + e_{p} }} $$
(2.80)

From the above discussion, for EF > ET > EC−EF, then cnno > en, ep, and cp(p0 + Δp), and Eq. 2.80 reduces to:

$$ R_{R} = - \sigma_{p} v_{th} N_{T} \Updelta p \equiv \Updelta p/\tau_{R} $$
(2.81)
$$ {\text{and}}\;\tau_{R} = 1/\sigma_{p} v_{th} N_{T} $$
(2.82)

In other words, the recombination lifetime is a function of the trap state density, NT, and the hole capture cross-section, and is independent of the trap energy level over a substantial fraction of the band gap (as defined above). Equation 2.82 is similar to the generation lifetime for a mid-gap generation centre (Eq. 2.71), but, in contrast to the recombination lifetime, once ET is more than a few kT from mid-gap, the generation lifetime increases substantially (as shown by Eq. 2.74). Therefore, except in the special case of a mid-gap centre, the steady state generation and recombination lifetimes can be substantially different.

When ET lies outside the range prescribed for Eq. 2.81, the recombination lifetime will increase. If ET > EF, then the traps will be largely empty of electrons, and the number of traps available for hole capture will be low. In this situation, en > cnn0, and Eq. 2.80 becomes:

$$ R_{R} \approx \frac{{ - \sigma_{n} \sigma_{p} v_{th}^{2} N_{T} n_{0} \Updelta p}}{{e_{n} }} = - \sigma_{p} v_{th} N_{T} \Updelta p\exp (E_{F} - E_{T} )/kT $$
(2.83)
$$ {\text{and}}\;\tau_{R} = \exp \{ (E_{T} - E_{F} )/kT\} /\sigma_{p} v_{th} N_{T} \quad \quad \quad \left( {{\text{for}}\;{\text{ E}}_{\text{T}} > {\text{E}}_{\text{F}} } \right) $$
(2.84)

Hence, as ET rises above EF, the lifetime is larger than that given by Eq. 2.82, and it increases exponentially with increasing values of ET.

Similarly, if the separation of ET from the valence band edge is smaller than the value of (EC − EF), then ep will exceed cnn0, and, from Eq. 2.80, the recombination lifetime will be:

$$ \tau_{R} = \frac{{N_{V} \exp (E_{C} - E_{F} - E_{T} )/kT}}{{N_{C} \sigma_{n} v_{th} N_{T} }}\quad \quad \quad \left( {{\text{for}}\;{\text{ E}}_{\text{T}} \le {\text{ E}}_{\text{C}} - {\text{E}}_{\text{F}} } \right) $$
(2.85)

In other words, as the trap level gets closer to the valence band edge, and ET reduces, the lifetime exponentially increases, but is now controlled by the capture cross section for electrons, rather than for holes, as it has been in the previous cases.

3.4.2 High-Level Injection

As with low-level injection, the recombination process is described by the general Eq. 2.60 (or its equivalents), and to reduce these to a simpler form, the high-level injection situation of Δp ≫ n0 is considered. In this case, if Δp ≫ NT, then charge neutrality will be determined just by equality in the excess free carrier densities, i.e. n = p = Δp = Δn, and the equilibrium Fermi level splits into separate quasi-Fermi levels, EFp and EFn, for holes and electrons, respectively, where the quasi-Fermi levels are given by:

$$ {\text{p }} = {\text{ N}}_{\text{V}} { \exp } - {\text{ E}}_{\text{Fp}} /{\text{kT }}\;{\text{and}}\;{\text{ n}} = {\text{ N}}_{\text{C}} { \exp } - \left( {{\text{E}}_{\text{C}} - {\text{ E}}_{\text{Fn}} } \right)/{\text{kT}} $$
(2.86)

If the recombination centre is sited between the quasi-Fermi levels, such that EFp < ET < EFn, then ncn > en and pcp > ep, and the steady state recombination centre occupancy can be obtained from Eq. 2.58:

$$ N_{T}^{0} = \frac{{N_{T} \sigma_{p} }}{{\sigma_{n} + \sigma_{p} }} \equiv N_{T} (1 - F_{D} ) $$
(2.87)

FD is the centre’s Fermi-Dirac function, given by Eq. 2.46, in which the equilibrium Fermi level, EF, is replaced by the quasi-Fermi level for the recombination centre, EFT. For the special case of equal capture cross sections, FD = 0.5, and the quasi-Fermi level for the recombination centre is located at ET.

For the recombination centre located between the hole and electron quasi-Fermi levels, the recombination lifetime, τR, can be calculated from Eqs. 2.60 and 2.77:

$$ R_{R} = \frac{{N_{T} (e_{n} e_{p} - npc_{n} c_{p} )}}{{nc_{n} + pc_{p} + e_{n} + e_{p} }} \approx - \frac{{N_{T} \Updelta p^{2} c_{n} c_{p} }}{{\Updelta pc_{n} + \Updelta pc_{p} }} \equiv \frac{\Updelta p}{{\tau_{R} }} $$
(2.88)

and

$$ \tau_{R} = 1/\sigma_{p} v_{th} N_{T} + 1/\sigma_{n} v_{th} N_{T} $$
(2.89)

Hence, the difference between the low-injection and high-injection lifetimes is that, at high-injection, the lifetime explicitly accounts for the two-stage electron and hole capture process, and the lifetime is correspondingly longer. This is due to the equal densities of holes and electrons. In contrast, the low-injection lifetime was determined just by hole capture, due to the more rapid electron capture process resulting from the much higher majority carrier density of electrons.Footnote 6

As with low-level injection, once the recombination level is outside the energy interval bracketed by the carrier quasi-Fermi levels, the lifetime will increase exponentially with this separation.

4 Current Flow Equations

The purpose of this section is to introduce the concepts underlying the modelling of current flow in semiconductor devices, so that the reader has an appreciation of the equations used in device simulation packages. As explained in the introduction, the numerical techniques used to solve these equations are beyond the scope of this book, and further information on device simulation can be found in Refs. [2] and [3].

To establish the basic equations, one-dimensional flow will be considered initially, and then extended to show the form used in 2-D or 3-D simulation programmes.

For current flow by carrier drift and diffusion, the total current density, JT, is given by the sum of the electron, Jn, and hole, Jp, drift/diffusion currents [1]:

$$ {\text{J}}_{\text{T}} = {\text{ J}}_{\text{n}} + {\text{ J}}_{\text{p}} $$
(2.90)
$$ J_{n} = q\mu_{n} nF + qD_{n} \frac{\partial n}{\partial x} $$
(2.91)
$$ J_{p} = q\mu_{p} pF - qD_{p} \frac{\partial p}{\partial x} $$
(2.92)

Where F is the field, μ is the carrier mobility, n and p are the free carrier densities, and D is the diffusion coefficient. These are essentially low field equations, because, as discussed below, at high fields, carrier velocity saturation can occur [15], requiring the μF product to be replaced by the appropriate high field velocity. In Eqs. 2.91 and 2.92, the first term describes the flow of carriers under the influence of an internal field, which would result from an externally applied bias, and the second term is the carrier flow by diffusion resulting from a non-uniform carrier distribution.

The continuity equation links these equations to local generation and recombination processes by:

$$ \frac{\partial n}{\partial t} = G_{n} - R_{GR} + \frac{{\partial J_{n} }}{q\partial x} $$
(2.93)
$$ \frac{\partial p}{\partial t} = G_{p} - R_{GR} - \frac{{\partial J_{p} }}{q\partial x} $$
(2.94)

These equations show that the local rate of change of carrier concentration, within a given volume of material, is determined by the difference in the external carrier generation rate, G, and the internal recombination rate, RGR, plus the difference in the carrier flow into and out of the volume. In steady state, the local carrier concentrations are constant, and Eqs. 2.93 and 2.94 are equal to zero. The internal recombination/generation rate, RGR, is given by Eq. 2.60 from Sect. 2.3.2, and the external generation rate, G, could be due to optical absorption of above band-gap light. In this case, the local optical generation rate, GO is:

$$ G_{o} (z) = \alpha \Upphi (1 - R)\exp - \alpha z $$
(2.95)

Where α is the optical absorption coefficient, Φ is the incident photon flux, R is the surface reflectivity, and z is the distance in the material perpendicular to the illuminated surface.Footnote 7

Another potential source of carrier generation is high-field generation of electron-hole pairs by impact ionisation. This is also referred to as avalanche generation, since the generated carriers will also be accelerated by the field, and produce further carriers by impact ionisation themselves. This is most likely to occur with high carrier mobility semiconductors, and in high field regions of devices, such as reverse biased junctions. Where the carrier mobility is low, due to short mean free paths and efficient scattering, the carrier is unlikely to gain enough energy from the field. However, where the mean free path is large, the carriers can be efficiently accelerated and heated by the field. If the carriers attain sufficient energy, then lattice collisions can lead to electron-hole pair generation. The impact ionisation generation rate, GII, is given by [1]:

$$ G_{II} = nv_{n} \alpha_{n} + pv_{p} \alpha_{p} $$
(2.96)

Where vn (vp) is the electron (hole) drift velocity, αn (αp) is the electron (hole) ionisation coefficient, and:

$$ \alpha_{n,p} = \frac{qF}{{E_{I} }}\exp - \frac{{F_{C} }}{F} $$
(2.97)

FC is the critical field, F is the field parallel to current flow, and EI is the carrier ionisation energy (for Si this is 3.6 eV for electrons and 5.0 eV for holes). A simpler expression [16] has also been used in simulations of TFTs [17], where the ionisation coefficient is:

$$ \alpha_{n,p} = \alpha_{n,p}^{\infty } \exp - \frac{{F_{C} }}{F} $$
(2.98)

and α∞ is a constant, which is determined, together with FC, from simulation fits.

The carrier velocity, in Eq. 2.96, at low fields, is given by μ0F, where μ0 is the low field mobility. At high fields, velocity saturation occurs, and the following relationship between velocity and field was found to provide a good fit to the experimental c-Si data shown in Fig. 2.15 [15]:

$$ v_{n,p} = \frac{{\mu_{0} F}}{{\left[ {1 + (\mu_{0} F/v_{S} )^{\beta } } \right]^{1/\beta } }} $$
(2.99)
Fig. 2.15
figure 15

Carrier velocity measurements as a function of the electric field in silicon. The solid line is the empirical fit to Eq. 2.99 (Reprinted from [15] with permission of IEEE)

Full size image

Where vS is the saturated velocity (~107 cm/s for holes and electrons in Si), and β is a constant (~2 for electrons and ~1 for holes in Si).

Equations 2.90–2.94 contain the electrostatic field, F, which is the local gradient of the potential, dV/dx, and this has to be established in a self-consistent fashion by the simultaneous solution of Poisson’s equation:

$$ \frac{{d^{2} V}}{{dx^{2} }} = - \frac{q\rho (x)}{{\varepsilon_{0} \varepsilon_{s} }} $$
(2.100)
$$ {\text{and}}\;\rho = p - n + N_{d} - N_{a} + N_{Td}^{ + } - N_{Ta}^{ - } $$
(2.101)

where Nd and Na are shallow donor and acceptor dopants, and NTa and NTd are deep acceptor and donor defects, respectively. For a TFT, the deep levels could equally well refer to a distribution of defect levels across the band-gap.

The above equations have been presented, for simplicity, in a 1-D format, but, for accurate device simulation, these equations need to be solved in two or three dimensions. In that case, the coupled equations in steady state are [18]:

$$ \begin{aligned} \nabla .\nabla V &= - q\rho /\varepsilon_{0} \varepsilon_{s} \\ \nabla .J_{n} &= - q(G_{n} - R_{GR} ) \\ \nabla .J_{p} &= q(G_{p} - R_{GR} ) \\ J_{n} &= - qn\mu_{n} \nabla V + qD_{n} \nabla n \\ J_{p} &= - qp\mu_{p} \nabla V - qD_{p} \nabla p \\ \end{aligned} $$
(2.102)

These are solved subject to a set of boundary conditions determined by the biases applied to the device terminals, the field continuity conditions across internal material boundaries (such as the semiconductor/dielectric interface), and the conditions at the external boundaries of the device, where, for instance, the field may be clamped at zero.

In the commercial simulators used for Si-based TFTs, the internal recombination/generation rate, RGR, includes additional processes to those considered in Sect. 2.3. In particular, the treatment of carrier emission is extended to include field-enhanced emission processes from traps, as well as band-to-band tunnelling. Those mechanisms are discussed further in Sect. 8.5.3.

5 Summary

Some analytical device physics concepts, using single crystal equations, have been introduced as a background topic to later chapters. These simple concepts are widely used in interpreting TFT behaviour, and they provide a solid basis for appreciating the assumptions and approximations used in that work.

The topics in this chapter have been restricted to those of most relevance to TFTs, and have focussed, firstly, on aspects of semiconductor surface physics, which describe the relationship between gate bias, surface space charge, and band bending in MIS structures. This topic underpins the understanding of IGFET behaviour, which will be the subject of Chap. 3. The second topic is electron-hole pair recombination and generation processes through deep level centres in the forbidden band gap. These processes play a role in establishing steady-state carrier concentrations under injection processes, and determine reverse bias leakage currents from junction depletion regions. Finally, there is a brief overview of the current flow processes, which are incorporated in device simulation packages.