Abstract
A rule of thumb for Very-Large Scale of Integration (VLSI) engineers known as “Moore’s Law” [moor96] states that the number of transistors per chip is expected to double every year. Despite numerous adverse predictions, “Moore’s Law” has held for the last 35 years, although recently the rate has slowed to about 1.5 times per year, or to quadrupling every three years [mein95]. In the dominant CMOS technology, the increase in integration comes with numerous beneficial effects. Transistors become faster (the delay of a ring oscillator stage in 0.1μm technology with 1.0V supply voltage is less than 5ps) and performance increases. Commercially available microprocessors run with clock speed exceeding 500MHz and contain more than 9 million transistors [al- pha96, expo96]. Processors with clock frequency close to 1GHz are expected to be announced in the next two to three years.
Olim nescio quid sit otium, quid quies, quid denique illud iners quidem, iucundum tamen, nihil agere, nihil esse.
I do not know what is rest, what is tranquillity, what is that state of doing nothing, being nothing, certainly with no activity.
—Plinius Secundus
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© 1998 Springer Science+Business Media New York
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Benini, L., De Micheli, G. (1998). Introduction. In: Dynamic Power Management. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5455-4_1
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DOI: https://doi.org/10.1007/978-1-4615-5455-4_1
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