Abstract
High throughput and dynamic reconfigurability are required in many tasks, especially real-time applications. A logical structure of parallel computing system for such applications is a pipeline of multiprocessor modules in form of a linear array (PMMLA). This paper proposes a scheme to dynamically reconfigure the system by varying the number of processors in each stage of the PMMLA to maintain load balancing among stages.
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S-Y Lee and Gautam Ghare, “Compact and Flexible Linear-Array-Based Implementations of A Pipeline of Multiprocessor Modules (PMMLA) for High Throughput Applications”, Proceedings of IEEE International Conference on High Performance Computing (HiPC'97), pp. 296–301, 1997.
Stuart Green, “Parallel Processing for Computer Graphics”, MIT Press, 1991.
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© 1998 Springer-Verlag Berlin Heidelberg
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Ghare, G., Lee, SY. (1998). Dynamic reconfiguration of a PMMLA for high-throughput applications. In: Rolim, J. (eds) Parallel and Distributed Processing. IPPS 1998. Lecture Notes in Computer Science, vol 1388. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-64359-1_664
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DOI: https://doi.org/10.1007/3-540-64359-1_664
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