Abstract
A self-balanced charge pump (CP) with fast lock circuit to achieve nearly zero phase error is proposed and analyzed. The proposed CP is designed based on the SMIC 0.25 μm 1P5M complementary metal-oxide semiconductor (CMOS) process with a 2.5 V supply voltage. HSPICE simulation shows that even if the mismatch of phase/frequency detector (PFD) was beyond 10%, the charge pump could still keep nearly zero phase error. Incorporated fast lock circuit can shorten start-up time to below 300 ns.
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Foundation item: Supported by the National High Technology Research and Development Program of China (2004AA122310)
Biography: JIANG Xiang (1972-), male, Ph. D. candidate, research direction: analog and mixed integration circuit.
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Xiang, J., Xuecheng, Z., Dingzhong, X. et al. Self-balanced charge pump with fast lock circuit. Wuhan Univ. J. Nat. Sci. 11, 621–624 (2006). https://doi.org/10.1007/BF02836677
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DOI: https://doi.org/10.1007/BF02836677