Abstract
The electronic industry using silicon complementary metal-oxide-semiconductor (CMOS) technology is the leading contender in the market since five decades. Nowadays, silicon CMOS technology is reached to its fundamental limits (physical and geometrical), which is the major roadblock for upcoming technological nodes. As an alternative solution, two-dimensional (2D) materials are in great demand. Graphene is the first 2D material being studied and it is also known as “miracle-material” due to its incredible physical properties. This paper explores the current status of graphene transistor as a potential supplement to the silicon CMOS technology. The absence of an energy bandgap in graphene results in severe shortcomings for logic applications. Various techniques to engineer the bandgap in graphene field-effect transistors (FETs) have been discussed. The use of dopant atoms in graphene and its effect on drain current is studied. The current-voltage characteristics of prototype devices are determined by the first-principles quantum transport calculations. The graphene nanoribbon (GNR) FET and dual-gate (DG) FET structures have been designed and simulated using QuantumWise ATK. A bandgap opening technique in bilayer graphene is proposed and analysed for FET applications as a potential replacement for silicon transistors.
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Narendar, V., Gupta, S.K. & Saxena, S. First Principle Study of Doped Graphene for FET Applications. Silicon 11, 277–286 (2019). https://doi.org/10.1007/s12633-018-9852-x
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DOI: https://doi.org/10.1007/s12633-018-9852-x