1 Introduction

Technology Computed Aided Design for III–V semiconductor optoelectronics is an excellent environment to optimize device performance through parameter design of experiments. However, model calibration is critical to accurately predict device performance. For the case of planar devices such as large area photovoltaic cells composed of GaAs, this represents a near ideal system to model due to a negligible perimeter recombination component to dark current (Chen et al. 2019); it is further simplified due to its homojunction design. Model calibration thus primarily relies on Shockley–Read–Hall (SRH) recombination as it is the primary unknown for a particular injection level (Ahrenkiel et al. 1991; Walker et al. 2016). For devices with much smaller junctions formed through a heterointerface, such as small pitch InGaAs/InP photodetector arrays (Yuan et al. 2014; Wichman et al. 2014; DeWames et al. 2015; Walker and Denhoff 2017), the contributions to dark current include SRH in the depletion region and along the interfaces of the heterojunction (assuming surface leakage is inhibited), as well as minority carrier diffusion from neutral regions. The perimeter leakage, however, is the major component in small pitch photodetectors due to the dominant perimeter to area ratio of these structures. In the ideal limit, however, minority carrier diffusion is the limiting factor that limits the dark current and thus shot noise of the photodetector. An understanding of both components is therefore of interest for device optimization.

To study the dark current contributions of a P–i–N pixel diode, a guard ring around the diode is required to inhibit minority carrier diffusion from the neutral In0.53Ga0.47As material lattice matched to InP (henceforth referred to as InGaAs, see Fig. 1a for layer structure and doping). The dark current is then dominated by junction and perimeter SRH, as well as diffusion contributions within the guard ring. Guarded variable area diodes then yield valuable insight into the junction and perimeter contributions (see Fig. 1b). Unbiasing the guard ring then allows for minority carrier diffusion, which allows for this component to be determined separately from junction and perimeter SRH. These three contributions are required to predict the dark current of pixels in a photodetector array where neighboring pixels also act as guards (see Fig. 1c). Reports of such guarded diodes have been published in the literature specific to planar InGaAs/InP P–i–N photodetectors used for focal plane array (FPA) applications in the short wavelength infrared (Wichman et al. 2014; DeWames et al. 2015; Yuan et al. 2012). The total contributions to dark current are referred to as bulk and perimeter leakage using an analysis of current density dependence on the diode’s perimeter to area ratio. The bulk contribution represents the depletion region of the junction as well as diffusion of minority carriers in InGaAs, which is constrained by the InGaAs layer thickness and the guard ring; minority carrier diffusion from the neutral InGaAs region outside the guard ring is inhibited by said guarding diode. However, the resulting bulk and perimeter components from this analysis are not representative of a pixel’s dark current due to the contributions from minority carrier diffusion originating in neutral InGaAs, which depends on the pitch of the photodetector array, the size of the pixel’s junction, and on the minority carrier diffusion properties (doping, thickness, interface quality, SRH trap density and hole mobility). In this paper, the contributions to the diode’s dark current are discussed using numerical device simulations and experimental characterization of test structures.

Fig. 1
figure 1

a Simulated unit cell showing the materials, absolute doping concentrations and geometry of a central diode and guard ring. b Variable area guarded diodes. c 3 × 3 array of pixels to outline neighboring pixel as guards collecting diffusion between diodes (arrows)

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The structure of the paper is outlined as follows. First, experimental and theoretical methods are summarized in Sect. 2. In Sect. 3, the experimental results are reported in terms of the measurable contributions to dark currents of test structures on a wafer. In Sect. 4, the model calibration is explored and subsequently tested by predicting device performance of small diodes with large perimeter to area ratios. Section 5 outlines the conclusions of this work.

2 Methods

2.1 Experimental test structures

Cylindrically symmetric InGaAs/InP test structures of various junction areas are positioned across several locations on an InP wafer. These test structure diodes have fixed guard parameters (i.e. width of guard ring and separation from central diode) to reflect a device according to Fig. 1a. Also included are 100 pixel arrays for small junctions relevant for FPA applications; 25 and 15 µm pitches are explored with various junction sizes. Finally, vertically stacked long thin diodes of various interdiode separations are included to extract minority carrier diffusion lengths (Walker and Denhoff 2017). It is important to note that wafer statistics become relevant in assessing uniformity and average contributions to dark current across large pixel formats. As a result, dozens of test structures were measured and analyzed on a single wafer. The epitaxy details regarding the InGaAs/InP stack are based on metal organic chemical vapor deposition (MOCVD) using S-doped InP substrates, and all epi-layers are intentionally Si-doped using silane. A single dielectric mask was used as a diffusion barrier for the diffusion process which was performed in the MOCVD reactor using dimethylzinc as the Zn source with a PH3 overpressure. A rapid thermal anneal treatment was performed to electrically activate the Zn dopant. Pd/Zn/Pd/Au ohmic contacts were made to the p++ InP, whereas Pd/Ge/Ti/Pt/Au was used as ohmic contacts to the n+InP.

A Keysight 4155C semiconductor parameter analyzer was used to perform accurate low noise electrical measurements, where the bias on the guard was kept equivalent to the diode bias; for unguarded measurements, no probe contacted the guard ring. Triaxial cables connected the source measure units of the 4155C to low noise contact probes; the noise floor of the measurement setup is ~ 30 fA. All measurements were carried out at room temperature. In order to limit the impact of hysteresis, a long integration time was used. In order to measure multiple devices on the wafer, a probe station from Cascade Microtech was used to automate the measurement process. Lastly, an HP 4284A precision LCR meter was used to measure large area diode C–V characteristics in order to extract a doping concentration in the InGaAs material assuming a one sided abrupt junction.

2.2 Numerical modeling

The Atlas and Blaze semiconductor modeling tools by Silvaco Inc. (2016) are adopted to perform III–V semiconductor device simulations. A unit cell representative of the two-dimensional cross-section of the diode is illustrated in Fig. 1a, where cylindrical symmetry is assumed. A Gaussian Zn diffusion profile defines the p++ region of the P–i–N junction in both the InP and InGaAs layers, and is defined to closely reflect secondary ion mass spectroscopy measurements with the assumption that all dopants are ionized. Material parameters for InP and InGaAs are assumed to be default in the Atlas module, except for the radiative recombination coefficient in InGaAs of Brad = 0.7 × 10−10 cm−3/s−1 (Walker and Denhoff 2017) and InP of Brad = 10−10 cm−3/s−1. The former is essential to quantify the diffusion length in the InGaAs material, whereas the Atlas module assumes by default that InP does not luminesce (i.e. Brad = 0). The hole mobility in InGaAs is determined according to an input diffusion length based on the SRH and radiative lifetimes, whereas electron mobilities are dependent on doping and temperature (Sotoodeh et al. 2000). The SRH lifetime in InGaAs is the sole fitting parameter defining the depletion region component to the dark current, whereas a trap population is defined at the InP/InGaAs interface assuming the traps are located at the mid-bandgap energy of InGaAs with trap capture cross-sections of 10−14 cm−2. Only the trap density is calibrated to agree with measured current densities as a function of perimeter to area ratio, which is discussed in Sect. 4.

3 Experimental results

The dark current, scaled by the active diode area, results in a dark current density which can be plotted as a function of diode’s perimeter to area ratio (P/A). This is illustrated in Fig. 2 for a reverse bias of 100 mV applied to both the diode and its guard ring; statistical variation across the wafer is outlined by error bars. This dependence serves to separate the contributions of bulk recombination from perimeter leakage, as expressed by

$$J_{diode} = J_{perim} {\raise0.7ex\hbox{$P$} \!\mathord{\left/ {\vphantom {P A}}\right.\kern-0pt} \!\lower0.7ex\hbox{$A$}} + J_{bulk}$$
(1)

where Jdiode, Jperim and Jbulk represent the total diode current density in nA/cm2, the perimeter contribution in pA/cm and the bulk contribution in nA/cm2 respectively. However, the smallest guarded device data point (largest P/A, circled) shows a higher than expected dark current density due to its low dark current (extrapolated from simulation to ~ 20 fA), which is comparable to the noise floor of the experimental setup; this data is ignored in the ensuing analysis for guard ring data, whereas the unguarded data yields sufficiently large dark currents to be accurately resolved by the source measure units. A linear fit to the guarded diode data (excluding the largest P/A value) yields Jperim = 1.4 ± 0.3 pA/cm and Jbulk = 2.0 ± 0.2 nA/cm2, which represents comparable values to the literature for bulk (Yuan et al. 2012) yet are significantly lower than other reports (DeWames et al. 2015). Overall, this indicates a small but important perimeter contribution depending on the P/A ratio. It is important to note here that process optimization has enabled low surface related dark currents in the larger InP bandgap material, and are assumed negligible in this analysis.

Fig. 2
figure 2

Experimental and simulated dark current density as a function of the junction’s perimeter to area ratio for biased and unbiased guard rings. For the unguarded test structures, various diffusion lengths were simulated to match experimental results. The smallest guarded device (largest P/A, circled) shows a large current density since its low dark current (extrapolated as ~ 20 fA) is below the noise floor of the measurement setup

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Overall, however, these contributions to dark current are for a diode whose guard is within a distance much smaller than the minority carrier diffusion length. As the guard becomes distanced from the central pixel, the dark current will increase due to thermally generated carriers diffusing to the junction. This is evidenced by removing the bias on the guard, as illustrated in Fig. 2. In this scenario, the minority carrier diffusion dominates the dark current and results in a 10 × increase in dark current density. This supplementary diffusion term adds a nonlinear component to the dark current which does not scale linearly with the junction area. Equation (1) should therefore not be adopted for this unguarded system. A linear regression analysis on the unguarded diode data (not shown) yields Jperim = 42 ± 2 pA/cm and Jbulk = − 4.6 ± 1.5 nA/cm2. This highlights the erroneous nature of quantifying unguarded diode measurements. As a result, the design of the guard ring becomes relevant in the overall design, since its separation to the diode must be kept minimal for accurate parameter extraction; otherwise the analysis will incorrectly associate thermal diffusion with perimeter leakage. Also note that beyond a particular reverse bias, the depletion widths of the central diode and its guard ring will overlap, which will limit the validity of this analysis. Finally, the unguarded data set for the smallest device (largest P/A) is valid in this analysis due to the sufficiently large dark current measured (~ 300 fA).

This supplementary diffusion component depends inherently on the minority carrier diffusion length, the thickness of the InGaAs, and on the overall thermal generation of carriers (i.e. the bandgap and temperature). In this case, the diffusion length is estimated to be (65 ± 5) μm from long thin diode measurements on the same region of the wafer (Walker and Denhoff 2017), which can be used to estimate a diffusion constant of 15 cm2/s assuming a purely radiative lifetime. Overall, these results outline the importance of neutral region diffusion to the overall dark current in InGaAs/InP diodes, and this must be considered in evaluating a pixel’s dark current since a pixel is only guarded by neighboring pixels (see Fig. 1c). Overall, this data will assist in calibrating and testing the validity of the device model, which is discussed in the next section.

4 Model calibration and simulation results

Atlas simulation results, illustrated in Fig. 2 to compare to experiment, yield comparable values to the experimental data within the statistical spread from the wafer for both guarded and unguarded simulated structures. The simulated Jperim = 1.0 pA/cm and a Jbulk = 2.1 nA/cm2 extracted from the best fit to Eq. (1) agree well with the experimental values for the guarded test structures. The model assumes the doping density of the InGaAs layer as estimated from CV measurements, and the calibration is based on the SRH lifetime in InGaAs to calibrate the depletion region recombination component (estimated to be τSRH = 0.8 ms compared to τRAD = 2.8 µs, implying the diffusion length is limited by radiative recombination) and the trap density at the InP/InGaAs interface as the perimeter component (estimated to be 106 cm−2 for the aforementioned trap capture cross-section). The interface trap density hints at excellent interface quality, as the equivalent interface recombination velocity is 0.1 cm/s. The doping dependence of minority carriers in both InP and InGaAs (i.e. mobility and recombination) are assumed fixed. For guarded diode simulations, the results are not strongly dependent on the diffusion length unless the diffusion length becomes comparable to the guard separation. Only when the guard rings are not included in the simulation do the results show a dependence on diffusion lengths. This is illustrated in the unguarded simulation data, where the best fit involves a diffusion length of 70 μm. This agrees very well with the extracted diffusion length using test structures on the same wafer.

The depletion region SRH recombination lifetime and the interface defect density along the perimeter of the junction provide good calibration parameters to the model specifically for these two contributions to the overall pixel dark current. The simulated recombination rate in the guarded device in reverse bias is shown in Fig. 3a. The depletion region and the edge dominate the overall recombination rate in the guarded test structure. Below the depletion region, the overall recombination rate is reduced in magnitude but still contributing to the overall recombination; it is also constant along the depth of the InGaAs, since the diffusion length is significantly longer than the thickness of the InGaAs layer. The recombination rate decays radially beyond the guard diode according to the diffusion length of 70 μm. Figure 3b illustrates the corresponding simulation when the guard is unbiased. Although some recombination can be observed in the guard’s depletion region due to its built-in electric field where SRH is most important, it is 60% smaller in magnitude compared to the guarded test structure. Furthermore, the radially decaying recombination appears immediately after the central diode, thus confirming the unbiased nature of the guard ring contact.

Fig. 3
figure 3

Simulated recombination rate (log(R)) at − 100 mV for a the guarded test structure which shows depletion region and interface recombination dominating the contributions, and b the unguarded test structure which shows significant contributions from diffusion. The total current density simulated through the device (magnitude and vectorial components) for c the guarded and d the unguarded test structure, both showing perimeter leakage along the InP/InGaAs interface for both diodes. The impact of the guard is also highlighted by diffusion contributions

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In order to improve the understanding of current distribution, the current densities in magnitude and in vectorial components are illustrated in Figs. 3c and d for the guarded and unguarded diodes respectively. In both figures, the primary components of the diode’s current appear in the depletion region and at the edge (corresponding to the perimeter). These regions correlate to the overall recombination regions illustrated in Fig. 3a, b. In the guarded simulation, the diffusion component between the diode and its guard is equally divided for collection. The guard itself is the one collecting the entire diffusion component from outside of the guard ring. In comparison, the diffusion from the neutral InGaAs region is collected by the primary diode when the guard is not biased, as evidenced by Fig. 3d. Interestingly, the current flows through the depletion region of the guard prior to being collected by the central diode. This is due to the holes being collected by the built-in electric field of the unbiased guard, but due to charge neutrality (as carriers cannot be collected by the contact), holes are then injected back into the InGaAs at the inner edge of the guard ring; this contribution is subsequently collected by the central diode with high efficiency. Overall, this confirms the supplementary component to dark current as diffusion current for unguarded simulations.

Figure 4 illustrates the dependence of the dark current density on the guard ring separation based on the calibrated model for a fixed central diode radius of r = 25 µm. For a guard ring separation of 10 µm, the current density appears independent of diffusion length unless the diffusion length is < 5 µm. In other words, for short diffusion lengths, the dark current shows no dependence on the guard ring separation. However, as the diffusion length increases beyond 10 µm, the current density shows an important increase as the guard ring separation increases. Overall, the guard ring design can show an important impact on the dark current and thus on the extracted parameters from the previous analysis. For guard ring separations less than half the diffusion length, there is little impact on the dark current density. However, for sufficiently large separation or short diffusion lengths, one must carefully design the guard ring accordingly.

Fig. 4
figure 4

Simulated dark current density as a function of the guard ring separation for various diffusion lengths

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Since pixels in a large area format FPA are only guarded by neighboring pixels (see Fig. 1c), the dark current will depend on the diffusion contribution in addition to the depletion region and perimeter contributions. Thus, the pixel pitch, the minority carrier diffusion length and finally the junction size must be optimized to enable low dark currents without inhibiting carrier collection (which can limit the quantum efficiency of the pixel). To illustrate this, one can simulate a pixel diode for a fixed pitch and compare to experimental measurements of pixel test arrays. These simulation results are illustrated in Fig. 5 in terms of current density (scaled by the pixel area rather than the junction area) as a function of the diode’s perimeter to area ratio. The simulation results assume a 70 µm diffusion length and a trap density of 106 cm−2. The simulated data are compared to experimental data from dozens of test devices across the wafer. The agreement of the simulated and experimental data emphasizes the confidence level of the model, and this enables device optimization for a particular light level application such as low light level imaging. It also emphasizes that for the pitches explored, minority carrier diffusion has a strong contribution and this depends on the junction design and the minority carrier diffusion properties. According to simulation, the diffusion contributes an important component of the simulated dark current up to 70%, albeit depending on junction size. Current densities on the order of 1–2 nA/cm2 for 25 and 15 µm pitches represent close to the state-of-the-art for this technology at room temperature, although further optimization is still required to reduce dark current densities to the state-of-the-art of 0.7 nA/cm2 for 15 µm pitch (Fraenkel et al. 2017). Note that the guard ring in the 2D simulation is assumed to be a complete ring similar to Fig. 1b, whereas in the experiment, each pixel is guarded by a neighboring pixel (see Fig. 1c). As a result, the guarding is less efficient in experiment. A full 3D simulation would be required to properly account for neighboring pixels corresponding to a pixel array. The simulation should therefore under-estimate the diffusion component; this is indeed the case according to Fig. 5 for a 15 µm pitch, but not for the larger 25 µm pitch. Future studies will investigate this discrepancy.

Fig. 5
figure 5

Simulated dark current as a function of the junction’s perimeter to area in order to reflect the geometry of a pixel component of a photodetector array

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5 Conclusions

The junction perimeter, depletion region and minority carrier diffusion contributions to the dark current are explored using a numerical model that is calibrated to experimental results of test structures on an InP wafer. The importance of the guard ring is emphasized, including the impact of diffusion from the neutral regions of the InGaAs material. Overall, low dark current densities originating from the bulk InGaAs material, depletion region and perimeter recombination totaling 1–2 nA/cm2 are reported for 25 and 15 µm pitch photodetector arrays at room temperature, along with ultra-low perimeter leakage of up to 1.4 pA/cm. This reflects the low dark currents of InGaAs/InP planar photodiodes intended for SWIR FPA applications.